cia.c revision 1.33
1 /* $NetBSD: cia.c,v 1.33 1998/05/11 23:56:16 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include "opt_dec_eb164.h" 31 #include "opt_dec_kn20aa.h" 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: cia.c,v 1.33 1998/05/11 23:56:16 thorpej Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <vm/vm.h> 43 44 #include <machine/autoconf.h> 45 #include <machine/rpb.h> 46 47 #include <dev/isa/isareg.h> 48 #include <dev/isa/isavar.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 #include <alpha/pci/ciareg.h> 53 #include <alpha/pci/ciavar.h> 54 #ifdef DEC_KN20AA 55 #include <alpha/pci/pci_kn20aa.h> 56 #endif 57 #ifdef DEC_EB164 58 #include <alpha/pci/pci_eb164.h> 59 #endif 60 61 int ciamatch __P((struct device *, struct cfdata *, void *)); 62 void ciaattach __P((struct device *, struct device *, void *)); 63 64 struct cfattach cia_ca = { 65 sizeof(struct cia_softc), ciamatch, ciaattach, 66 }; 67 68 extern struct cfdriver cia_cd; 69 70 static int ciaprint __P((void *, const char *pnp)); 71 72 /* There can be only one. */ 73 int ciafound; 74 struct cia_config cia_configuration; 75 76 int 77 ciamatch(parent, match, aux) 78 struct device *parent; 79 struct cfdata *match; 80 void *aux; 81 { 82 struct confargs *ca = aux; 83 84 /* Make sure that we're looking for a CIA. */ 85 if (strcmp(ca->ca_name, cia_cd.cd_name) != 0) 86 return (0); 87 88 if (ciafound) 89 return (0); 90 91 return (1); 92 } 93 94 /* 95 * Set up the chipset's function pointers. 96 */ 97 void 98 cia_init(ccp, mallocsafe) 99 struct cia_config *ccp; 100 int mallocsafe; 101 { 102 103 ccp->cc_hae_mem = REGVAL(CIA_CSR_HAE_MEM); 104 ccp->cc_hae_io = REGVAL(CIA_CSR_HAE_IO); 105 ccp->cc_rev = REGVAL(CIA_CSR_REV); 106 107 /* 108 * Revisions >= 2 have the CNFG register. 109 */ 110 if (ccp->cc_rev >= 2) 111 ccp->cc_cnfg = REGVAL(CIA_CSR_CNFG); 112 else 113 ccp->cc_cnfg = 0; 114 115 /* 116 * If revision is > 2 non-masked, assume Pyxis. (XXX iffy?) 117 */ 118 if (ccp->cc_rev > 2) 119 ccp->cc_ispyxis = 1; 120 else 121 ccp->cc_ispyxis = 0; 122 123 ccp->cc_rev &= REV_MASK; 124 125 if (!ccp->cc_initted) { 126 /* don't do these twice since they set up extents */ 127 cia_swiz_bus_io_init(&ccp->cc_iot, ccp); 128 cia_swiz_bus_mem_init(&ccp->cc_memt, ccp); 129 } 130 ccp->cc_mallocsafe = mallocsafe; 131 132 cia_pci_init(&ccp->cc_pc, ccp); 133 134 cia_dma_init(ccp); 135 136 ccp->cc_initted = 1; 137 } 138 139 void 140 ciaattach(parent, self, aux) 141 struct device *parent, *self; 142 void *aux; 143 { 144 struct cia_softc *sc = (struct cia_softc *)self; 145 struct cia_config *ccp; 146 struct pcibus_attach_args pba; 147 char bits[64]; 148 149 /* note that we've attached the chipset; can't have 2 CIAs. */ 150 ciafound = 1; 151 152 /* 153 * set up the chipset's info; done once at console init time 154 * (maybe), but we must do it here as well to take care of things 155 * that need to use memory allocation. 156 */ 157 ccp = sc->sc_ccp = &cia_configuration; 158 cia_init(ccp, 1); 159 160 /* 161 * If we're a Pyxis, print the revision number, otherwise 162 * the revision number indicates ALCOR or ALCOR2. 163 */ 164 if (ccp->cc_ispyxis) 165 printf(": DECchip 21174 Core Logic chipset, revision %d\n", 166 ccp->cc_rev); 167 else 168 printf(": DECchip 2117%d Core Logic chipset\n", ccp->cc_rev); 169 if (ccp->cc_cnfg) 170 printf("%s: extended capabilities: %s\n", self->dv_xname, 171 bitmask_snprintf(ccp->cc_cnfg, CIA_CSR_CNFG_BITS, 172 bits, sizeof(bits))); 173 174 switch (hwrpb->rpb_type) { 175 #ifdef DEC_KN20AA 176 case ST_DEC_KN20AA: 177 pci_kn20aa_pickintr(ccp); 178 #ifdef EVCNT_COUNTERS 179 evcnt_attach(self, "intr", &kn20aa_intr_evcnt); 180 #endif 181 break; 182 #endif 183 184 #ifdef DEC_EB164 185 case ST_EB164: 186 pci_eb164_pickintr(ccp); 187 #ifdef EVCNT_COUNTERS 188 evcnt_attach(self, "intr", &eb164_intr_evcnt); 189 #endif 190 break; 191 #endif 192 193 default: 194 panic("ciaattach: shouldn't be here, really..."); 195 } 196 197 pba.pba_busname = "pci"; 198 pba.pba_iot = &ccp->cc_iot; 199 pba.pba_memt = &ccp->cc_memt; 200 pba.pba_dmat = 201 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI); 202 pba.pba_pc = &ccp->cc_pc; 203 pba.pba_bus = 0; 204 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 205 config_found(self, &pba, ciaprint); 206 } 207 208 static int 209 ciaprint(aux, pnp) 210 void *aux; 211 const char *pnp; 212 { 213 register struct pcibus_attach_args *pba = aux; 214 215 /* only PCIs can attach to CIAs; easy. */ 216 if (pnp) 217 printf("%s at %s", pba->pba_busname, pnp); 218 printf(" bus %d", pba->pba_bus); 219 return (UNCONF); 220 } 221
Indexes created Tue Sep 30 20:09:53 GMT 2025