cia.c revision 1.36
1 /* $NetBSD: cia.c,v 1.36 1998/06/03 23:16:55 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include "opt_dec_eb164.h" 31 #include "opt_dec_kn20aa.h" 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: cia.c,v 1.36 1998/06/03 23:16:55 thorpej Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <vm/vm.h> 43 44 #include <machine/autoconf.h> 45 #include <machine/rpb.h> 46 47 #include <dev/isa/isareg.h> 48 #include <dev/isa/isavar.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 #include <alpha/pci/ciareg.h> 53 #include <alpha/pci/ciavar.h> 54 #ifdef DEC_KN20AA 55 #include <alpha/pci/pci_kn20aa.h> 56 #endif 57 #ifdef DEC_EB164 58 #include <alpha/pci/pci_eb164.h> 59 #endif 60 61 int ciamatch __P((struct device *, struct cfdata *, void *)); 62 void ciaattach __P((struct device *, struct device *, void *)); 63 64 struct cfattach cia_ca = { 65 sizeof(struct cia_softc), ciamatch, ciaattach, 66 }; 67 68 extern struct cfdriver cia_cd; 69 70 static int ciaprint __P((void *, const char *pnp)); 71 72 /* There can be only one. */ 73 int ciafound; 74 struct cia_config cia_configuration; 75 76 int 77 ciamatch(parent, match, aux) 78 struct device *parent; 79 struct cfdata *match; 80 void *aux; 81 { 82 struct mainbus_attach_args *ma = aux; 83 84 /* Make sure that we're looking for a CIA. */ 85 if (strcmp(ma->ma_name, cia_cd.cd_name) != 0) 86 return (0); 87 88 if (ciafound) 89 return (0); 90 91 return (1); 92 } 93 94 /* 95 * Set up the chipset's function pointers. 96 */ 97 void 98 cia_init(ccp, mallocsafe) 99 struct cia_config *ccp; 100 int mallocsafe; 101 { 102 103 ccp->cc_hae_mem = REGVAL(CIA_CSR_HAE_MEM); 104 ccp->cc_hae_io = REGVAL(CIA_CSR_HAE_IO); 105 ccp->cc_rev = REGVAL(CIA_CSR_REV) & REV_MASK; 106 107 /* 108 * Determine if we have a Pyxis. Only two systypes can 109 * have this: the EB164 systype (AlphaPC164LX and AlphaPC164SX) 110 * and the DEC_550 systype (Miata). 111 */ 112 if ((hwrpb->rpb_type == ST_EB164 && 113 (hwrpb->rpb_variation & SV_ST_MASK) >= SV_ST_ALPHAPC164LX_400) || 114 hwrpb->rpb_type == ST_DEC_550) 115 ccp->cc_flags |= CCF_ISPYXIS; 116 117 /* 118 * Revisions >= 2 have the CNFG register. 119 */ 120 if (ccp->cc_rev >= 2) 121 ccp->cc_cnfg = REGVAL(CIA_CSR_CNFG); 122 else 123 ccp->cc_cnfg = 0; 124 125 if (!ccp->cc_initted) { 126 /* don't do these twice since they set up extents */ 127 cia_swiz_bus_io_init(&ccp->cc_iot, ccp); 128 cia_swiz_bus_mem_init(&ccp->cc_memt, ccp); 129 } 130 ccp->cc_mallocsafe = mallocsafe; 131 132 cia_pci_init(&ccp->cc_pc, ccp); 133 134 cia_dma_init(ccp); 135 136 ccp->cc_initted = 1; 137 } 138 139 void 140 ciaattach(parent, self, aux) 141 struct device *parent, *self; 142 void *aux; 143 { 144 struct cia_softc *sc = (struct cia_softc *)self; 145 struct cia_config *ccp; 146 struct pcibus_attach_args pba; 147 char bits[64]; 148 149 /* note that we've attached the chipset; can't have 2 CIAs. */ 150 ciafound = 1; 151 152 /* 153 * set up the chipset's info; done once at console init time 154 * (maybe), but we must do it here as well to take care of things 155 * that need to use memory allocation. 156 */ 157 ccp = sc->sc_ccp = &cia_configuration; 158 cia_init(ccp, 1); 159 160 printf(": DECchip 2117x Core Logic Chipset (%s), pass %d\n", 161 (ccp->cc_flags & CCF_ISPYXIS) ? "Pyxis" : "ALCOR/ALCOR2", 162 ccp->cc_rev + 1); 163 if (ccp->cc_cnfg) 164 printf("%s: extended capabilities: %s\n", self->dv_xname, 165 bitmask_snprintf(ccp->cc_cnfg, CIA_CSR_CNFG_BITS, 166 bits, sizeof(bits))); 167 168 switch (hwrpb->rpb_type) { 169 #ifdef DEC_KN20AA 170 case ST_DEC_KN20AA: 171 pci_kn20aa_pickintr(ccp); 172 #ifdef EVCNT_COUNTERS 173 evcnt_attach(self, "intr", &kn20aa_intr_evcnt); 174 #endif 175 break; 176 #endif 177 178 #ifdef DEC_EB164 179 case ST_EB164: 180 pci_eb164_pickintr(ccp); 181 #ifdef EVCNT_COUNTERS 182 evcnt_attach(self, "intr", &eb164_intr_evcnt); 183 #endif 184 break; 185 #endif 186 187 default: 188 panic("ciaattach: shouldn't be here, really..."); 189 } 190 191 pba.pba_busname = "pci"; 192 pba.pba_iot = &ccp->cc_iot; 193 pba.pba_memt = &ccp->cc_memt; 194 pba.pba_dmat = 195 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI); 196 pba.pba_pc = &ccp->cc_pc; 197 pba.pba_bus = 0; 198 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 199 config_found(self, &pba, ciaprint); 200 } 201 202 static int 203 ciaprint(aux, pnp) 204 void *aux; 205 const char *pnp; 206 { 207 register struct pcibus_attach_args *pba = aux; 208 209 /* only PCIs can attach to CIAs; easy. */ 210 if (pnp) 211 printf("%s at %s", pba->pba_busname, pnp); 212 printf(" bus %d", pba->pba_bus); 213 return (UNCONF); 214 } 215
Indexes created Tue Sep 30 20:09:53 GMT 2025