cia.c revision 1.38
1 /* $NetBSD: cia.c,v 1.38 1998/06/04 22:58:33 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include "opt_dec_eb164.h" 31 #include "opt_dec_kn20aa.h" 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(0, "$NetBSD: cia.c,v 1.38 1998/06/04 22:58:33 thorpej Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <vm/vm.h> 43 44 #include <machine/autoconf.h> 45 #include <machine/rpb.h> 46 47 #include <dev/isa/isareg.h> 48 #include <dev/isa/isavar.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 #include <alpha/pci/ciareg.h> 53 #include <alpha/pci/ciavar.h> 54 #ifdef DEC_KN20AA 55 #include <alpha/pci/pci_kn20aa.h> 56 #endif 57 #ifdef DEC_EB164 58 #include <alpha/pci/pci_eb164.h> 59 #endif 60 61 int ciamatch __P((struct device *, struct cfdata *, void *)); 62 void ciaattach __P((struct device *, struct device *, void *)); 63 64 struct cfattach cia_ca = { 65 sizeof(struct cia_softc), ciamatch, ciaattach, 66 }; 67 68 extern struct cfdriver cia_cd; 69 70 static int ciaprint __P((void *, const char *pnp)); 71 72 /* There can be only one. */ 73 int ciafound; 74 struct cia_config cia_configuration; 75 76 /* 77 * This determines if we attempt to use BWX for PCI bus and config space 78 * access. Some systems, notably with Pyxis, don't fare so well unless 79 * BWX is used. 80 */ 81 #ifndef CIA_USE_BWX 82 #define CIA_USE_BWX 1 83 #endif 84 85 int cia_use_bwx = CIA_USE_BWX; 86 87 int 88 ciamatch(parent, match, aux) 89 struct device *parent; 90 struct cfdata *match; 91 void *aux; 92 { 93 struct mainbus_attach_args *ma = aux; 94 95 /* Make sure that we're looking for a CIA. */ 96 if (strcmp(ma->ma_name, cia_cd.cd_name) != 0) 97 return (0); 98 99 if (ciafound) 100 return (0); 101 102 return (1); 103 } 104 105 /* 106 * Set up the chipset's function pointers. 107 */ 108 void 109 cia_init(ccp, mallocsafe) 110 struct cia_config *ccp; 111 int mallocsafe; 112 { 113 114 ccp->cc_hae_mem = REGVAL(CIA_CSR_HAE_MEM); 115 ccp->cc_hae_io = REGVAL(CIA_CSR_HAE_IO); 116 ccp->cc_rev = REGVAL(CIA_CSR_REV) & REV_MASK; 117 118 /* 119 * Determine if we have a Pyxis. Only two systypes can 120 * have this: the EB164 systype (AlphaPC164LX and AlphaPC164SX) 121 * and the DEC_550 systype (Miata). 122 */ 123 if ((hwrpb->rpb_type == ST_EB164 && 124 (hwrpb->rpb_variation & SV_ST_MASK) >= SV_ST_ALPHAPC164LX_400) || 125 hwrpb->rpb_type == ST_DEC_550) 126 ccp->cc_flags |= CCF_ISPYXIS; 127 128 /* 129 * Revisions >= 2 have the CNFG register. 130 */ 131 if (ccp->cc_rev >= 2) 132 ccp->cc_cnfg = REGVAL(CIA_CSR_CNFG); 133 else 134 ccp->cc_cnfg = 0; 135 136 /* 137 * Use BWX iff: 138 * 139 * - It hasn't been disbled by the user, 140 * - it's enabled in CNFG, 141 * - we're implementation version ev5, 142 * - BWX is enabled in the CPU's capabilities mask (yes, 143 * the bit is really cleared if the capability exists...) 144 */ 145 if (cia_use_bwx != 0 && 146 (ccp->cc_cnfg & CNFG_BWEN) != 0 && 147 alpha_implver() == ALPHA_IMPLVER_EV5 && 148 alpha_amask(ALPHA_AMASK_BWX) == 0) { 149 u_int32_t ctrl; 150 151 ccp->cc_flags |= CCF_USEBWX; 152 153 /* 154 * For whatever reason, the firmware seems to enable PCI 155 * loopback mode if it also enables BWX. Make sure it's 156 * enabled if we have an old, buggy firmware rev. 157 */ 158 alpha_mb(); 159 ctrl = REGVAL(CIA_CSR_CTRL); 160 if ((ctrl & CTRL_PCI_LOOP_EN) == 0) { 161 REGVAL(CIA_CSR_CTRL) = ctrl | CTRL_PCI_LOOP_EN; 162 alpha_mb(); 163 } 164 } 165 166 if (!ccp->cc_initted) { 167 /* don't do these twice since they set up extents */ 168 if (ccp->cc_flags & CCF_USEBWX) { 169 cia_bwx_bus_io_init(&ccp->cc_iot, ccp); 170 cia_bwx_bus_mem_init(&ccp->cc_memt, ccp); 171 } else { 172 cia_swiz_bus_io_init(&ccp->cc_iot, ccp); 173 cia_swiz_bus_mem_init(&ccp->cc_memt, ccp); 174 } 175 } 176 ccp->cc_mallocsafe = mallocsafe; 177 178 cia_pci_init(&ccp->cc_pc, ccp); 179 180 cia_dma_init(ccp); 181 182 ccp->cc_initted = 1; 183 } 184 185 void 186 ciaattach(parent, self, aux) 187 struct device *parent, *self; 188 void *aux; 189 { 190 struct cia_softc *sc = (struct cia_softc *)self; 191 struct cia_config *ccp; 192 struct pcibus_attach_args pba; 193 char bits[64]; 194 195 /* note that we've attached the chipset; can't have 2 CIAs. */ 196 ciafound = 1; 197 198 /* 199 * set up the chipset's info; done once at console init time 200 * (maybe), but we must do it here as well to take care of things 201 * that need to use memory allocation. 202 */ 203 ccp = sc->sc_ccp = &cia_configuration; 204 cia_init(ccp, 1); 205 206 printf(": DECchip 2117x Core Logic Chipset (%s), pass %d\n", 207 (ccp->cc_flags & CCF_ISPYXIS) ? "Pyxis" : "ALCOR/ALCOR2", 208 ccp->cc_rev + 1); 209 if (ccp->cc_cnfg) 210 printf("%s: extended capabilities: %s\n", self->dv_xname, 211 bitmask_snprintf(ccp->cc_cnfg, CIA_CSR_CNFG_BITS, 212 bits, sizeof(bits))); 213 #if 1 214 if (ccp->cc_flags & CCF_USEBWX) 215 printf("%s: using BWX for PCI config and device access\n", 216 self->dv_xname); 217 #endif 218 219 switch (hwrpb->rpb_type) { 220 #ifdef DEC_KN20AA 221 case ST_DEC_KN20AA: 222 pci_kn20aa_pickintr(ccp); 223 #ifdef EVCNT_COUNTERS 224 evcnt_attach(self, "intr", &kn20aa_intr_evcnt); 225 #endif 226 break; 227 #endif 228 229 #ifdef DEC_EB164 230 case ST_EB164: 231 pci_eb164_pickintr(ccp); 232 #ifdef EVCNT_COUNTERS 233 evcnt_attach(self, "intr", &eb164_intr_evcnt); 234 #endif 235 break; 236 #endif 237 238 default: 239 panic("ciaattach: shouldn't be here, really..."); 240 } 241 242 pba.pba_busname = "pci"; 243 pba.pba_iot = &ccp->cc_iot; 244 pba.pba_memt = &ccp->cc_memt; 245 pba.pba_dmat = 246 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI); 247 pba.pba_pc = &ccp->cc_pc; 248 pba.pba_bus = 0; 249 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 250 config_found(self, &pba, ciaprint); 251 } 252 253 static int 254 ciaprint(aux, pnp) 255 void *aux; 256 const char *pnp; 257 { 258 register struct pcibus_attach_args *pba = aux; 259 260 /* only PCIs can attach to CIAs; easy. */ 261 if (pnp) 262 printf("%s at %s", pba->pba_busname, pnp); 263 printf(" bus %d", pba->pba_bus); 264 return (UNCONF); 265 } 266
Indexes created Wed Oct 01 19:09:53 GMT 2025