cia.c revision 1.40
1 /* $NetBSD: cia.c,v 1.40 1998/06/05 02:15:38 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include "opt_dec_eb164.h" 31 #include "opt_dec_kn20aa.h" 32 #include "opt_dec_550.h" 33 34 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 35 36 __KERNEL_RCSID(0, "$NetBSD: cia.c,v 1.40 1998/06/05 02:15:38 thorpej Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/malloc.h> 42 #include <sys/device.h> 43 #include <vm/vm.h> 44 45 #include <machine/autoconf.h> 46 #include <machine/rpb.h> 47 48 #include <dev/isa/isareg.h> 49 #include <dev/isa/isavar.h> 50 51 #include <dev/pci/pcireg.h> 52 #include <dev/pci/pcivar.h> 53 #include <alpha/pci/ciareg.h> 54 #include <alpha/pci/ciavar.h> 55 #ifdef DEC_KN20AA 56 #include <alpha/pci/pci_kn20aa.h> 57 #endif 58 #ifdef DEC_EB164 59 #include <alpha/pci/pci_eb164.h> 60 #endif 61 #ifdef DEC_550 62 #include <alpha/pci/pci_550.h> 63 #endif 64 65 int ciamatch __P((struct device *, struct cfdata *, void *)); 66 void ciaattach __P((struct device *, struct device *, void *)); 67 68 struct cfattach cia_ca = { 69 sizeof(struct cia_softc), ciamatch, ciaattach, 70 }; 71 72 extern struct cfdriver cia_cd; 73 74 static int ciaprint __P((void *, const char *pnp)); 75 76 /* There can be only one. */ 77 int ciafound; 78 struct cia_config cia_configuration; 79 80 /* 81 * This determines if we attempt to use BWX for PCI bus and config space 82 * access. Some systems, notably with Pyxis, don't fare so well unless 83 * BWX is used. 84 */ 85 #ifndef CIA_USE_BWX 86 #define CIA_USE_BWX 1 87 #endif 88 89 int cia_use_bwx = CIA_USE_BWX; 90 91 int 92 ciamatch(parent, match, aux) 93 struct device *parent; 94 struct cfdata *match; 95 void *aux; 96 { 97 struct mainbus_attach_args *ma = aux; 98 99 /* Make sure that we're looking for a CIA. */ 100 if (strcmp(ma->ma_name, cia_cd.cd_name) != 0) 101 return (0); 102 103 if (ciafound) 104 return (0); 105 106 return (1); 107 } 108 109 /* 110 * Set up the chipset's function pointers. 111 */ 112 void 113 cia_init(ccp, mallocsafe) 114 struct cia_config *ccp; 115 int mallocsafe; 116 { 117 118 ccp->cc_hae_mem = REGVAL(CIA_CSR_HAE_MEM); 119 ccp->cc_hae_io = REGVAL(CIA_CSR_HAE_IO); 120 ccp->cc_rev = REGVAL(CIA_CSR_REV) & REV_MASK; 121 122 /* 123 * Determine if we have a Pyxis. Only two systypes can 124 * have this: the EB164 systype (AlphaPC164LX and AlphaPC164SX) 125 * and the DEC_550 systype (Miata). 126 */ 127 if ((hwrpb->rpb_type == ST_EB164 && 128 (hwrpb->rpb_variation & SV_ST_MASK) >= SV_ST_ALPHAPC164LX_400) || 129 hwrpb->rpb_type == ST_DEC_550) 130 ccp->cc_flags |= CCF_ISPYXIS; 131 132 /* 133 * ALCOR/ALCOR2 Revisions >= 2 and Pyxis have the CNFG register. 134 */ 135 if (ccp->cc_rev >= 2 || (ccp->cc_flags & CCF_ISPYXIS) != 0) 136 ccp->cc_cnfg = REGVAL(CIA_CSR_CNFG); 137 else 138 ccp->cc_cnfg = 0; 139 140 /* 141 * Use BWX iff: 142 * 143 * - It hasn't been disbled by the user, 144 * - it's enabled in CNFG, 145 * - we're implementation version ev5, 146 * - BWX is enabled in the CPU's capabilities mask (yes, 147 * the bit is really cleared if the capability exists...) 148 */ 149 if (cia_use_bwx != 0 && 150 (ccp->cc_cnfg & CNFG_BWEN) != 0 && 151 alpha_implver() == ALPHA_IMPLVER_EV5 && 152 alpha_amask(ALPHA_AMASK_BWX) == 0) { 153 u_int32_t ctrl; 154 155 ccp->cc_flags |= CCF_USEBWX; 156 157 /* 158 * For whatever reason, the firmware seems to enable PCI 159 * loopback mode if it also enables BWX. Make sure it's 160 * enabled if we have an old, buggy firmware rev. 161 */ 162 alpha_mb(); 163 ctrl = REGVAL(CIA_CSR_CTRL); 164 if ((ctrl & CTRL_PCI_LOOP_EN) == 0) { 165 REGVAL(CIA_CSR_CTRL) = ctrl | CTRL_PCI_LOOP_EN; 166 alpha_mb(); 167 } 168 } 169 170 if (!ccp->cc_initted) { 171 /* don't do these twice since they set up extents */ 172 if (ccp->cc_flags & CCF_USEBWX) { 173 cia_bwx_bus_io_init(&ccp->cc_iot, ccp); 174 cia_bwx_bus_mem_init(&ccp->cc_memt, ccp); 175 } else { 176 cia_swiz_bus_io_init(&ccp->cc_iot, ccp); 177 cia_swiz_bus_mem_init(&ccp->cc_memt, ccp); 178 } 179 } 180 ccp->cc_mallocsafe = mallocsafe; 181 182 cia_pci_init(&ccp->cc_pc, ccp); 183 184 cia_dma_init(ccp); 185 186 ccp->cc_initted = 1; 187 } 188 189 void 190 ciaattach(parent, self, aux) 191 struct device *parent, *self; 192 void *aux; 193 { 194 struct cia_softc *sc = (struct cia_softc *)self; 195 struct cia_config *ccp; 196 struct pcibus_attach_args pba; 197 char bits[64]; 198 199 /* note that we've attached the chipset; can't have 2 CIAs. */ 200 ciafound = 1; 201 202 /* 203 * set up the chipset's info; done once at console init time 204 * (maybe), but we must do it here as well to take care of things 205 * that need to use memory allocation. 206 */ 207 ccp = sc->sc_ccp = &cia_configuration; 208 cia_init(ccp, 1); 209 210 printf(": DECchip 2117x Core Logic Chipset (%s), pass %d\n", 211 (ccp->cc_flags & CCF_ISPYXIS) ? "Pyxis" : "ALCOR/ALCOR2", 212 ccp->cc_rev + 1); 213 if (ccp->cc_cnfg) 214 printf("%s: extended capabilities: %s\n", self->dv_xname, 215 bitmask_snprintf(ccp->cc_cnfg, CIA_CSR_CNFG_BITS, 216 bits, sizeof(bits))); 217 #if 1 218 if (ccp->cc_flags & CCF_USEBWX) 219 printf("%s: using BWX for PCI config and device access\n", 220 self->dv_xname); 221 #endif 222 223 switch (hwrpb->rpb_type) { 224 #ifdef DEC_KN20AA 225 case ST_DEC_KN20AA: 226 pci_kn20aa_pickintr(ccp); 227 #ifdef EVCNT_COUNTERS 228 evcnt_attach(self, "intr", &kn20aa_intr_evcnt); 229 #endif 230 break; 231 #endif 232 233 #ifdef DEC_EB164 234 case ST_EB164: 235 pci_eb164_pickintr(ccp); 236 #ifdef EVCNT_COUNTERS 237 evcnt_attach(self, "intr", &eb164_intr_evcnt); 238 #endif 239 break; 240 #endif 241 242 #ifdef DEC_550 243 case ST_DEC_550: 244 pci_550_pickintr(ccp); 245 #ifdef EVCNT_COUNTERS 246 evcnt_attach(self, "intr", &dec_550_intr_evcnt); 247 #endif 248 break; 249 #endif 250 251 default: 252 panic("ciaattach: shouldn't be here, really..."); 253 } 254 255 pba.pba_busname = "pci"; 256 pba.pba_iot = &ccp->cc_iot; 257 pba.pba_memt = &ccp->cc_memt; 258 pba.pba_dmat = 259 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI); 260 pba.pba_pc = &ccp->cc_pc; 261 pba.pba_bus = 0; 262 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 263 config_found(self, &pba, ciaprint); 264 } 265 266 static int 267 ciaprint(aux, pnp) 268 void *aux; 269 const char *pnp; 270 { 271 register struct pcibus_attach_args *pba = aux; 272 273 /* only PCIs can attach to CIAs; easy. */ 274 if (pnp) 275 printf("%s at %s", pba->pba_busname, pnp); 276 printf(" bus %d", pba->pba_bus); 277 return (UNCONF); 278 } 279
Indexes created Tue Sep 30 20:09:53 GMT 2025