cia.c revision 1.51
1 /* $NetBSD: cia.c,v 1.51 2000/02/06 01:26:50 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 #include "opt_dec_eb164.h" 68 #include "opt_dec_kn20aa.h" 69 #include "opt_dec_550.h" 70 #include "opt_dec_1000a.h" 71 #include "opt_dec_1000.h" 72 73 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 74 75 __KERNEL_RCSID(0, "$NetBSD: cia.c,v 1.51 2000/02/06 01:26:50 thorpej Exp $"); 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/kernel.h> 80 #include <sys/malloc.h> 81 #include <sys/device.h> 82 #include <vm/vm.h> 83 84 #include <machine/autoconf.h> 85 #include <machine/rpb.h> 86 87 #include <dev/isa/isareg.h> 88 #include <dev/isa/isavar.h> 89 90 #include <dev/pci/pcireg.h> 91 #include <dev/pci/pcivar.h> 92 #include <alpha/pci/ciareg.h> 93 #include <alpha/pci/ciavar.h> 94 95 #ifdef DEC_KN20AA 96 #include <alpha/pci/pci_kn20aa.h> 97 #endif 98 #ifdef DEC_EB164 99 #include <alpha/pci/pci_eb164.h> 100 #endif 101 #ifdef DEC_550 102 #include <alpha/pci/pci_550.h> 103 #endif 104 #ifdef DEC_1000A 105 #include <alpha/pci/pci_1000a.h> 106 #endif 107 #ifdef DEC_1000 108 #include <alpha/pci/pci_1000.h> 109 #endif 110 111 int ciamatch __P((struct device *, struct cfdata *, void *)); 112 void ciaattach __P((struct device *, struct device *, void *)); 113 114 struct cfattach cia_ca = { 115 sizeof(struct cia_softc), ciamatch, ciaattach, 116 }; 117 118 extern struct cfdriver cia_cd; 119 120 static int ciaprint __P((void *, const char *pnp)); 121 122 /* There can be only one. */ 123 int ciafound; 124 struct cia_config cia_configuration; 125 126 /* 127 * This determines if we attempt to use BWX for PCI bus and config space 128 * access. Some systems, notably with Pyxis, don't fare so well unless 129 * BWX is used. 130 * 131 * EXCEPT! Some devices have a really hard time if BWX is used (WHY?!). 132 * So, we decouple the uses for PCI config space and PCI bus space. 133 * 134 * FURTHERMORE! The Pyxis, most notably earlier revs, really don't 135 * do so well if you don't use BWX for bus access. So we default to 136 * forcing BWX on those chips. 137 * 138 * Geez. 139 */ 140 141 #ifndef CIA_PCI_USE_BWX 142 #define CIA_PCI_USE_BWX 1 143 #endif 144 145 #ifndef CIA_BUS_USE_BWX 146 #define CIA_BUS_USE_BWX 0 147 #endif 148 149 #ifndef CIA_PYXIS_FORCE_BWX 150 #define CIA_PYXIS_FORCE_BWX 1 151 #endif 152 153 int cia_pci_use_bwx = CIA_PCI_USE_BWX; 154 int cia_bus_use_bwx = CIA_BUS_USE_BWX; 155 int cia_pyxis_force_bwx = CIA_PYXIS_FORCE_BWX; 156 157 int 158 ciamatch(parent, match, aux) 159 struct device *parent; 160 struct cfdata *match; 161 void *aux; 162 { 163 struct mainbus_attach_args *ma = aux; 164 165 /* Make sure that we're looking for a CIA. */ 166 if (strcmp(ma->ma_name, cia_cd.cd_name) != 0) 167 return (0); 168 169 if (ciafound) 170 return (0); 171 172 return (1); 173 } 174 175 /* 176 * Set up the chipset's function pointers. 177 */ 178 void 179 cia_init(ccp, mallocsafe) 180 struct cia_config *ccp; 181 int mallocsafe; 182 { 183 int pci_use_bwx = cia_pci_use_bwx; 184 int bus_use_bwx = cia_bus_use_bwx; 185 186 ccp->cc_hae_mem = REGVAL(CIA_CSR_HAE_MEM); 187 ccp->cc_hae_io = REGVAL(CIA_CSR_HAE_IO); 188 ccp->cc_rev = REGVAL(CIA_CSR_REV) & REV_MASK; 189 190 /* 191 * Determine if we have a Pyxis. Only two systypes can 192 * have this: the EB164 systype (AlphaPC164LX and AlphaPC164SX) 193 * and the DEC_550 systype (Miata). 194 */ 195 if ((cputype == ST_EB164 && 196 (hwrpb->rpb_variation & SV_ST_MASK) >= SV_ST_ALPHAPC164LX_400) || 197 cputype == ST_DEC_550) { 198 ccp->cc_flags |= CCF_ISPYXIS; 199 if (cia_pyxis_force_bwx) 200 pci_use_bwx = bus_use_bwx = 1; 201 } 202 203 /* 204 * ALCOR/ALCOR2 Revisions >= 2 and Pyxis have the CNFG register. 205 */ 206 if (ccp->cc_rev >= 2 || (ccp->cc_flags & CCF_ISPYXIS) != 0) 207 ccp->cc_cnfg = REGVAL(CIA_CSR_CNFG); 208 else 209 ccp->cc_cnfg = 0; 210 211 /* 212 * Use BWX iff: 213 * 214 * - It hasn't been disbled by the user, 215 * - it's enabled in CNFG, 216 * - we're implementation version ev5, 217 * - BWX is enabled in the CPU's capabilities mask (yes, 218 * the bit is really cleared if the capability exists...) 219 */ 220 if ((pci_use_bwx || bus_use_bwx) && 221 (ccp->cc_cnfg & CNFG_BWEN) != 0 && 222 alpha_implver() == ALPHA_IMPLVER_EV5 && 223 alpha_amask(ALPHA_AMASK_BWX) == 0) { 224 u_int32_t ctrl; 225 226 if (pci_use_bwx) 227 ccp->cc_flags |= CCF_PCI_USE_BWX; 228 if (bus_use_bwx) 229 ccp->cc_flags |= CCF_BUS_USE_BWX; 230 231 /* 232 * For whatever reason, the firmware seems to enable PCI 233 * loopback mode if it also enables BWX. Make sure it's 234 * enabled if we have an old, buggy firmware rev. 235 */ 236 alpha_mb(); 237 ctrl = REGVAL(CIA_CSR_CTRL); 238 if ((ctrl & CTRL_PCI_LOOP_EN) == 0) { 239 REGVAL(CIA_CSR_CTRL) = ctrl | CTRL_PCI_LOOP_EN; 240 alpha_mb(); 241 } 242 } 243 244 if (!ccp->cc_initted) { 245 /* don't do these twice since they set up extents */ 246 if (ccp->cc_flags & CCF_BUS_USE_BWX) { 247 cia_bwx_bus_io_init(&ccp->cc_iot, ccp); 248 cia_bwx_bus_mem_init(&ccp->cc_memt, ccp); 249 } else { 250 cia_swiz_bus_io_init(&ccp->cc_iot, ccp); 251 cia_swiz_bus_mem_init(&ccp->cc_memt, ccp); 252 } 253 } 254 ccp->cc_mallocsafe = mallocsafe; 255 256 cia_pci_init(&ccp->cc_pc, ccp); 257 258 ccp->cc_initted = 1; 259 } 260 261 void 262 ciaattach(parent, self, aux) 263 struct device *parent, *self; 264 void *aux; 265 { 266 struct cia_softc *sc = (struct cia_softc *)self; 267 struct cia_config *ccp; 268 struct pcibus_attach_args pba; 269 char bits[64]; 270 const char *name; 271 int pass; 272 273 /* note that we've attached the chipset; can't have 2 CIAs. */ 274 ciafound = 1; 275 276 /* 277 * set up the chipset's info; done once at console init time 278 * (maybe), but we must do it here as well to take care of things 279 * that need to use memory allocation. 280 */ 281 ccp = sc->sc_ccp = &cia_configuration; 282 cia_init(ccp, 1); 283 284 if (ccp->cc_flags & CCF_ISPYXIS) { 285 name = "Pyxis"; 286 pass = ccp->cc_rev; 287 } else { 288 name = "ALCOR/ALCOR2"; 289 pass = ccp->cc_rev + 1; 290 } 291 292 printf(": DECchip 2117x Core Logic Chipset (%s), pass %d\n", 293 name, pass); 294 if (ccp->cc_cnfg) 295 printf("%s: extended capabilities: %s\n", self->dv_xname, 296 bitmask_snprintf(ccp->cc_cnfg, CIA_CSR_CNFG_BITS, 297 bits, sizeof(bits))); 298 299 switch (ccp->cc_flags & (CCF_PCI_USE_BWX|CCF_BUS_USE_BWX)) { 300 case CCF_PCI_USE_BWX|CCF_BUS_USE_BWX: 301 name = "PCI config and bus"; 302 break; 303 case CCF_PCI_USE_BWX: 304 name = "PCI config"; 305 break; 306 case CCF_BUS_USE_BWX: 307 name = "bus"; 308 break; 309 default: 310 name = NULL; 311 break; 312 } 313 if (name != NULL) 314 printf("%s: using BWX for %s access\n", self->dv_xname, name); 315 316 #ifdef DEC_550 317 if (cputype == ST_DEC_550 && 318 (hwrpb->rpb_variation & SV_ST_MASK) < SV_ST_MIATA_1_5) { 319 /* 320 * Miata 1 systems have a bug: DMA cannot cross 321 * an 8k boundary! Make sure PCI read prefetching 322 * is disabled on these chips. Note that secondary 323 * PCI busses don't have this problem, because of 324 * the way PPBs handle PCI read requests. 325 * 326 * In the 21174 Technical Reference Manual, this is 327 * actually documented as "Pyxis Pass 1", but apparently 328 * there are chips that report themselves as "Pass 1" 329 * which do not have the bug! Miatas with the Cypress 330 * PCI-ISA bridge (i.e. Miata 1.5 and Miata 2) do not 331 * have the bug, so we use this check. 332 * 333 * NOTE: This bug is actually worked around in cia_dma.c, 334 * when direct-mapped DMA maps are created. 335 * 336 * XXX WE NEED TO THINK ABOUT HOW TO HANDLE THIS FOR 337 * XXX SGMAP DMA MAPPINGS! 338 */ 339 u_int32_t ctrl; 340 341 /* XXX no bets... */ 342 printf("%s: WARNING: Pyxis pass 1 DMA bug; no bets...\n", 343 self->dv_xname); 344 345 ccp->cc_flags |= CCF_PYXISBUG; 346 347 alpha_mb(); 348 ctrl = REGVAL(CIA_CSR_CTRL); 349 ctrl &= ~(CTRL_RD_TYPE|CTRL_RL_TYPE|CTRL_RM_TYPE); 350 REGVAL(CIA_CSR_CTRL) = ctrl; 351 alpha_mb(); 352 } 353 #endif /* DEC_550 */ 354 355 cia_dma_init(ccp); 356 357 switch (cputype) { 358 #ifdef DEC_KN20AA 359 case ST_DEC_KN20AA: 360 pci_kn20aa_pickintr(ccp); 361 break; 362 #endif 363 364 #ifdef DEC_EB164 365 case ST_EB164: 366 pci_eb164_pickintr(ccp); 367 break; 368 #endif 369 370 #ifdef DEC_550 371 case ST_DEC_550: 372 pci_550_pickintr(ccp); 373 break; 374 #endif 375 376 #ifdef DEC_1000A 377 case ST_DEC_1000A: 378 pci_1000a_pickintr(ccp, &ccp->cc_iot, &ccp->cc_memt, 379 &ccp->cc_pc); 380 break; 381 #endif 382 383 #ifdef DEC_1000 384 case ST_DEC_1000: 385 pci_1000_pickintr(ccp, &ccp->cc_iot, &ccp->cc_memt, 386 &ccp->cc_pc); 387 break; 388 #endif 389 390 default: 391 panic("ciaattach: shouldn't be here, really..."); 392 } 393 394 pba.pba_busname = "pci"; 395 pba.pba_iot = &ccp->cc_iot; 396 pba.pba_memt = &ccp->cc_memt; 397 pba.pba_dmat = 398 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI); 399 pba.pba_pc = &ccp->cc_pc; 400 pba.pba_bus = 0; 401 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 402 if ((ccp->cc_flags & CCF_PYXISBUG) == 0) 403 pba.pba_flags |= PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | 404 PCI_FLAGS_MWI_OKAY; 405 config_found(self, &pba, ciaprint); 406 } 407 408 static int 409 ciaprint(aux, pnp) 410 void *aux; 411 const char *pnp; 412 { 413 register struct pcibus_attach_args *pba = aux; 414 415 /* only PCIs can attach to CIAs; easy. */ 416 if (pnp) 417 printf("%s at %s", pba->pba_busname, pnp); 418 printf(" bus %d", pba->pba_bus); 419 return (UNCONF); 420 } 421
Indexes created Tue Sep 30 11:09:46 GMT 2025