cia_pci.c revision 1.13 1 1.13 thorpej /* $NetBSD: cia_pci.c,v 1.13 1997/09/02 20:05:28 thorpej Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.2 cgd * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.10 cgd
30 1.11 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
31 1.11 cgd
32 1.13 thorpej __KERNEL_RCSID(0, "$NetBSD: cia_pci.c,v 1.13 1997/09/02 20:05:28 thorpej Exp $");
33 1.1 cgd
34 1.1 cgd #include <sys/param.h>
35 1.1 cgd #include <sys/systm.h>
36 1.1 cgd #include <sys/kernel.h>
37 1.1 cgd #include <sys/device.h>
38 1.1 cgd #include <vm/vm.h>
39 1.1 cgd
40 1.1 cgd #include <dev/pci/pcireg.h>
41 1.1 cgd #include <dev/pci/pcivar.h>
42 1.1 cgd #include <alpha/pci/ciareg.h>
43 1.1 cgd #include <alpha/pci/ciavar.h>
44 1.1 cgd
45 1.7 cgd #include <machine/rpb.h> /* XXX for eb164 CIA firmware workarounds. */
46 1.7 cgd
47 1.2 cgd void cia_attach_hook __P((struct device *, struct device *,
48 1.2 cgd struct pcibus_attach_args *));
49 1.2 cgd int cia_bus_maxdevs __P((void *, int));
50 1.2 cgd pcitag_t cia_make_tag __P((void *, int, int, int));
51 1.2 cgd void cia_decompose_tag __P((void *, pcitag_t, int *, int *,
52 1.2 cgd int *));
53 1.2 cgd pcireg_t cia_conf_read __P((void *, pcitag_t, int));
54 1.2 cgd void cia_conf_write __P((void *, pcitag_t, int, pcireg_t));
55 1.1 cgd
56 1.2 cgd void
57 1.2 cgd cia_pci_init(pc, v)
58 1.2 cgd pci_chipset_tag_t pc;
59 1.2 cgd void *v;
60 1.2 cgd {
61 1.2 cgd
62 1.2 cgd pc->pc_conf_v = v;
63 1.2 cgd pc->pc_attach_hook = cia_attach_hook;
64 1.2 cgd pc->pc_bus_maxdevs = cia_bus_maxdevs;
65 1.2 cgd pc->pc_make_tag = cia_make_tag;
66 1.2 cgd pc->pc_decompose_tag = cia_decompose_tag;
67 1.2 cgd pc->pc_conf_read = cia_conf_read;
68 1.2 cgd pc->pc_conf_write = cia_conf_write;
69 1.2 cgd }
70 1.2 cgd
71 1.2 cgd void
72 1.2 cgd cia_attach_hook(parent, self, pba)
73 1.2 cgd struct device *parent, *self;
74 1.2 cgd struct pcibus_attach_args *pba;
75 1.2 cgd {
76 1.2 cgd }
77 1.2 cgd
78 1.2 cgd int
79 1.2 cgd cia_bus_maxdevs(cpv, busno)
80 1.2 cgd void *cpv;
81 1.2 cgd int busno;
82 1.2 cgd {
83 1.2 cgd
84 1.2 cgd return 32;
85 1.2 cgd }
86 1.2 cgd
87 1.2 cgd pcitag_t
88 1.2 cgd cia_make_tag(cpv, b, d, f)
89 1.2 cgd void *cpv;
90 1.2 cgd int b, d, f;
91 1.2 cgd {
92 1.2 cgd
93 1.2 cgd return (b << 16) | (d << 11) | (f << 8);
94 1.2 cgd }
95 1.2 cgd
96 1.2 cgd void
97 1.2 cgd cia_decompose_tag(cpv, tag, bp, dp, fp)
98 1.2 cgd void *cpv;
99 1.2 cgd pcitag_t tag;
100 1.2 cgd int *bp, *dp, *fp;
101 1.2 cgd {
102 1.2 cgd
103 1.2 cgd if (bp != NULL)
104 1.2 cgd *bp = (tag >> 16) & 0xff;
105 1.2 cgd if (dp != NULL)
106 1.2 cgd *dp = (tag >> 11) & 0x1f;
107 1.2 cgd if (fp != NULL)
108 1.2 cgd *fp = (tag >> 8) & 0x7;
109 1.2 cgd }
110 1.2 cgd
111 1.2 cgd pcireg_t
112 1.1 cgd cia_conf_read(cpv, tag, offset)
113 1.1 cgd void *cpv;
114 1.2 cgd pcitag_t tag;
115 1.2 cgd int offset;
116 1.1 cgd {
117 1.2 cgd struct cia_config *ccp = cpv;
118 1.2 cgd pcireg_t *datap, data;
119 1.1 cgd int s, secondary, ba;
120 1.1 cgd int32_t old_haxr2; /* XXX */
121 1.9 cgd #ifdef DEC_EB164
122 1.7 cgd extern int cputype; /* XXX */
123 1.7 cgd #endif
124 1.1 cgd
125 1.6 cgd #ifdef DIAGNOSTIC
126 1.6 cgd s = 0; /* XXX gcc -Wuninitialized */
127 1.6 cgd old_haxr2 = 0; /* XXX gcc -Wuninitialized */
128 1.6 cgd #endif
129 1.6 cgd
130 1.9 cgd #ifdef DEC_EB164
131 1.7 cgd /*
132 1.7 cgd * Some (apparently-common) revisions of EB164 firmware do the
133 1.7 cgd * Wrong thing with PCI master aborts, which are caused by
134 1.7 cgd * accesing the configuration space of devices that don't
135 1.7 cgd * exist (for example).
136 1.7 cgd *
137 1.7 cgd * On EB164's we clear the CIA error register's PCI master
138 1.7 cgd * abort bit before touching PCI configuration space and
139 1.7 cgd * check it afterwards. If it indicates a master abort,
140 1.7 cgd * the device wasn't there so we return 0xffffffff.
141 1.7 cgd */
142 1.7 cgd if (cputype == ST_EB164) {
143 1.7 cgd /* clear the PCI master abort bit in CIA error register */
144 1.7 cgd REGVAL(CIA_CSR_CIA_ERR) = 0x00000080; /* XXX */
145 1.7 cgd alpha_mb();
146 1.7 cgd alpha_pal_draina();
147 1.7 cgd }
148 1.7 cgd #endif
149 1.7 cgd
150 1.2 cgd /* secondary if bus # != 0 */
151 1.13 thorpej alpha_pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
152 1.1 cgd if (secondary) {
153 1.1 cgd s = splhigh();
154 1.1 cgd old_haxr2 = REGVAL(CIA_CSRS + 0x480); /* XXX */
155 1.3 cgd alpha_mb();
156 1.1 cgd REGVAL(CIA_CSRS + 0x480) = old_haxr2 | 0x1; /* XXX */
157 1.3 cgd alpha_mb();
158 1.1 cgd }
159 1.1 cgd
160 1.3 cgd datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
161 1.1 cgd tag << 5UL | /* XXX */
162 1.1 cgd (offset & ~0x03) << 5 | /* XXX */
163 1.1 cgd 0 << 5 | /* XXX */
164 1.1 cgd 0x3 << 3); /* XXX */
165 1.2 cgd data = (pcireg_t)-1;
166 1.1 cgd if (!(ba = badaddr(datap, sizeof *datap)))
167 1.1 cgd data = *datap;
168 1.1 cgd
169 1.1 cgd if (secondary) {
170 1.3 cgd alpha_mb();
171 1.1 cgd REGVAL(CIA_CSRS + 0x480) = old_haxr2; /* XXX */
172 1.3 cgd alpha_mb();
173 1.1 cgd splx(s);
174 1.1 cgd }
175 1.7 cgd
176 1.9 cgd #ifdef DEC_EB164
177 1.7 cgd if (cputype == ST_EB164) {
178 1.7 cgd alpha_pal_draina();
179 1.7 cgd /* check CIA error register for PCI master abort */
180 1.7 cgd if (REGVAL(CIA_CSR_CIA_ERR) & 0x00000080) { /* XXX */
181 1.7 cgd ba = 1;
182 1.7 cgd data = 0xffffffff;
183 1.7 cgd }
184 1.7 cgd }
185 1.7 cgd #endif
186 1.1 cgd
187 1.1 cgd #if 0
188 1.5 christos printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
189 1.1 cgd data, datap, ba ? " (badaddr)" : "");
190 1.1 cgd #endif
191 1.1 cgd
192 1.1 cgd return data;
193 1.1 cgd }
194 1.1 cgd
195 1.1 cgd void
196 1.1 cgd cia_conf_write(cpv, tag, offset, data)
197 1.1 cgd void *cpv;
198 1.2 cgd pcitag_t tag;
199 1.2 cgd int offset;
200 1.2 cgd pcireg_t data;
201 1.1 cgd {
202 1.2 cgd struct cia_config *ccp = cpv;
203 1.2 cgd pcireg_t *datap;
204 1.1 cgd int s, secondary;
205 1.1 cgd int32_t old_haxr2; /* XXX */
206 1.6 cgd
207 1.6 cgd #ifdef DIAGNOSTIC
208 1.6 cgd s = 0; /* XXX gcc -Wuninitialized */
209 1.6 cgd old_haxr2 = 0; /* XXX gcc -Wuninitialized */
210 1.6 cgd #endif
211 1.1 cgd
212 1.2 cgd /* secondary if bus # != 0 */
213 1.13 thorpej alpha_pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
214 1.1 cgd if (secondary) {
215 1.1 cgd s = splhigh();
216 1.1 cgd old_haxr2 = REGVAL(CIA_CSRS + 0x480); /* XXX */
217 1.3 cgd alpha_mb();
218 1.1 cgd REGVAL(CIA_CSRS + 0x480) = old_haxr2 | 0x1; /* XXX */
219 1.3 cgd alpha_mb();
220 1.1 cgd }
221 1.1 cgd
222 1.3 cgd datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
223 1.1 cgd tag << 5UL | /* XXX */
224 1.1 cgd (offset & ~0x03) << 5 | /* XXX */
225 1.1 cgd 0 << 5 | /* XXX */
226 1.1 cgd 0x3 << 3); /* XXX */
227 1.1 cgd *datap = data;
228 1.1 cgd
229 1.1 cgd if (secondary) {
230 1.3 cgd alpha_mb();
231 1.1 cgd REGVAL(CIA_CSRS + 0x480) = old_haxr2; /* XXX */
232 1.3 cgd alpha_mb();
233 1.1 cgd splx(s);
234 1.1 cgd }
235 1.1 cgd
236 1.1 cgd #if 0
237 1.5 christos printf("cia_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
238 1.1 cgd reg, data, datap);
239 1.1 cgd #endif
240 1.1 cgd }
241