cia_pci.c revision 1.29 1 1.29 dsl /* $NetBSD: cia_pci.c,v 1.29 2009/03/14 21:04:02 dsl Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.2 cgd * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.10 cgd
30 1.11 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
31 1.11 cgd
32 1.29 dsl __KERNEL_RCSID(0, "$NetBSD: cia_pci.c,v 1.29 2009/03/14 21:04:02 dsl Exp $");
33 1.1 cgd
34 1.1 cgd #include <sys/param.h>
35 1.1 cgd #include <sys/systm.h>
36 1.1 cgd #include <sys/kernel.h>
37 1.1 cgd #include <sys/device.h>
38 1.25 mrg
39 1.25 mrg #include <uvm/uvm_extern.h>
40 1.1 cgd
41 1.1 cgd #include <dev/pci/pcireg.h>
42 1.1 cgd #include <dev/pci/pcivar.h>
43 1.1 cgd #include <alpha/pci/ciareg.h>
44 1.1 cgd #include <alpha/pci/ciavar.h>
45 1.1 cgd
46 1.27 dsl void cia_attach_hook(struct device *, struct device *,
47 1.27 dsl struct pcibus_attach_args *);
48 1.27 dsl int cia_bus_maxdevs(void *, int);
49 1.27 dsl pcitag_t cia_make_tag(void *, int, int, int);
50 1.27 dsl void cia_decompose_tag(void *, pcitag_t, int *, int *,
51 1.27 dsl int *);
52 1.27 dsl pcireg_t cia_conf_read(void *, pcitag_t, int);
53 1.27 dsl void cia_conf_write(void *, pcitag_t, int, pcireg_t);
54 1.1 cgd
55 1.2 cgd void
56 1.28 dsl cia_pci_init(pci_chipset_tag_t pc, void *v)
57 1.2 cgd {
58 1.2 cgd
59 1.2 cgd pc->pc_conf_v = v;
60 1.2 cgd pc->pc_attach_hook = cia_attach_hook;
61 1.2 cgd pc->pc_bus_maxdevs = cia_bus_maxdevs;
62 1.2 cgd pc->pc_make_tag = cia_make_tag;
63 1.2 cgd pc->pc_decompose_tag = cia_decompose_tag;
64 1.2 cgd pc->pc_conf_read = cia_conf_read;
65 1.2 cgd pc->pc_conf_write = cia_conf_write;
66 1.2 cgd }
67 1.2 cgd
68 1.2 cgd void
69 1.29 dsl cia_attach_hook(struct device *parent, struct device *self, struct pcibus_attach_args *pba)
70 1.2 cgd {
71 1.2 cgd }
72 1.2 cgd
73 1.2 cgd int
74 1.28 dsl cia_bus_maxdevs(void *cpv, int busno)
75 1.2 cgd {
76 1.2 cgd
77 1.2 cgd return 32;
78 1.2 cgd }
79 1.2 cgd
80 1.2 cgd pcitag_t
81 1.29 dsl cia_make_tag(void *cpv, int b, int d, int f)
82 1.2 cgd {
83 1.2 cgd
84 1.2 cgd return (b << 16) | (d << 11) | (f << 8);
85 1.2 cgd }
86 1.2 cgd
87 1.2 cgd void
88 1.29 dsl cia_decompose_tag(void *cpv, pcitag_t tag, int *bp, int *dp, int *fp)
89 1.2 cgd {
90 1.2 cgd
91 1.2 cgd if (bp != NULL)
92 1.2 cgd *bp = (tag >> 16) & 0xff;
93 1.2 cgd if (dp != NULL)
94 1.2 cgd *dp = (tag >> 11) & 0x1f;
95 1.2 cgd if (fp != NULL)
96 1.2 cgd *fp = (tag >> 8) & 0x7;
97 1.2 cgd }
98 1.2 cgd
99 1.2 cgd pcireg_t
100 1.28 dsl cia_conf_read(void *cpv, pcitag_t tag, int offset)
101 1.1 cgd {
102 1.2 cgd struct cia_config *ccp = cpv;
103 1.2 cgd pcireg_t *datap, data;
104 1.1 cgd int s, secondary, ba;
105 1.19 thorpej u_int32_t old_cfg, errbits;
106 1.1 cgd
107 1.18 cjs #ifdef __GNUC__
108 1.6 cgd s = 0; /* XXX gcc -Wuninitialized */
109 1.19 thorpej old_cfg = 0; /* XXX gcc -Wuninitialized */
110 1.6 cgd #endif
111 1.6 cgd
112 1.7 cgd /*
113 1.14 thorpej * Some (apparently-common) revisions of EB164 and AlphaStation
114 1.17 thorpej * firmware do the Wrong thing with PCI master and target aborts,
115 1.17 thorpej * which are caused by accesing the configuration space of devices
116 1.17 thorpej * that don't exist (for example).
117 1.7 cgd *
118 1.14 thorpej * To work around this, we clear the CIA error register's PCI
119 1.17 thorpej * master and target abort bits before touching PCI configuration
120 1.17 thorpej * space and check it afterwards. If it indicates a master or target
121 1.17 thorpej * abort, the device wasn't there so we return 0xffffffff.
122 1.7 cgd */
123 1.17 thorpej REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT;
124 1.14 thorpej alpha_mb();
125 1.14 thorpej alpha_pal_draina();
126 1.7 cgd
127 1.2 cgd /* secondary if bus # != 0 */
128 1.26 thorpej pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
129 1.1 cgd if (secondary) {
130 1.1 cgd s = splhigh();
131 1.19 thorpej old_cfg = REGVAL(CIA_CSR_CFG);
132 1.3 cgd alpha_mb();
133 1.19 thorpej REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
134 1.3 cgd alpha_mb();
135 1.1 cgd }
136 1.1 cgd
137 1.22 thorpej /*
138 1.22 thorpej * We just inline the BWX support, since this is the only
139 1.22 thorpej * difference between BWX and swiz for config space.
140 1.22 thorpej */
141 1.23 thorpej if (ccp->cc_flags & CCF_PCI_USE_BWX) {
142 1.22 thorpej if (secondary) {
143 1.22 thorpej datap =
144 1.22 thorpej (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
145 1.22 thorpej tag | (offset & ~0x03));
146 1.22 thorpej } else {
147 1.22 thorpej datap =
148 1.22 thorpej (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
149 1.22 thorpej tag | (offset & ~0x03));
150 1.22 thorpej }
151 1.22 thorpej } else {
152 1.22 thorpej datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
153 1.22 thorpej tag << 5UL | /* XXX */
154 1.22 thorpej (offset & ~0x03) << 5 | /* XXX */
155 1.22 thorpej 0 << 5 | /* XXX */
156 1.22 thorpej 0x3 << 3); /* XXX */
157 1.22 thorpej }
158 1.2 cgd data = (pcireg_t)-1;
159 1.24 ross alpha_mb();
160 1.1 cgd if (!(ba = badaddr(datap, sizeof *datap)))
161 1.1 cgd data = *datap;
162 1.24 ross alpha_mb();
163 1.24 ross alpha_mb();
164 1.1 cgd
165 1.1 cgd if (secondary) {
166 1.3 cgd alpha_mb();
167 1.19 thorpej REGVAL(CIA_CSR_CFG) = old_cfg;
168 1.3 cgd alpha_mb();
169 1.1 cgd splx(s);
170 1.1 cgd }
171 1.7 cgd
172 1.14 thorpej alpha_pal_draina();
173 1.16 thorpej alpha_mb();
174 1.16 thorpej errbits = REGVAL(CIA_CSR_CIA_ERR);
175 1.17 thorpej if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) {
176 1.14 thorpej ba = 1;
177 1.14 thorpej data = 0xffffffff;
178 1.16 thorpej }
179 1.16 thorpej
180 1.16 thorpej if (errbits) {
181 1.16 thorpej REGVAL(CIA_CSR_CIA_ERR) = errbits;
182 1.16 thorpej alpha_mb();
183 1.16 thorpej alpha_pal_draina();
184 1.7 cgd }
185 1.1 cgd
186 1.1 cgd #if 0
187 1.5 christos printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
188 1.1 cgd data, datap, ba ? " (badaddr)" : "");
189 1.1 cgd #endif
190 1.1 cgd
191 1.1 cgd return data;
192 1.1 cgd }
193 1.1 cgd
194 1.1 cgd void
195 1.28 dsl cia_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
196 1.1 cgd {
197 1.2 cgd struct cia_config *ccp = cpv;
198 1.2 cgd pcireg_t *datap;
199 1.1 cgd int s, secondary;
200 1.20 thorpej u_int32_t old_cfg;
201 1.6 cgd
202 1.18 cjs #ifdef __GNUC__
203 1.6 cgd s = 0; /* XXX gcc -Wuninitialized */
204 1.20 thorpej old_cfg = 0; /* XXX gcc -Wuninitialized */
205 1.6 cgd #endif
206 1.1 cgd
207 1.2 cgd /* secondary if bus # != 0 */
208 1.26 thorpej pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
209 1.1 cgd if (secondary) {
210 1.1 cgd s = splhigh();
211 1.20 thorpej old_cfg = REGVAL(CIA_CSR_CFG);
212 1.3 cgd alpha_mb();
213 1.20 thorpej REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
214 1.3 cgd alpha_mb();
215 1.1 cgd }
216 1.1 cgd
217 1.22 thorpej /*
218 1.22 thorpej * We just inline the BWX support, since this is the only
219 1.22 thorpej * difference between BWX and swiz for config space.
220 1.22 thorpej */
221 1.23 thorpej if (ccp->cc_flags & CCF_PCI_USE_BWX) {
222 1.22 thorpej if (secondary) {
223 1.22 thorpej datap =
224 1.22 thorpej (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
225 1.22 thorpej tag | (offset & ~0x03));
226 1.22 thorpej } else {
227 1.22 thorpej datap =
228 1.22 thorpej (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
229 1.22 thorpej tag | (offset & ~0x03));
230 1.22 thorpej }
231 1.22 thorpej } else {
232 1.22 thorpej datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
233 1.22 thorpej tag << 5UL | /* XXX */
234 1.22 thorpej (offset & ~0x03) << 5 | /* XXX */
235 1.22 thorpej 0 << 5 | /* XXX */
236 1.22 thorpej 0x3 << 3); /* XXX */
237 1.22 thorpej }
238 1.24 ross alpha_mb();
239 1.1 cgd *datap = data;
240 1.24 ross alpha_mb();
241 1.24 ross alpha_mb();
242 1.1 cgd
243 1.1 cgd if (secondary) {
244 1.3 cgd alpha_mb();
245 1.21 thorpej REGVAL(CIA_CSR_CFG) = old_cfg;
246 1.3 cgd alpha_mb();
247 1.1 cgd splx(s);
248 1.1 cgd }
249 1.1 cgd
250 1.1 cgd #if 0
251 1.5 christos printf("cia_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
252 1.1 cgd reg, data, datap);
253 1.1 cgd #endif
254 1.1 cgd }
255