cia_pci.c revision 1.36 1 1.36 andvar /* $NetBSD: cia_pci.c,v 1.36 2021/09/11 21:30:46 andvar Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.2 cgd * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.32 matt *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.32 matt *
15 1.32 matt * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.32 matt * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.32 matt *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.10 cgd
30 1.11 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
31 1.11 cgd
32 1.36 andvar __KERNEL_RCSID(0, "$NetBSD: cia_pci.c,v 1.36 2021/09/11 21:30:46 andvar Exp $");
33 1.1 cgd
34 1.1 cgd #include <sys/param.h>
35 1.1 cgd #include <sys/systm.h>
36 1.1 cgd #include <sys/kernel.h>
37 1.1 cgd #include <sys/device.h>
38 1.25 mrg
39 1.1 cgd #include <dev/pci/pcireg.h>
40 1.1 cgd #include <dev/pci/pcivar.h>
41 1.1 cgd #include <alpha/pci/ciareg.h>
42 1.1 cgd #include <alpha/pci/ciavar.h>
43 1.1 cgd
44 1.34 thorpej static pcireg_t cia_conf_read(void *, pcitag_t, int);
45 1.34 thorpej static void cia_conf_write(void *, pcitag_t, int, pcireg_t);
46 1.1 cgd
47 1.2 cgd void
48 1.28 dsl cia_pci_init(pci_chipset_tag_t pc, void *v)
49 1.2 cgd {
50 1.2 cgd
51 1.2 cgd pc->pc_conf_v = v;
52 1.2 cgd pc->pc_conf_read = cia_conf_read;
53 1.2 cgd pc->pc_conf_write = cia_conf_write;
54 1.2 cgd }
55 1.2 cgd
56 1.34 thorpej static pcireg_t
57 1.28 dsl cia_conf_read(void *cpv, pcitag_t tag, int offset)
58 1.1 cgd {
59 1.2 cgd struct cia_config *ccp = cpv;
60 1.2 cgd pcireg_t *datap, data;
61 1.1 cgd int s, secondary, ba;
62 1.32 matt uint32_t old_cfg, errbits;
63 1.1 cgd
64 1.33 msaitoh if ((unsigned int)offset >= PCI_CONF_SIZE)
65 1.33 msaitoh return (pcireg_t) -1;
66 1.33 msaitoh
67 1.18 cjs #ifdef __GNUC__
68 1.6 cgd s = 0; /* XXX gcc -Wuninitialized */
69 1.19 thorpej old_cfg = 0; /* XXX gcc -Wuninitialized */
70 1.6 cgd #endif
71 1.6 cgd
72 1.7 cgd /*
73 1.14 thorpej * Some (apparently-common) revisions of EB164 and AlphaStation
74 1.17 thorpej * firmware do the Wrong thing with PCI master and target aborts,
75 1.36 andvar * which are caused by accessing the configuration space of devices
76 1.17 thorpej * that don't exist (for example).
77 1.7 cgd *
78 1.14 thorpej * To work around this, we clear the CIA error register's PCI
79 1.17 thorpej * master and target abort bits before touching PCI configuration
80 1.17 thorpej * space and check it afterwards. If it indicates a master or target
81 1.17 thorpej * abort, the device wasn't there so we return 0xffffffff.
82 1.7 cgd */
83 1.17 thorpej REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT;
84 1.14 thorpej alpha_mb();
85 1.14 thorpej alpha_pal_draina();
86 1.7 cgd
87 1.2 cgd /* secondary if bus # != 0 */
88 1.26 thorpej pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
89 1.1 cgd if (secondary) {
90 1.1 cgd s = splhigh();
91 1.19 thorpej old_cfg = REGVAL(CIA_CSR_CFG);
92 1.3 cgd alpha_mb();
93 1.19 thorpej REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
94 1.3 cgd alpha_mb();
95 1.1 cgd }
96 1.1 cgd
97 1.22 thorpej /*
98 1.22 thorpej * We just inline the BWX support, since this is the only
99 1.22 thorpej * difference between BWX and swiz for config space.
100 1.22 thorpej */
101 1.23 thorpej if (ccp->cc_flags & CCF_PCI_USE_BWX) {
102 1.22 thorpej if (secondary) {
103 1.22 thorpej datap =
104 1.22 thorpej (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
105 1.22 thorpej tag | (offset & ~0x03));
106 1.22 thorpej } else {
107 1.22 thorpej datap =
108 1.22 thorpej (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
109 1.22 thorpej tag | (offset & ~0x03));
110 1.22 thorpej }
111 1.22 thorpej } else {
112 1.22 thorpej datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
113 1.22 thorpej tag << 5UL | /* XXX */
114 1.22 thorpej (offset & ~0x03) << 5 | /* XXX */
115 1.22 thorpej 0 << 5 | /* XXX */
116 1.22 thorpej 0x3 << 3); /* XXX */
117 1.22 thorpej }
118 1.2 cgd data = (pcireg_t)-1;
119 1.24 ross alpha_mb();
120 1.1 cgd if (!(ba = badaddr(datap, sizeof *datap)))
121 1.1 cgd data = *datap;
122 1.24 ross alpha_mb();
123 1.24 ross alpha_mb();
124 1.1 cgd
125 1.1 cgd if (secondary) {
126 1.3 cgd alpha_mb();
127 1.19 thorpej REGVAL(CIA_CSR_CFG) = old_cfg;
128 1.3 cgd alpha_mb();
129 1.1 cgd splx(s);
130 1.1 cgd }
131 1.7 cgd
132 1.14 thorpej alpha_pal_draina();
133 1.16 thorpej alpha_mb();
134 1.16 thorpej errbits = REGVAL(CIA_CSR_CIA_ERR);
135 1.17 thorpej if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) {
136 1.14 thorpej ba = 1;
137 1.14 thorpej data = 0xffffffff;
138 1.16 thorpej }
139 1.16 thorpej
140 1.16 thorpej if (errbits) {
141 1.16 thorpej REGVAL(CIA_CSR_CIA_ERR) = errbits;
142 1.16 thorpej alpha_mb();
143 1.16 thorpej alpha_pal_draina();
144 1.7 cgd }
145 1.1 cgd
146 1.1 cgd #if 0
147 1.5 christos printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
148 1.1 cgd data, datap, ba ? " (badaddr)" : "");
149 1.1 cgd #endif
150 1.1 cgd
151 1.1 cgd return data;
152 1.1 cgd }
153 1.1 cgd
154 1.34 thorpej static void
155 1.28 dsl cia_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
156 1.1 cgd {
157 1.2 cgd struct cia_config *ccp = cpv;
158 1.2 cgd pcireg_t *datap;
159 1.1 cgd int s, secondary;
160 1.32 matt uint32_t old_cfg;
161 1.6 cgd
162 1.33 msaitoh if ((unsigned int)offset >= PCI_CONF_SIZE)
163 1.33 msaitoh return;
164 1.33 msaitoh
165 1.18 cjs #ifdef __GNUC__
166 1.6 cgd s = 0; /* XXX gcc -Wuninitialized */
167 1.20 thorpej old_cfg = 0; /* XXX gcc -Wuninitialized */
168 1.6 cgd #endif
169 1.1 cgd
170 1.2 cgd /* secondary if bus # != 0 */
171 1.26 thorpej pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
172 1.1 cgd if (secondary) {
173 1.1 cgd s = splhigh();
174 1.20 thorpej old_cfg = REGVAL(CIA_CSR_CFG);
175 1.3 cgd alpha_mb();
176 1.20 thorpej REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
177 1.3 cgd alpha_mb();
178 1.1 cgd }
179 1.1 cgd
180 1.22 thorpej /*
181 1.22 thorpej * We just inline the BWX support, since this is the only
182 1.22 thorpej * difference between BWX and swiz for config space.
183 1.22 thorpej */
184 1.23 thorpej if (ccp->cc_flags & CCF_PCI_USE_BWX) {
185 1.22 thorpej if (secondary) {
186 1.22 thorpej datap =
187 1.22 thorpej (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
188 1.22 thorpej tag | (offset & ~0x03));
189 1.22 thorpej } else {
190 1.22 thorpej datap =
191 1.22 thorpej (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
192 1.22 thorpej tag | (offset & ~0x03));
193 1.22 thorpej }
194 1.22 thorpej } else {
195 1.22 thorpej datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
196 1.22 thorpej tag << 5UL | /* XXX */
197 1.22 thorpej (offset & ~0x03) << 5 | /* XXX */
198 1.22 thorpej 0 << 5 | /* XXX */
199 1.22 thorpej 0x3 << 3); /* XXX */
200 1.22 thorpej }
201 1.24 ross alpha_mb();
202 1.1 cgd *datap = data;
203 1.24 ross alpha_mb();
204 1.24 ross alpha_mb();
205 1.1 cgd
206 1.1 cgd if (secondary) {
207 1.3 cgd alpha_mb();
208 1.21 thorpej REGVAL(CIA_CSR_CFG) = old_cfg;
209 1.3 cgd alpha_mb();
210 1.1 cgd splx(s);
211 1.1 cgd }
212 1.1 cgd
213 1.1 cgd #if 0
214 1.5 christos printf("cia_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
215 1.1 cgd reg, data, datap);
216 1.1 cgd #endif
217 1.1 cgd }
218