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cia_swiz_bus_io.c revision 1.5 
      1  1.5  cgd /*	$NetBSD: cia_swiz_bus_io.c,v 1.5 1996/08/27 16:29:25 cgd Exp $	*/
      2  1.2  cgd 
      3  1.2  cgd /*
      4  1.2  cgd  * Copyright (c) 1996 Carnegie-Mellon University.
      5  1.2  cgd  * All rights reserved.
      6  1.2  cgd  *
      7  1.2  cgd  * Author: Chris G. Demetriou
      8  1.2  cgd  *
      9  1.2  cgd  * Permission to use, copy, modify and distribute this software and
     10  1.2  cgd  * its documentation is hereby granted, provided that both the copyright
     11  1.2  cgd  * notice and this permission notice appear in all copies of the
     12  1.2  cgd  * software, derivative works or modified versions, and any portions
     13  1.2  cgd  * thereof, and that both notices appear in supporting documentation.
     14  1.2  cgd  *
     15  1.2  cgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  1.2  cgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  1.2  cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  1.2  cgd  *
     19  1.2  cgd  * Carnegie Mellon requests users of this software to return to
     20  1.2  cgd  *
     21  1.2  cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  1.2  cgd  *  School of Computer Science
     23  1.2  cgd  *  Carnegie Mellon University
     24  1.2  cgd  *  Pittsburgh PA 15213-3890
     25  1.2  cgd  *
     26  1.2  cgd  * any improvements or extensions that they make and grant Carnegie the
     27  1.2  cgd  * rights to redistribute these changes.
     28  1.2  cgd  */
     29  1.1  cgd 
     30  1.1  cgd #include <sys/param.h>
     31  1.5  cgd #include <sys/systm.h>
     32  1.1  cgd #include <sys/malloc.h>
     33  1.1  cgd #include <sys/syslog.h>
     34  1.1  cgd #include <sys/device.h>
     35  1.1  cgd #include <vm/vm.h>
     36  1.1  cgd 
     37  1.1  cgd #include <machine/bus.h>
     38  1.1  cgd 
     39  1.1  cgd #include <alpha/pci/ciareg.h>
     40  1.4  cgd #include <alpha/pci/ciavar.h>
     41  1.1  cgd 
     42  1.1  cgd #define	CHIP		cia
     43  1.4  cgd 
     44  1.4  cgd /* IO region 1 */
     45  1.4  cgd #define CHIP_IO_W1_START(v)						\
     46  1.4  cgd 	    HAE_IO_REG1_START(((struct cia_config *)(v))->cc_hae_io)
     47  1.4  cgd #define CHIP_IO_W1_END(v)						\
     48  1.4  cgd 	    (CHIP_IO_W1_START(v) + HAE_IO_REG1_MASK)
     49  1.4  cgd #define CHIP_IO_W1_BASE(v)						\
     50  1.4  cgd 	    CIA_PCI_SIO1
     51  1.4  cgd #define CHIP_IO_W1_MASK(v)						\
     52  1.4  cgd 	    HAE_IO_REG1_MASK
     53  1.4  cgd 
     54  1.4  cgd /* IO region 2 */
     55  1.4  cgd #define CHIP_IO_W2_START(v)						\
     56  1.4  cgd 	    HAE_IO_REG2_START(((struct cia_config *)(v))->cc_hae_io)
     57  1.4  cgd #define CHIP_IO_W2_END(v)						\
     58  1.4  cgd 	    (CHIP_IO_W2_START(v) + HAE_IO_REG2_MASK)
     59  1.4  cgd #define CHIP_IO_W2_BASE(v)						\
     60  1.4  cgd 	    CIA_PCI_SIO2
     61  1.4  cgd #define CHIP_IO_W2_MASK(v)						\
     62  1.4  cgd 	    HAE_IO_REG2_MASK
     63  1.1  cgd 
     64  1.1  cgd #include "pcs_bus_io_common.c"
     65