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ciavar.h revision 1.23 
      1 /* $NetBSD: ciavar.h,v 1.23 2023/12/04 00:32:10 thorpej Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Chris G. Demetriou
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/vmem.h>
     31 
     32 #include <dev/isa/isavar.h>
     33 #include <dev/pci/pcivar.h>
     34 #include <alpha/pci/pci_sgmap_pte64.h>
     35 
     36 /*
     37  * A 21171 chipset's configuration.
     38  *
     39  * All of the information that the chipset-specific functions need to
     40  * do their dirty work (and more!).
     41  */
     42 struct cia_config {
     43 	int	cc_initted;
     44 
     45 	struct alpha_bus_space cc_iot, cc_memt;
     46 	struct alpha_pci_chipset cc_pc;
     47 
     48 	struct alpha_bus_dma_tag cc_dmat_direct;
     49 	struct alpha_bus_dma_tag cc_dmat_sgmap_lo;
     50 	struct alpha_bus_dma_tag cc_dmat_sgmap_hi;
     51 
     52 	struct alpha_sgmap cc_sgmap_lo;
     53 	struct alpha_sgmap cc_sgmap_hi;
     54 
     55 	uint32_t cc_hae_mem;
     56 	uint32_t cc_hae_io;
     57 
     58 	uint32_t cc_rev;
     59 	uint32_t cc_cnfg;
     60 
     61 	int	cc_flags;
     62 
     63 #define	CCF_ISPYXIS	0x01		/* chip is a 21174 Pyxis */
     64 #define	CCF_PYXISBUG	0x02
     65 #define	CCF_PCI_USE_BWX	0x04		/* use BWX for PCI config space */
     66 #define	CCF_BUS_USE_BWX	0x08		/* use BWX for bus space */
     67 
     68 	vmem_t *cc_io_arena;
     69 	vmem_t *cc_d_mem_arena;
     70 	vmem_t *cc_s_mem_arena;
     71 
     72 	struct {
     73 		uint32_t wbase[4];
     74 		uint32_t wmask[4];
     75 		uint32_t tbase[4];
     76 	} cc_saved_windows;
     77 };
     78 
     79 struct cia_softc {
     80 	device_t sc_dev;
     81 
     82 	struct	cia_config *sc_ccp;
     83 };
     84 
     85 void	cia_init(struct cia_config *);
     86 void	cia_pci_init(pci_chipset_tag_t, void *);
     87 void	cia_dma_init(struct cia_config *);
     88 
     89 void	cia_bwx_bus_io_init(bus_space_tag_t, void *);
     90 void	cia_bwx_bus_mem_init(bus_space_tag_t, void *);
     91 
     92 void	cia_swiz_bus_io_init(bus_space_tag_t, void *);
     93 void	cia_swiz_bus_mem_init(bus_space_tag_t, void *);
     94 
     95 void	cia_pyxis_intr_enable(int, int);
     96