dwlpx.c revision 1.1
1 /* $NetBSD: dwlpx.c,v 1.1 1997/03/12 19:19:56 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1997 5 * Matthew Jacob 6 * NASA AMES Research Center. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice immediately at the beginning of the file, without modification, 14 * this list of conditions, and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <vm/vm.h> 39 40 #include <machine/autoconf.h> 41 #include <dev/pci/pcireg.h> 42 #include <dev/pci/pcivar.h> 43 #include <alpha/tlsb/tlsbreg.h> 44 #include <alpha/tlsb/kftxxvar.h> 45 #include <alpha/tlsb/kftxxreg.h> 46 #include <alpha/pci/dwlpxreg.h> 47 #include <alpha/pci/dwlpxvar.h> 48 #include <alpha/pci/pci_kn8ae.h> 49 50 #include <alpha/include/pmap.old.h> 51 52 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 53 54 static int dwlpxmatch __P((struct device *, struct cfdata *, void *)); 55 static void dwlpxattach __P((struct device *, struct device *, void *)); 56 struct cfattach dwlpx_ca = { 57 sizeof(struct dwlpx_softc), dwlpxmatch, dwlpxattach 58 }; 59 60 struct cfdriver dwlpx_cd = { 61 NULL, "dwlpx", DV_DULL, 62 }; 63 64 static int dwlpxprint __P((void *, const char *)); 65 66 static int 67 dwlpxprint(aux, pnp) 68 void *aux; 69 const char *pnp; 70 { 71 register struct pcibus_attach_args *pba = aux; 72 /* only PCIs can attach to DWLPX's; easy. */ 73 if (pnp) 74 printf("%s at %s", pba->pba_busname, pnp); 75 printf(" bus %d", pba->pba_bus); 76 return (UNCONF); 77 } 78 79 static int 80 dwlpxmatch(parent, cf, aux) 81 struct device *parent; 82 struct cfdata *cf; 83 void *aux; 84 { 85 struct kft_dev_attach_args *ka = aux; 86 87 if (strcmp(ka->ka_name, dwlpx_cd.cd_name) != 0) 88 return (0); 89 return (1); 90 } 91 92 static void 93 dwlpxattach(parent, self, aux) 94 struct device *parent; 95 struct device *self; 96 void *aux; 97 { 98 static int once = 0; 99 struct dwlpx_softc *sc = (struct dwlpx_softc *)self; 100 struct kft_dev_attach_args *ka = aux; 101 struct pcibus_attach_args pba; 102 103 sc->dwlpx_node = ka->ka_node; 104 sc->dwlpx_dtype = ka->ka_dtype; 105 sc->dwlpx_hosenum = ka->ka_hosenum; 106 /* 107 * On reads, you get a fault if you read a nonexisted HPC. 108 * The internal KFTIA hose (hose 0) has only 2 HPCs. 109 */ 110 sc->dwlpx_nhpc = NHPC; 111 if (sc->dwlpx_hosenum == 0) { 112 if (TLDEV_DTYPE(sc->dwlpx_dtype) == TLDEV_DTYPE_KFTIA) { 113 sc->dwlpx_nhpc = NHPC - 1; 114 } 115 } 116 117 dwlpx_init(sc); 118 printf(", hose %d\n", sc->dwlpx_hosenum); 119 if (once == 0) { 120 /* 121 * Set up interrupts 122 */ 123 pci_kn8ae_pickintr(&sc->dwlpx_cc, 1); 124 #ifdef EVCNT_COUNTERS 125 evcnt_attach(self, "intr", kn8ae_intr_evcnt); 126 #endif 127 once++; 128 } else { 129 pci_kn8ae_pickintr(&sc->dwlpx_cc, 0); 130 } 131 132 /* 133 * Attach PCI bus 134 */ 135 pba.pba_busname = "pci"; 136 pba.pba_iot = sc->dwlpx_cc.cc_iot; 137 pba.pba_memt = sc->dwlpx_cc.cc_memt; 138 pba.pba_pc = &sc->dwlpx_cc.cc_pc; 139 pba.pba_bus = 0; 140 config_found(self, &pba, dwlpxprint); 141 } 142 143 void 144 dwlpx_init(sc) 145 struct dwlpx_softc *sc; 146 { 147 int i; 148 struct dwlpx_config *ccp = &sc->dwlpx_cc; 149 150 if (ccp->cc_initted == 0) { 151 ccp->cc_iot = dwlpx_bus_io_init(ccp); 152 ccp->cc_memt = dwlpx_bus_mem_init(ccp); 153 } 154 dwlpx_pci_init(&ccp->cc_pc, ccp); 155 ccp->cc_sc = sc; 156 157 /* 158 * Establish a precalculated base for convenience's sake. 159 */ 160 ccp->cc_sysbase = 161 (((unsigned long)(sc->dwlpx_node - 4)) << 36) | 162 (((unsigned long) sc->dwlpx_hosenum) << 34) | 163 (1LL << 39); 164 165 /* 166 * Set up DMA windows for this DWLPX. 167 * 168 * Basically, we set up for a 1GB direct mapped window, 169 * starting from PCI address 0x40000000. And that's it. 170 * 171 * Do this even for all HPCs- even for the nonexistent 172 * one on hose zero of a KFTIA. 173 */ 174 for (i = 0; i < NHPC; i++) { 175 REGVAL(PCIA_WMASK_A(i) + ccp->cc_sysbase) = 0; 176 REGVAL(PCIA_TBASE_A(i) + ccp->cc_sysbase) = 0; 177 REGVAL(PCIA_WBASE_A(i) + ccp->cc_sysbase) = 0; 178 REGVAL(PCIA_WMASK_B(i) + ccp->cc_sysbase) = 0x3fff0000; 179 REGVAL(PCIA_TBASE_B(i) + ccp->cc_sysbase) = 0; 180 REGVAL(PCIA_WBASE_B(i) + ccp->cc_sysbase) = 0x40000002; 181 REGVAL(PCIA_WMASK_C(i) + ccp->cc_sysbase) = 0; 182 REGVAL(PCIA_TBASE_C(i) + ccp->cc_sysbase) = 0; 183 REGVAL(PCIA_WBASE_C(i) + ccp->cc_sysbase) = 0; 184 } 185 /* XXX XXX BEGIN XXX XXX */ 186 { /* XXX */ 187 extern vm_offset_t alpha_XXX_dmamap_or; /* XXX */ 188 alpha_XXX_dmamap_or = 0x40000000; /* XXX */ 189 } /* XXX */ 190 /* XXX XXX END XXX XXX */ 191 192 /* 193 * Set up interrupt stuff for this DWLPX. 194 * 195 * Note that all PCI interrupt pins are disabled at this time. 196 * 197 * Do this even for all HPCs- even for the nonexistent 198 * one on hose zero of a KFTIA. 199 */ 200 for (i = 0; i < NHPC; i++) { 201 REGVAL(PCIA_IMASK(i) + ccp->cc_sysbase) = DWLPX_IMASK_DFLT; 202 REGVAL(PCIA_ERRVEC(i) + ccp->cc_sysbase) = 203 DWLPX_ERRVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum); 204 } 205 for (i = 0; i < DWLPX_MAXDEV; i++) { 206 u_int16_t vec; 207 int ss, hpc; 208 209 vec = DWLPX_MVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum, i); 210 ss = i; 211 if (i < 4) { 212 hpc = 0; 213 } else if (i < 8) { 214 ss -= 4; 215 hpc = 1; 216 } else { 217 ss -= 8; 218 hpc = 2; 219 } 220 REGVAL(PCIA_DEVVEC(hpc, ss, 1) + ccp->cc_sysbase) = vec; 221 REGVAL(PCIA_DEVVEC(hpc, ss, 2) + ccp->cc_sysbase) = vec; 222 REGVAL(PCIA_DEVVEC(hpc, ss, 3) + ccp->cc_sysbase) = vec; 223 REGVAL(PCIA_DEVVEC(hpc, ss, 4) + ccp->cc_sysbase) = vec; 224 } 225 /* 226 * Establish HAE values, as well as make sure of sanity elsewhere. 227 */ 228 for (i = 0; i < sc->dwlpx_nhpc; i++) { 229 u_int32_t ctl = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase); 230 ctl &= 0x0fffffff; 231 ctl &= ~((0x1f << 14) | (0x1f << 9) | 0x3); 232 #if 0 233 ctl |= ((1 << 14) | (1 << 9)); 234 #endif 235 REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) = ctl; 236 } 237 ccp->cc_initted = 1; 238 } 239
Indexes created Tue Sep 30 11:09:46 GMT 2025