dwlpx.c revision 1.2
1 /* $NetBSD: dwlpx.c,v 1.2 1997/03/12 21:09:52 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/device.h> 37 #include <vm/vm.h> 38 39 #include <machine/autoconf.h> 40 #include <dev/pci/pcireg.h> 41 #include <dev/pci/pcivar.h> 42 #include <alpha/tlsb/tlsbreg.h> 43 #include <alpha/tlsb/kftxxvar.h> 44 #include <alpha/tlsb/kftxxreg.h> 45 #include <alpha/pci/dwlpxreg.h> 46 #include <alpha/pci/dwlpxvar.h> 47 #include <alpha/pci/pci_kn8ae.h> 48 49 #include <alpha/include/pmap.old.h> 50 51 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 52 53 static int dwlpxmatch __P((struct device *, struct cfdata *, void *)); 54 static void dwlpxattach __P((struct device *, struct device *, void *)); 55 struct cfattach dwlpx_ca = { 56 sizeof(struct dwlpx_softc), dwlpxmatch, dwlpxattach 57 }; 58 59 struct cfdriver dwlpx_cd = { 60 NULL, "dwlpx", DV_DULL, 61 }; 62 63 static int dwlpxprint __P((void *, const char *)); 64 65 static int 66 dwlpxprint(aux, pnp) 67 void *aux; 68 const char *pnp; 69 { 70 register struct pcibus_attach_args *pba = aux; 71 /* only PCIs can attach to DWLPX's; easy. */ 72 if (pnp) 73 printf("%s at %s", pba->pba_busname, pnp); 74 printf(" bus %d", pba->pba_bus); 75 return (UNCONF); 76 } 77 78 static int 79 dwlpxmatch(parent, cf, aux) 80 struct device *parent; 81 struct cfdata *cf; 82 void *aux; 83 { 84 struct kft_dev_attach_args *ka = aux; 85 86 if (strcmp(ka->ka_name, dwlpx_cd.cd_name) != 0) 87 return (0); 88 return (1); 89 } 90 91 static void 92 dwlpxattach(parent, self, aux) 93 struct device *parent; 94 struct device *self; 95 void *aux; 96 { 97 static int once = 0; 98 struct dwlpx_softc *sc = (struct dwlpx_softc *)self; 99 struct kft_dev_attach_args *ka = aux; 100 struct pcibus_attach_args pba; 101 102 sc->dwlpx_node = ka->ka_node; 103 sc->dwlpx_dtype = ka->ka_dtype; 104 sc->dwlpx_hosenum = ka->ka_hosenum; 105 /* 106 * On reads, you get a fault if you read a nonexisted HPC. 107 * The internal KFTIA hose (hose 0) has only 2 HPCs. 108 */ 109 sc->dwlpx_nhpc = NHPC; 110 if (sc->dwlpx_hosenum == 0) { 111 if (TLDEV_DTYPE(sc->dwlpx_dtype) == TLDEV_DTYPE_KFTIA) { 112 sc->dwlpx_nhpc = NHPC - 1; 113 } 114 } 115 116 dwlpx_init(sc); 117 printf(", hose %d\n", sc->dwlpx_hosenum); 118 if (once == 0) { 119 /* 120 * Set up interrupts 121 */ 122 pci_kn8ae_pickintr(&sc->dwlpx_cc, 1); 123 #ifdef EVCNT_COUNTERS 124 evcnt_attach(self, "intr", kn8ae_intr_evcnt); 125 #endif 126 once++; 127 } else { 128 pci_kn8ae_pickintr(&sc->dwlpx_cc, 0); 129 } 130 131 /* 132 * Attach PCI bus 133 */ 134 pba.pba_busname = "pci"; 135 pba.pba_iot = sc->dwlpx_cc.cc_iot; 136 pba.pba_memt = sc->dwlpx_cc.cc_memt; 137 pba.pba_pc = &sc->dwlpx_cc.cc_pc; 138 pba.pba_bus = 0; 139 config_found(self, &pba, dwlpxprint); 140 } 141 142 void 143 dwlpx_init(sc) 144 struct dwlpx_softc *sc; 145 { 146 int i; 147 struct dwlpx_config *ccp = &sc->dwlpx_cc; 148 149 if (ccp->cc_initted == 0) { 150 ccp->cc_iot = dwlpx_bus_io_init(ccp); 151 ccp->cc_memt = dwlpx_bus_mem_init(ccp); 152 } 153 dwlpx_pci_init(&ccp->cc_pc, ccp); 154 ccp->cc_sc = sc; 155 156 /* 157 * Establish a precalculated base for convenience's sake. 158 */ 159 ccp->cc_sysbase = 160 (((unsigned long)(sc->dwlpx_node - 4)) << 36) | 161 (((unsigned long) sc->dwlpx_hosenum) << 34) | 162 (1LL << 39); 163 164 /* 165 * Set up DMA windows for this DWLPX. 166 * 167 * Basically, we set up for a 1GB direct mapped window, 168 * starting from PCI address 0x40000000. And that's it. 169 * 170 * Do this even for all HPCs- even for the nonexistent 171 * one on hose zero of a KFTIA. 172 */ 173 for (i = 0; i < NHPC; i++) { 174 REGVAL(PCIA_WMASK_A(i) + ccp->cc_sysbase) = 0; 175 REGVAL(PCIA_TBASE_A(i) + ccp->cc_sysbase) = 0; 176 REGVAL(PCIA_WBASE_A(i) + ccp->cc_sysbase) = 0; 177 REGVAL(PCIA_WMASK_B(i) + ccp->cc_sysbase) = 0x3fff0000; 178 REGVAL(PCIA_TBASE_B(i) + ccp->cc_sysbase) = 0; 179 REGVAL(PCIA_WBASE_B(i) + ccp->cc_sysbase) = 0x40000002; 180 REGVAL(PCIA_WMASK_C(i) + ccp->cc_sysbase) = 0; 181 REGVAL(PCIA_TBASE_C(i) + ccp->cc_sysbase) = 0; 182 REGVAL(PCIA_WBASE_C(i) + ccp->cc_sysbase) = 0; 183 } 184 /* XXX XXX BEGIN XXX XXX */ 185 { /* XXX */ 186 extern vm_offset_t alpha_XXX_dmamap_or; /* XXX */ 187 alpha_XXX_dmamap_or = 0x40000000; /* XXX */ 188 } /* XXX */ 189 /* XXX XXX END XXX XXX */ 190 191 /* 192 * Set up interrupt stuff for this DWLPX. 193 * 194 * Note that all PCI interrupt pins are disabled at this time. 195 * 196 * Do this even for all HPCs- even for the nonexistent 197 * one on hose zero of a KFTIA. 198 */ 199 for (i = 0; i < NHPC; i++) { 200 REGVAL(PCIA_IMASK(i) + ccp->cc_sysbase) = DWLPX_IMASK_DFLT; 201 REGVAL(PCIA_ERRVEC(i) + ccp->cc_sysbase) = 202 DWLPX_ERRVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum); 203 } 204 for (i = 0; i < DWLPX_MAXDEV; i++) { 205 u_int16_t vec; 206 int ss, hpc; 207 208 vec = DWLPX_MVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum, i); 209 ss = i; 210 if (i < 4) { 211 hpc = 0; 212 } else if (i < 8) { 213 ss -= 4; 214 hpc = 1; 215 } else { 216 ss -= 8; 217 hpc = 2; 218 } 219 REGVAL(PCIA_DEVVEC(hpc, ss, 1) + ccp->cc_sysbase) = vec; 220 REGVAL(PCIA_DEVVEC(hpc, ss, 2) + ccp->cc_sysbase) = vec; 221 REGVAL(PCIA_DEVVEC(hpc, ss, 3) + ccp->cc_sysbase) = vec; 222 REGVAL(PCIA_DEVVEC(hpc, ss, 4) + ccp->cc_sysbase) = vec; 223 } 224 /* 225 * Establish HAE values, as well as make sure of sanity elsewhere. 226 */ 227 for (i = 0; i < sc->dwlpx_nhpc; i++) { 228 u_int32_t ctl = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase); 229 ctl &= 0x0fffffff; 230 ctl &= ~((0x1f << 14) | (0x1f << 9) | 0x3); 231 #if 0 232 ctl |= ((1 << 14) | (1 << 9)); 233 #endif 234 REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) = ctl; 235 } 236 ccp->cc_initted = 1; 237 } 238
Indexes created Tue Sep 30 11:09:46 GMT 2025