dwlpx.c revision 1.5
1 /* $NetBSD: dwlpx.c,v 1.5 1997/04/10 23:12:18 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <machine/options.h> /* Config options headers */ 34 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 35 36 __KERNEL_RCSID(0, "$NetBSD: dwlpx.c,v 1.5 1997/04/10 23:12:18 cgd Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <vm/vm.h> 43 44 #include <machine/autoconf.h> 45 #include <dev/pci/pcireg.h> 46 #include <dev/pci/pcivar.h> 47 #include <alpha/tlsb/tlsbreg.h> 48 #include <alpha/tlsb/kftxxvar.h> 49 #include <alpha/tlsb/kftxxreg.h> 50 #include <alpha/pci/dwlpxreg.h> 51 #include <alpha/pci/dwlpxvar.h> 52 #include <alpha/pci/pci_kn8ae.h> 53 54 #include <alpha/include/pmap.old.h> 55 56 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 57 58 static int dwlpxmatch __P((struct device *, struct cfdata *, void *)); 59 static void dwlpxattach __P((struct device *, struct device *, void *)); 60 struct cfattach dwlpx_ca = { 61 sizeof(struct dwlpx_softc), dwlpxmatch, dwlpxattach 62 }; 63 64 struct cfdriver dwlpx_cd = { 65 NULL, "dwlpx", DV_DULL, 66 }; 67 68 static int dwlpxprint __P((void *, const char *)); 69 70 static int 71 dwlpxprint(aux, pnp) 72 void *aux; 73 const char *pnp; 74 { 75 register struct pcibus_attach_args *pba = aux; 76 /* only PCIs can attach to DWLPX's; easy. */ 77 if (pnp) 78 printf("%s at %s", pba->pba_busname, pnp); 79 printf(" bus %d", pba->pba_bus); 80 return (UNCONF); 81 } 82 83 static int 84 dwlpxmatch(parent, cf, aux) 85 struct device *parent; 86 struct cfdata *cf; 87 void *aux; 88 { 89 struct kft_dev_attach_args *ka = aux; 90 91 if (strcmp(ka->ka_name, dwlpx_cd.cd_name) != 0) 92 return (0); 93 return (1); 94 } 95 96 static void 97 dwlpxattach(parent, self, aux) 98 struct device *parent; 99 struct device *self; 100 void *aux; 101 { 102 static int once = 0; 103 struct dwlpx_softc *sc = (struct dwlpx_softc *)self; 104 struct kft_dev_attach_args *ka = aux; 105 struct pcibus_attach_args pba; 106 107 sc->dwlpx_node = ka->ka_node; 108 sc->dwlpx_dtype = ka->ka_dtype; 109 sc->dwlpx_hosenum = ka->ka_hosenum; 110 /* 111 * On reads, you get a fault if you read a nonexisted HPC. 112 * The internal KFTIA hose (hose 0) has only 2 HPCs. 113 */ 114 sc->dwlpx_nhpc = NHPC; 115 if (sc->dwlpx_hosenum == 0) { 116 if (TLDEV_DTYPE(sc->dwlpx_dtype) == TLDEV_DTYPE_KFTIA) { 117 sc->dwlpx_nhpc = NHPC - 1; 118 } 119 } 120 121 dwlpx_init(sc); 122 printf(", hose %d\n", sc->dwlpx_hosenum); 123 if (once == 0) { 124 /* 125 * Set up interrupts 126 */ 127 pci_kn8ae_pickintr(&sc->dwlpx_cc, 1); 128 #ifdef EVCNT_COUNTERS 129 evcnt_attach(self, "intr", kn8ae_intr_evcnt); 130 #endif 131 once++; 132 } else { 133 pci_kn8ae_pickintr(&sc->dwlpx_cc, 0); 134 } 135 136 /* 137 * Attach PCI bus 138 */ 139 pba.pba_busname = "pci"; 140 pba.pba_iot = sc->dwlpx_cc.cc_iot; 141 pba.pba_memt = sc->dwlpx_cc.cc_memt; 142 pba.pba_pc = &sc->dwlpx_cc.cc_pc; 143 pba.pba_bus = 0; 144 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 145 config_found(self, &pba, dwlpxprint); 146 } 147 148 void 149 dwlpx_init(sc) 150 struct dwlpx_softc *sc; 151 { 152 int i; 153 struct dwlpx_config *ccp = &sc->dwlpx_cc; 154 155 if (ccp->cc_initted == 0) { 156 ccp->cc_iot = dwlpx_bus_io_init(ccp); 157 ccp->cc_memt = dwlpx_bus_mem_init(ccp); 158 } 159 dwlpx_pci_init(&ccp->cc_pc, ccp); 160 ccp->cc_sc = sc; 161 162 /* 163 * Establish a precalculated base for convenience's sake. 164 */ 165 ccp->cc_sysbase = 166 (((unsigned long)(sc->dwlpx_node - 4)) << 36) | 167 (((unsigned long) sc->dwlpx_hosenum) << 34) | 168 (1LL << 39); 169 170 /* 171 * Set up DMA windows for this DWLPX. 172 * 173 * Basically, we set up for a 1GB direct mapped window, 174 * starting from PCI address 0x40000000. And that's it. 175 * 176 * Do this even for all HPCs- even for the nonexistent 177 * one on hose zero of a KFTIA. 178 */ 179 for (i = 0; i < NHPC; i++) { 180 REGVAL(PCIA_WMASK_A(i) + ccp->cc_sysbase) = 0; 181 REGVAL(PCIA_TBASE_A(i) + ccp->cc_sysbase) = 0; 182 REGVAL(PCIA_WBASE_A(i) + ccp->cc_sysbase) = 0; 183 REGVAL(PCIA_WMASK_B(i) + ccp->cc_sysbase) = 0x3fff0000; 184 REGVAL(PCIA_TBASE_B(i) + ccp->cc_sysbase) = 0; 185 REGVAL(PCIA_WBASE_B(i) + ccp->cc_sysbase) = 0x40000002; 186 REGVAL(PCIA_WMASK_C(i) + ccp->cc_sysbase) = 0; 187 REGVAL(PCIA_TBASE_C(i) + ccp->cc_sysbase) = 0; 188 REGVAL(PCIA_WBASE_C(i) + ccp->cc_sysbase) = 0; 189 } 190 /* XXX XXX BEGIN XXX XXX */ 191 { /* XXX */ 192 extern vm_offset_t alpha_XXX_dmamap_or; /* XXX */ 193 alpha_XXX_dmamap_or = 0x40000000; /* XXX */ 194 } /* XXX */ 195 /* XXX XXX END XXX XXX */ 196 197 /* 198 * Set up interrupt stuff for this DWLPX. 199 * 200 * Note that all PCI interrupt pins are disabled at this time. 201 * 202 * Do this even for all HPCs- even for the nonexistent 203 * one on hose zero of a KFTIA. 204 */ 205 for (i = 0; i < NHPC; i++) { 206 REGVAL(PCIA_IMASK(i) + ccp->cc_sysbase) = DWLPX_IMASK_DFLT; 207 REGVAL(PCIA_ERRVEC(i) + ccp->cc_sysbase) = 208 DWLPX_ERRVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum); 209 } 210 for (i = 0; i < DWLPX_MAXDEV; i++) { 211 u_int16_t vec; 212 int ss, hpc; 213 214 vec = DWLPX_MVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum, i); 215 ss = i; 216 if (i < 4) { 217 hpc = 0; 218 } else if (i < 8) { 219 ss -= 4; 220 hpc = 1; 221 } else { 222 ss -= 8; 223 hpc = 2; 224 } 225 REGVAL(PCIA_DEVVEC(hpc, ss, 1) + ccp->cc_sysbase) = vec; 226 REGVAL(PCIA_DEVVEC(hpc, ss, 2) + ccp->cc_sysbase) = vec; 227 REGVAL(PCIA_DEVVEC(hpc, ss, 3) + ccp->cc_sysbase) = vec; 228 REGVAL(PCIA_DEVVEC(hpc, ss, 4) + ccp->cc_sysbase) = vec; 229 } 230 /* 231 * Establish HAE values, as well as make sure of sanity elsewhere. 232 */ 233 for (i = 0; i < sc->dwlpx_nhpc; i++) { 234 u_int32_t ctl = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase); 235 ctl &= 0x0fffffff; 236 ctl &= ~((0x1f << 14) | (0x1f << 9) | 0x3); 237 #if 0 238 ctl |= ((1 << 14) | (1 << 9)); 239 #endif 240 REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) = ctl; 241 } 242 ccp->cc_initted = 1; 243 } 244
Indexes created Tue Sep 30 20:09:53 GMT 2025