dwlpx.c revision 1.9
1 /* $NetBSD: dwlpx.c,v 1.9 1997/08/16 01:18:30 mjacob Exp $ */ 2 3 /* 4 * Copyright (c) 1997 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <machine/options.h> /* Config options headers */ 34 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 35 36 __KERNEL_RCSID(0, "$NetBSD: dwlpx.c,v 1.9 1997/08/16 01:18:30 mjacob Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <vm/vm.h> 43 44 #include <machine/autoconf.h> 45 #include <dev/pci/pcireg.h> 46 #include <dev/pci/pcivar.h> 47 #include <alpha/tlsb/tlsbreg.h> 48 #include <alpha/tlsb/kftxxvar.h> 49 #include <alpha/tlsb/kftxxreg.h> 50 #include <alpha/pci/dwlpxreg.h> 51 #include <alpha/pci/dwlpxvar.h> 52 #include <alpha/pci/pci_kn8ae.h> 53 54 #include <alpha/include/pmap.old.h> 55 56 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 57 58 static int dwlpxmatch __P((struct device *, struct cfdata *, void *)); 59 static void dwlpxattach __P((struct device *, struct device *, void *)); 60 struct cfattach dwlpx_ca = { 61 sizeof(struct dwlpx_softc), dwlpxmatch, dwlpxattach 62 }; 63 64 struct cfdriver dwlpx_cd = { 65 NULL, "dwlpx", DV_DULL, 66 }; 67 68 static int dwlpxprint __P((void *, const char *)); 69 70 static int 71 dwlpxprint(aux, pnp) 72 void *aux; 73 const char *pnp; 74 { 75 register struct pcibus_attach_args *pba = aux; 76 /* only PCIs can attach to DWLPX's; easy. */ 77 if (pnp) 78 printf("%s at %s", pba->pba_busname, pnp); 79 printf(" bus %d", pba->pba_bus); 80 return (UNCONF); 81 } 82 83 static int 84 dwlpxmatch(parent, cf, aux) 85 struct device *parent; 86 struct cfdata *cf; 87 void *aux; 88 { 89 struct kft_dev_attach_args *ka = aux; 90 91 if (strcmp(ka->ka_name, dwlpx_cd.cd_name) != 0) 92 return (0); 93 return (1); 94 } 95 96 static void 97 dwlpxattach(parent, self, aux) 98 struct device *parent; 99 struct device *self; 100 void *aux; 101 { 102 static int once = 0; 103 struct dwlpx_softc *sc = (struct dwlpx_softc *)self; 104 struct dwlpx_config *ccp = &sc->dwlpx_cc; 105 struct kft_dev_attach_args *ka = aux; 106 struct pcibus_attach_args pba; 107 u_int32_t pcia_present; 108 109 sc->dwlpx_node = ka->ka_node; 110 sc->dwlpx_dtype = ka->ka_dtype; 111 sc->dwlpx_hosenum = ka->ka_hosenum; 112 /* 113 * On reads, you get a fault if you read a nonexisted HPC. 114 * The internal KFTIA hose (hose 0) has only 2 HPCs. 115 */ 116 sc->dwlpx_nhpc = NHPC; 117 if (sc->dwlpx_hosenum == 0) { 118 if (TLDEV_DTYPE(sc->dwlpx_dtype) == TLDEV_DTYPE_KFTIA) { 119 sc->dwlpx_nhpc = NHPC - 1; 120 } 121 } 122 123 dwlpx_init(sc); 124 125 /* XXX Need to detect DWLPA vs. DWLPB here. */ 126 pcia_present = REGVAL(PCIA_PRESENT + ccp->cc_sysbase); 127 128 printf(": PCIA rev. %d, STD I/O %spresent\n", 129 (pcia_present >> PCIA_PRESENT_REVSHIFT) & PCIA_PRESENT_REVMASK, 130 (pcia_present & PCIA_PRESENT_STDIO) == 0 ? "not " : ""); 131 132 #if 0 133 { 134 int hpc, slot, slotval; 135 const char *str; 136 137 for (hpc = 0; hpc < sc->dwlpx_nhpc; hpc++) { 138 for (slot = 0; slot < 4; slot++) { 139 slotval = (pcia_present >> 140 PCIA_PRESENT_SLOTSHIFT(hpc, slot)) & 141 PCIA_PRESENT_SLOT_MASK; 142 if (slotval == PCIA_PRESENT_SLOT_NONE) 143 continue; 144 switch (slotval) { 145 case PCIA_PRESENT_SLOT_25W: 146 str = "25"; 147 break; 148 case PCIA_PRESENT_SLOT_15W: 149 str = "15"; 150 break; 151 case PCIA_PRESENT_SLOW_7W: 152 default: /* XXX gcc */ 153 str = "7.5"; 154 break; 155 } 156 printf("%s: hpc %d slot %d: %s watt module\n", 157 sc->dwlpx_dev.dv_xname, hpc, slot, str); 158 } 159 } 160 } 161 #endif 162 163 if (once == 0) { 164 /* 165 * Set up interrupts 166 */ 167 pci_kn8ae_pickintr(&sc->dwlpx_cc, 1); 168 #ifdef EVCNT_COUNTERS 169 evcnt_attach(self, "intr", kn8ae_intr_evcnt); 170 #endif 171 once++; 172 } else { 173 pci_kn8ae_pickintr(&sc->dwlpx_cc, 0); 174 } 175 176 /* 177 * Attach PCI bus 178 */ 179 pba.pba_busname = "pci"; 180 pba.pba_iot = sc->dwlpx_cc.cc_iot; 181 pba.pba_memt = sc->dwlpx_cc.cc_memt; 182 pba.pba_dmat = /* start with direct, may change... */ 183 alphabus_dma_get_tag(&sc->dwlpx_cc.cc_dmat_direct, ALPHA_BUS_PCI); 184 pba.pba_pc = &sc->dwlpx_cc.cc_pc; 185 pba.pba_bus = 0; 186 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 187 config_found(self, &pba, dwlpxprint); 188 } 189 190 void 191 dwlpx_init(sc) 192 struct dwlpx_softc *sc; 193 { 194 int i; 195 struct dwlpx_config *ccp = &sc->dwlpx_cc; 196 197 if (ccp->cc_initted == 0) { 198 ccp->cc_iot = dwlpx_bus_io_init(ccp); 199 ccp->cc_memt = dwlpx_bus_mem_init(ccp); 200 } 201 dwlpx_pci_init(&ccp->cc_pc, ccp); 202 ccp->cc_sc = sc; 203 204 /* 205 * Establish a precalculated base for convenience's sake. 206 */ 207 ccp->cc_sysbase = 208 (((unsigned long)(sc->dwlpx_node - 4)) << 36) | 209 (((unsigned long) sc->dwlpx_hosenum) << 34) | 210 (1LL << 39); 211 212 /* 213 * Set up DMA stuff for this DWLPX. 214 */ 215 dwlpx_dma_init(ccp); 216 217 /* 218 * Set up interrupt stuff for this DWLPX. 219 * 220 * Note that all PCI interrupt pins are disabled at this time. 221 * 222 * Do this even for all HPCs- even for the nonexistent 223 * one on hose zero of a KFTIA. 224 */ 225 for (i = 0; i < NHPC; i++) { 226 REGVAL(PCIA_IMASK(i) + ccp->cc_sysbase) = DWLPX_IMASK_DFLT; 227 REGVAL(PCIA_ERRVEC(i) + ccp->cc_sysbase) = 228 DWLPX_ERRVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum); 229 } 230 for (i = 0; i < DWLPX_MAXDEV; i++) { 231 u_int16_t vec; 232 int ss, hpc; 233 234 vec = DWLPX_MVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum, i); 235 ss = i; 236 if (i < 4) { 237 hpc = 0; 238 } else if (i < 8) { 239 ss -= 4; 240 hpc = 1; 241 } else { 242 ss -= 8; 243 hpc = 2; 244 } 245 REGVAL(PCIA_DEVVEC(hpc, ss, 1) + ccp->cc_sysbase) = vec; 246 REGVAL(PCIA_DEVVEC(hpc, ss, 2) + ccp->cc_sysbase) = vec; 247 REGVAL(PCIA_DEVVEC(hpc, ss, 3) + ccp->cc_sysbase) = vec; 248 REGVAL(PCIA_DEVVEC(hpc, ss, 4) + ccp->cc_sysbase) = vec; 249 } 250 /* 251 * Establish HAE values, as well as make sure of sanity elsewhere. 252 */ 253 for (i = 0; i < sc->dwlpx_nhpc; i++) { 254 u_int32_t ctl = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase); 255 ctl &= 0x0fffffff; 256 ctl &= ~(PCIA_CTL_MHAE(0x1f) | PCIA_CTL_IHAE(0x1f)); 257 /* 258 * I originally also had it or'ing in 3, which makes no sense. 259 */ 260 261 ctl |= PCIA_CTL_RMMENA | PCIA_CTL_RMMARB; 262 263 /* 264 * Only valid if we're attached to a KFTIA or a KTHA. 265 */ 266 ctl |= PCIA_CTL_3UP; 267 268 ctl |= PCIA_CTL_CUTENA; 269 270 REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) = ctl; 271 } 272 ccp->cc_initted = 1; 273 } 274
Indexes created Tue Sep 30 11:09:46 GMT 2025