1 1.16 thorpej /* $NetBSD: dwlpx_bus_mem.c,v 1.16 2023/12/04 00:32:10 thorpej Exp $ */ 2 1.1 cgd 3 1.1 cgd /* 4 1.2 cgd * Copyright (c) 1997 by Matthew Jacob 5 1.1 cgd * NASA AMES Research Center. 6 1.1 cgd * All rights reserved. 7 1.1 cgd * 8 1.1 cgd * Redistribution and use in source and binary forms, with or without 9 1.1 cgd * modification, are permitted provided that the following conditions 10 1.1 cgd * are met: 11 1.1 cgd * 1. Redistributions of source code must retain the above copyright 12 1.1 cgd * notice immediately at the beginning of the file, without modification, 13 1.1 cgd * this list of conditions, and the following disclaimer. 14 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 cgd * notice, this list of conditions and the following disclaimer in the 16 1.1 cgd * documentation and/or other materials provided with the distribution. 17 1.1 cgd * 3. The name of the author may not be used to endorse or promote products 18 1.1 cgd * derived from this software without specific prior written permission. 19 1.1 cgd * 20 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 1.1 cgd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 1.1 cgd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 1.1 cgd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 1.1 cgd * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 1.1 cgd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 1.1 cgd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 1.1 cgd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 1.1 cgd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 1.1 cgd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 1.1 cgd * SUCH DAMAGE. 31 1.1 cgd */ 32 1.4 cgd 33 1.5 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 1.5 cgd 35 1.16 thorpej __KERNEL_RCSID(1, "$NetBSD: dwlpx_bus_mem.c,v 1.16 2023/12/04 00:32:10 thorpej Exp $"); 36 1.1 cgd 37 1.1 cgd #include <sys/param.h> 38 1.1 cgd #include <sys/systm.h> 39 1.1 cgd #include <sys/syslog.h> 40 1.1 cgd #include <sys/device.h> 41 1.12 mrg 42 1.14 dyoung #include <sys/bus.h> 43 1.1 cgd 44 1.1 cgd #include <alpha/pci/dwlpxreg.h> 45 1.1 cgd #include <alpha/pci/dwlpxvar.h> 46 1.1 cgd 47 1.1 cgd #define CHIP dwlpx 48 1.1 cgd 49 1.16 thorpej #define CHIP_D_MEM_ARENA(v) \ 50 1.16 thorpej (((struct dwlpx_config *)(v))->cc_d_mem_arena) 51 1.16 thorpej #define CHIP_D_MEM_ARENA_STORE(v) \ 52 1.16 thorpej (&(((struct dwlpx_config *)(v))->cc_d_mem_arena_store)) 53 1.16 thorpej #define CHIP_D_MEM_BTAG_STORE(v) \ 54 1.16 thorpej (((struct dwlpx_config *)(v))->cc_d_mem_btag_store) 55 1.16 thorpej #define CHIP_D_MEM_BTAG_COUNT(v) DWLPX_D_MEM_NBTS 56 1.16 thorpej 57 1.16 thorpej #define CHIP_S_MEM_ARENA(v) \ 58 1.16 thorpej (((struct dwlpx_config *)(v))->cc_s_mem_arena) 59 1.16 thorpej #define CHIP_S_MEM_ARENA_STORE(v) \ 60 1.16 thorpej (&(((struct dwlpx_config *)(v))->cc_s_mem_arena_store)) 61 1.16 thorpej #define CHIP_S_MEM_BTAG_STORE(v) \ 62 1.16 thorpej (((struct dwlpx_config *)(v))->cc_s_mem_btag_store) 63 1.16 thorpej #define CHIP_S_MEM_BTAG_COUNT(v) DWLPX_S_MEM_NBTS 64 1.1 cgd 65 1.1 cgd /* Dense region 1 */ 66 1.1 cgd #define CHIP_D_MEM_W1_BUS_START(v) 0x00000000UL 67 1.1 cgd #define CHIP_D_MEM_W1_BUS_END(v) 0xffffffffUL 68 1.1 cgd #define CHIP_D_MEM_W1_SYS_START(v) \ 69 1.1 cgd (((struct dwlpx_config *)(v))->cc_sysbase | DWLPX_PCI_DENSE) 70 1.1 cgd #define CHIP_D_MEM_W1_SYS_END(v) \ 71 1.1 cgd (CHIP_D_MEM_W1_SYS_START(v) + 0xffffffffUL) 72 1.1 cgd 73 1.1 cgd /* Sparse region 1 */ 74 1.1 cgd #define CHIP_S_MEM_W1_BUS_START(v) 0x00000000UL 75 1.1 cgd #define CHIP_S_MEM_W1_BUS_END(v) 0x00ffffffUL 76 1.1 cgd #define CHIP_S_MEM_W1_SYS_START(v) \ 77 1.1 cgd (((struct dwlpx_config *)(v))->cc_sysbase | DWLPX_PCI_SPARSE) 78 1.1 cgd #define CHIP_S_MEM_W1_SYS_END(v) \ 79 1.1 cgd (CHIP_S_MEM_W1_SYS_START(v) + ((CHIP_S_MEM_W1_BUS_END(v) + 1) << 5) - 1) 80 1.1 cgd 81 1.1 cgd /* Sparse region 2 */ 82 1.1 cgd #define CHIP_S_MEM_W2_BUS_START(v) \ 83 1.1 cgd (((0x0 << 27) & 0xf8000000) + 0x01000000UL) 84 1.1 cgd #define CHIP_S_MEM_W2_BUS_END(v) \ 85 1.1 cgd (CHIP_S_MEM_W2_BUS_START(v) + 0x07ffffffUL) 86 1.1 cgd #define CHIP_S_MEM_W2_SYS_START(v) \ 87 1.1 cgd ((((struct dwlpx_config *)(v))->cc_sysbase|DWLPX_PCI_SPARSE) + \ 88 1.1 cgd (0x01000000UL<<5)) 89 1.1 cgd #define CHIP_S_MEM_W2_SYS_END(v) \ 90 1.1 cgd ((((struct dwlpx_config *)(v))->cc_sysbase|DWLPX_PCI_SPARSE) + \ 91 1.1 cgd (0x08000000UL<<5) - 1) 92 1.1 cgd 93 1.9 thorpej #include <alpha/pci/pci_swiz_bus_mem_chipdep.c> 94