dwlpx_dma.c revision 1.2.2.2
1 1.2.2.2 cgd /* $NetBSD: dwlpx_dma.c,v 1.2.2.2 1997/06/07 04:43:21 cgd Exp $ */ 2 1.2.2.2 cgd 3 1.2.2.2 cgd /*- 4 1.2.2.2 cgd * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 1.2.2.2 cgd * All rights reserved. 6 1.2.2.2 cgd * 7 1.2.2.2 cgd * This code is derived from software contributed to The NetBSD Foundation 8 1.2.2.2 cgd * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 1.2.2.2 cgd * NASA Ames Research Center. 10 1.2.2.2 cgd * 11 1.2.2.2 cgd * Redistribution and use in source and binary forms, with or without 12 1.2.2.2 cgd * modification, are permitted provided that the following conditions 13 1.2.2.2 cgd * are met: 14 1.2.2.2 cgd * 1. Redistributions of source code must retain the above copyright 15 1.2.2.2 cgd * notice, this list of conditions and the following disclaimer. 16 1.2.2.2 cgd * 2. Redistributions in binary form must reproduce the above copyright 17 1.2.2.2 cgd * notice, this list of conditions and the following disclaimer in the 18 1.2.2.2 cgd * documentation and/or other materials provided with the distribution. 19 1.2.2.2 cgd * 3. All advertising materials mentioning features or use of this software 20 1.2.2.2 cgd * must display the following acknowledgement: 21 1.2.2.2 cgd * This product includes software developed by the NetBSD 22 1.2.2.2 cgd * Foundation, Inc. and its contributors. 23 1.2.2.2 cgd * 4. Neither the name of The NetBSD Foundation nor the names of its 24 1.2.2.2 cgd * contributors may be used to endorse or promote products derived 25 1.2.2.2 cgd * from this software without specific prior written permission. 26 1.2.2.2 cgd * 27 1.2.2.2 cgd * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 1.2.2.2 cgd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 1.2.2.2 cgd * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 1.2.2.2 cgd * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 1.2.2.2 cgd * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPEDWLPxL, EXEMPLARY, OR 32 1.2.2.2 cgd * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 1.2.2.2 cgd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 1.2.2.2 cgd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 1.2.2.2 cgd * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 1.2.2.2 cgd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 1.2.2.2 cgd * POSSIBILITY OF SUCH DAMAGE. 38 1.2.2.2 cgd */ 39 1.2.2.2 cgd 40 1.2.2.2 cgd #include <machine/options.h> /* Config options headers */ 41 1.2.2.2 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 42 1.2.2.2 cgd 43 1.2.2.2 cgd __KERNEL_RCSID(0, "$NetBSD: dwlpx_dma.c,v 1.2.2.2 1997/06/07 04:43:21 cgd Exp $"); 44 1.2.2.2 cgd 45 1.2.2.2 cgd #include <sys/param.h> 46 1.2.2.2 cgd #include <sys/systm.h> 47 1.2.2.2 cgd #include <sys/kernel.h> 48 1.2.2.2 cgd #include <sys/device.h> 49 1.2.2.2 cgd #include <sys/malloc.h> 50 1.2.2.2 cgd #include <vm/vm.h> 51 1.2.2.2 cgd 52 1.2.2.2 cgd #define _ALPHA_BUS_DMA_PRIVATE 53 1.2.2.2 cgd #include <machine/bus.h> 54 1.2.2.2 cgd 55 1.2.2.2 cgd #include <dev/pci/pcireg.h> 56 1.2.2.2 cgd #include <dev/pci/pcivar.h> 57 1.2.2.2 cgd #include <alpha/tlsb/tlsbreg.h> 58 1.2.2.2 cgd #include <alpha/tlsb/kftxxvar.h> 59 1.2.2.2 cgd #include <alpha/tlsb/kftxxreg.h> 60 1.2.2.2 cgd #include <alpha/pci/dwlpxreg.h> 61 1.2.2.2 cgd #include <alpha/pci/dwlpxvar.h> 62 1.2.2.2 cgd #include <alpha/pci/pci_kn8ae.h> 63 1.2.2.2 cgd 64 1.2.2.2 cgd bus_dma_tag_t dwlpx_dma_get_tag __P((bus_dma_tag_t, alpha_bus_t)); 65 1.2.2.2 cgd 66 1.2.2.2 cgd int dwlpx_bus_dmamap_create_sgmap __P((bus_dma_tag_t, bus_size_t, int, 67 1.2.2.2 cgd bus_size_t, bus_size_t, int, bus_dmamap_t *)); 68 1.2.2.2 cgd 69 1.2.2.2 cgd void dwlpx_bus_dmamap_destroy_sgmap __P((bus_dma_tag_t, bus_dmamap_t)); 70 1.2.2.2 cgd 71 1.2.2.2 cgd int dwlpx_bus_dmamap_load_direct __P((bus_dma_tag_t, bus_dmamap_t, void *, 72 1.2.2.2 cgd bus_size_t, struct proc *, int)); 73 1.2.2.2 cgd int dwlpx_bus_dmamap_load_sgmap __P((bus_dma_tag_t, bus_dmamap_t, void *, 74 1.2.2.2 cgd bus_size_t, struct proc *, int)); 75 1.2.2.2 cgd 76 1.2.2.2 cgd int dwlpx_bus_dmamap_load_mbuf_direct __P((bus_dma_tag_t, bus_dmamap_t, 77 1.2.2.2 cgd struct mbuf *, int)); 78 1.2.2.2 cgd int dwlpx_bus_dmamap_load_mbuf_sgmap __P((bus_dma_tag_t, bus_dmamap_t, 79 1.2.2.2 cgd struct mbuf *, int)); 80 1.2.2.2 cgd 81 1.2.2.2 cgd int dwlpx_bus_dmamap_load_uio_direct __P((bus_dma_tag_t, bus_dmamap_t, 82 1.2.2.2 cgd struct uio *, int)); 83 1.2.2.2 cgd int dwlpx_bus_dmamap_load_uio_sgmap __P((bus_dma_tag_t, bus_dmamap_t, 84 1.2.2.2 cgd struct uio *, int)); 85 1.2.2.2 cgd 86 1.2.2.2 cgd int dwlpx_bus_dmamap_load_raw_direct __P((bus_dma_tag_t, bus_dmamap_t, 87 1.2.2.2 cgd bus_dma_segment_t *, int, bus_size_t, int)); 88 1.2.2.2 cgd int dwlpx_bus_dmamap_load_raw_sgmap __P((bus_dma_tag_t, bus_dmamap_t, 89 1.2.2.2 cgd bus_dma_segment_t *, int, bus_size_t, int)); 90 1.2.2.2 cgd 91 1.2.2.2 cgd void dwlpx_bus_dmamap_unload_sgmap __P((bus_dma_tag_t, bus_dmamap_t)); 92 1.2.2.2 cgd 93 1.2.2.2 cgd /* 94 1.2.2.2 cgd * The direct-mapped DMA window begins at this PCI address. 95 1.2.2.2 cgd */ 96 1.2.2.2 cgd #define DWLPx_DIRECT_MAPPED_BASE 0x40000000 97 1.2.2.2 cgd 98 1.2.2.2 cgd void 99 1.2.2.2 cgd dwlpx_dma_init(ccp) 100 1.2.2.2 cgd struct dwlpx_config *ccp; 101 1.2.2.2 cgd { 102 1.2.2.2 cgd char *exname; 103 1.2.2.2 cgd bus_dma_tag_t t; 104 1.2.2.2 cgd u_int32_t *page_table; 105 1.2.2.2 cgd int i; 106 1.2.2.2 cgd 107 1.2.2.2 cgd /* 108 1.2.2.2 cgd * Initialize the DMA tag used for direct-mapped DMA. 109 1.2.2.2 cgd */ 110 1.2.2.2 cgd t = &ccp->cc_dmat_direct; 111 1.2.2.2 cgd t->_cookie = ccp; 112 1.2.2.2 cgd t->_get_tag = dwlpx_dma_get_tag; 113 1.2.2.2 cgd t->_dmamap_create = _bus_dmamap_create; 114 1.2.2.2 cgd t->_dmamap_destroy = _bus_dmamap_destroy; 115 1.2.2.2 cgd t->_dmamap_load = dwlpx_bus_dmamap_load_direct; 116 1.2.2.2 cgd t->_dmamap_load_mbuf = dwlpx_bus_dmamap_load_mbuf_direct; 117 1.2.2.2 cgd t->_dmamap_load_uio = dwlpx_bus_dmamap_load_uio_direct; 118 1.2.2.2 cgd t->_dmamap_load_raw = dwlpx_bus_dmamap_load_raw_direct; 119 1.2.2.2 cgd t->_dmamap_unload = _bus_dmamap_unload; 120 1.2.2.2 cgd t->_dmamap_sync = NULL; /* Nothing to do. */ 121 1.2.2.2 cgd 122 1.2.2.2 cgd t->_dmamem_alloc = _bus_dmamem_alloc; 123 1.2.2.2 cgd t->_dmamem_free = _bus_dmamem_free; 124 1.2.2.2 cgd t->_dmamem_map = _bus_dmamem_map; 125 1.2.2.2 cgd t->_dmamem_unmap = _bus_dmamem_unmap; 126 1.2.2.2 cgd t->_dmamem_mmap = _bus_dmamem_mmap; 127 1.2.2.2 cgd 128 1.2.2.2 cgd /* 129 1.2.2.2 cgd * Initialize the DMA tag used for sgmap-mapped DMA. 130 1.2.2.2 cgd */ 131 1.2.2.2 cgd t = &ccp->cc_dmat_sgmap; 132 1.2.2.2 cgd t->_cookie = ccp; 133 1.2.2.2 cgd t->_get_tag = dwlpx_dma_get_tag; 134 1.2.2.2 cgd t->_dmamap_create = dwlpx_bus_dmamap_create_sgmap; 135 1.2.2.2 cgd t->_dmamap_destroy = dwlpx_bus_dmamap_destroy_sgmap; 136 1.2.2.2 cgd t->_dmamap_load = dwlpx_bus_dmamap_load_sgmap; 137 1.2.2.2 cgd t->_dmamap_load_mbuf = dwlpx_bus_dmamap_load_mbuf_sgmap; 138 1.2.2.2 cgd t->_dmamap_load_uio = dwlpx_bus_dmamap_load_uio_sgmap; 139 1.2.2.2 cgd t->_dmamap_load_raw = dwlpx_bus_dmamap_load_raw_sgmap; 140 1.2.2.2 cgd t->_dmamap_unload = dwlpx_bus_dmamap_unload_sgmap; 141 1.2.2.2 cgd t->_dmamap_sync = NULL; /* Nothing to do. */ 142 1.2.2.2 cgd 143 1.2.2.2 cgd t->_dmamem_alloc = _bus_dmamem_alloc; 144 1.2.2.2 cgd t->_dmamem_free = _bus_dmamem_free; 145 1.2.2.2 cgd t->_dmamem_map = _bus_dmamem_map; 146 1.2.2.2 cgd t->_dmamem_unmap = _bus_dmamem_unmap; 147 1.2.2.2 cgd t->_dmamem_mmap = _bus_dmamem_mmap; 148 1.2.2.2 cgd 149 1.2.2.2 cgd /* 150 1.2.2.2 cgd * A few notes about SGMAP-mapped DMA on the DWLPx: 151 1.2.2.2 cgd * 152 1.2.2.2 cgd * The DWLPx has PCIA-resident SRAM that is used for 153 1.2.2.2 cgd * the SGMAP page table; there is no TLB. The DWLPA 154 1.2.2.2 cgd * has room for 32K entries, yielding a total of 256M 155 1.2.2.2 cgd * of sgva space. The DWLPB has 32K entries or 128K 156 1.2.2.2 cgd * entries, depending on TBIT, yielding wither 256M or 157 1.2.2.2 cgd * 1G of sgva space. 158 1.2.2.2 cgd * 159 1.2.2.2 cgd * This sgva space must be shared across all windows 160 1.2.2.2 cgd * that wish to use SGMAP-mapped DMA; make sure to 161 1.2.2.2 cgd * adjust the "sgvabase" argument to alpha_sgmap_init() 162 1.2.2.2 cgd * accordingly if you create more than one SGMAP-mapped 163 1.2.2.2 cgd * window. Note that sgvabase != window base. The former 164 1.2.2.2 cgd * is used to compute indexes into the page table only. 165 1.2.2.2 cgd * 166 1.2.2.2 cgd * In the current implementation, we follow the lead of 167 1.2.2.2 cgd * the workstation chipsets; the first window is an 8M 168 1.2.2.2 cgd * window SGMAP-mapped mapped at 8M, and the second window 169 1.2.2.2 cgd * is a 1G window direct-mapped mapped at 1G. 170 1.2.2.2 cgd */ 171 1.2.2.2 cgd 172 1.2.2.2 cgd /* 173 1.2.2.2 cgd * Initialize the page table. 174 1.2.2.2 cgd */ 175 1.2.2.2 cgd page_table = 176 1.2.2.2 cgd (u_int32_t *)ALPHA_PHYS_TO_K0SEG(PCIA_SGMAP_PT + ccp->cc_sysbase); 177 1.2.2.2 cgd for (i = 0; i < (32*1024); i++) 178 1.2.2.2 cgd page_table[i] = 0; 179 1.2.2.2 cgd alpha_mb(); 180 1.2.2.2 cgd 181 1.2.2.2 cgd /* 182 1.2.2.2 cgd * Initialize the SGMAP for window A: 183 1.2.2.2 cgd * 184 1.2.2.2 cgd * Size: 8M 185 1.2.2.2 cgd * Window base: 8M 186 1.2.2.2 cgd * SGVA base: 0 187 1.2.2.2 cgd */ 188 1.2.2.2 cgd exname = malloc(16, M_DEVBUF, M_NOWAIT); 189 1.2.2.2 cgd if (exname == NULL) 190 1.2.2.2 cgd panic("dwlpx_dma_init"); 191 1.2.2.2 cgd sprintf(exname, "%s_sgmap_a", ccp->cc_sc->dwlpx_dev.dv_xname); 192 1.2.2.2 cgd alpha_sgmap_init(t, &ccp->cc_sgmap, exname, 193 1.2.2.2 cgd (8*1024*1024), 0, (8*1024*1024), sizeof(u_int32_t), 194 1.2.2.2 cgd (void *)page_table); 195 1.2.2.2 cgd 196 1.2.2.2 cgd /* 197 1.2.2.2 cgd * Set up DMA windows for this DWLPx. 198 1.2.2.2 cgd * 199 1.2.2.2 cgd * Do this even for all HPCs- even for the nonexistent 200 1.2.2.2 cgd * one on hose zero of a KFTIA. 201 1.2.2.2 cgd */ 202 1.2.2.2 cgd for (i = 0; i < NHPC; i++) { 203 1.2.2.2 cgd REGVAL(PCIA_WMASK_A(i) + ccp->cc_sysbase) = PCIA_WMASK_8M; 204 1.2.2.2 cgd REGVAL(PCIA_TBASE_A(i) + ccp->cc_sysbase) = 0; 205 1.2.2.2 cgd alpha_mb(); 206 1.2.2.2 cgd REGVAL(PCIA_WBASE_A(i) + ccp->cc_sysbase) = 207 1.2.2.2 cgd (8*1024*1024) | PCIA_WBASE_W_EN | PCIA_WBASE_SG_EN; 208 1.2.2.2 cgd alpha_mb(); 209 1.2.2.2 cgd 210 1.2.2.2 cgd REGVAL(PCIA_WMASK_B(i) + ccp->cc_sysbase) = PCIA_WMASK_1G; 211 1.2.2.2 cgd REGVAL(PCIA_TBASE_B(i) + ccp->cc_sysbase) = 0; 212 1.2.2.2 cgd alpha_mb(); 213 1.2.2.2 cgd REGVAL(PCIA_WBASE_B(i) + ccp->cc_sysbase) = 214 1.2.2.2 cgd DWLPx_DIRECT_MAPPED_BASE | PCIA_WBASE_W_EN; 215 1.2.2.2 cgd alpha_mb(); 216 1.2.2.2 cgd 217 1.2.2.2 cgd REGVAL(PCIA_WMASK_C(i) + ccp->cc_sysbase) = 0; 218 1.2.2.2 cgd REGVAL(PCIA_TBASE_C(i) + ccp->cc_sysbase) = 0; 219 1.2.2.2 cgd alpha_mb(); 220 1.2.2.2 cgd REGVAL(PCIA_WBASE_C(i) + ccp->cc_sysbase) = 0; 221 1.2.2.2 cgd alpha_mb(); 222 1.2.2.2 cgd } 223 1.2.2.2 cgd 224 1.2.2.2 cgd /* XXX XXX BEGIN XXX XXX */ 225 1.2.2.2 cgd { /* XXX */ 226 1.2.2.2 cgd extern vm_offset_t alpha_XXX_dmamap_or; /* XXX */ 227 1.2.2.2 cgd alpha_XXX_dmamap_or = DWLPx_DIRECT_MAPPED_BASE; /* XXX */ 228 1.2.2.2 cgd } /* XXX */ 229 1.2.2.2 cgd /* XXX XXX END XXX XXX */ 230 1.2.2.2 cgd } 231 1.2.2.2 cgd 232 1.2.2.2 cgd /* 233 1.2.2.2 cgd * Return the bus dma tag to be used for the specified bus type. 234 1.2.2.2 cgd * INTERNAL USE ONLY! 235 1.2.2.2 cgd */ 236 1.2.2.2 cgd bus_dma_tag_t 237 1.2.2.2 cgd dwlpx_dma_get_tag(t, bustype) 238 1.2.2.2 cgd bus_dma_tag_t t; 239 1.2.2.2 cgd alpha_bus_t bustype; 240 1.2.2.2 cgd { 241 1.2.2.2 cgd struct dwlpx_config *ccp = t->_cookie; 242 1.2.2.2 cgd 243 1.2.2.2 cgd switch (bustype) { 244 1.2.2.2 cgd case ALPHA_BUS_PCI: 245 1.2.2.2 cgd case ALPHA_BUS_EISA: 246 1.2.2.2 cgd /* 247 1.2.2.2 cgd * XXX FIXME! 248 1.2.2.2 cgd * XXX If the system has more than 1G of RAM, 249 1.2.2.2 cgd * XXX we need to use SGMAPs, or some combination 250 1.2.2.2 cgd * XXX of direct-mapped and SGMAP-mapped DMA. 251 1.2.2.2 cgd */ 252 1.2.2.2 cgd return (&ccp->cc_dmat_direct); 253 1.2.2.2 cgd 254 1.2.2.2 cgd case ALPHA_BUS_ISA: 255 1.2.2.2 cgd /* 256 1.2.2.2 cgd * ISA doesn't have enough address bits to use 257 1.2.2.2 cgd * the direct-mapped DMA window, so we must use 258 1.2.2.2 cgd * SGMAPs. 259 1.2.2.2 cgd */ 260 1.2.2.2 cgd return (&ccp->cc_dmat_sgmap); 261 1.2.2.2 cgd 262 1.2.2.2 cgd default: 263 1.2.2.2 cgd panic("dwlpx_dma_get_tag: shouldn't be here, really..."); 264 1.2.2.2 cgd } 265 1.2.2.2 cgd } 266 1.2.2.2 cgd 267 1.2.2.2 cgd /* 268 1.2.2.2 cgd * Create a DWLPx SGMAP-mapped DMA map. 269 1.2.2.2 cgd */ 270 1.2.2.2 cgd int 271 1.2.2.2 cgd dwlpx_bus_dmamap_create_sgmap(t, size, nsegments, maxsegsz, boundary, 272 1.2.2.2 cgd flags, dmamp) 273 1.2.2.2 cgd bus_dma_tag_t t; 274 1.2.2.2 cgd bus_size_t size; 275 1.2.2.2 cgd int nsegments; 276 1.2.2.2 cgd bus_size_t maxsegsz; 277 1.2.2.2 cgd bus_size_t boundary; 278 1.2.2.2 cgd int flags; 279 1.2.2.2 cgd bus_dmamap_t *dmamp; 280 1.2.2.2 cgd { 281 1.2.2.2 cgd struct dwlpx_config *ccp = t->_cookie; 282 1.2.2.2 cgd struct alpha_sgmap_cookie *a; 283 1.2.2.2 cgd bus_dmamap_t map; 284 1.2.2.2 cgd int error; 285 1.2.2.2 cgd 286 1.2.2.2 cgd error = _bus_dmamap_create(t, size, nsegments, maxsegsz, 287 1.2.2.2 cgd boundary, flags, dmamp); 288 1.2.2.2 cgd if (error) 289 1.2.2.2 cgd return (error); 290 1.2.2.2 cgd 291 1.2.2.2 cgd map = *dmamp; 292 1.2.2.2 cgd 293 1.2.2.2 cgd a = malloc(sizeof(struct alpha_sgmap_cookie), M_DEVBUF, 294 1.2.2.2 cgd (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK); 295 1.2.2.2 cgd if (a == NULL) { 296 1.2.2.2 cgd _bus_dmamap_destroy(t, map); 297 1.2.2.2 cgd return (ENOMEM); 298 1.2.2.2 cgd } 299 1.2.2.2 cgd bzero(a, sizeof(struct alpha_sgmap_cookie)); 300 1.2.2.2 cgd map->_dm_sgcookie = a; 301 1.2.2.2 cgd 302 1.2.2.2 cgd if (flags & BUS_DMA_ALLOCNOW) { 303 1.2.2.2 cgd error = alpha_sgmap_alloc(map, round_page(size), 304 1.2.2.2 cgd &ccp->cc_sgmap, flags); 305 1.2.2.2 cgd if (error) 306 1.2.2.2 cgd dwlpx_bus_dmamap_destroy_sgmap(t, map); 307 1.2.2.2 cgd } 308 1.2.2.2 cgd 309 1.2.2.2 cgd return (error); 310 1.2.2.2 cgd } 311 1.2.2.2 cgd 312 1.2.2.2 cgd /* 313 1.2.2.2 cgd * Destroy a DWLPx SGMAP-mapped DMA map. 314 1.2.2.2 cgd */ 315 1.2.2.2 cgd void 316 1.2.2.2 cgd dwlpx_bus_dmamap_destroy_sgmap(t, map) 317 1.2.2.2 cgd bus_dma_tag_t t; 318 1.2.2.2 cgd bus_dmamap_t map; 319 1.2.2.2 cgd { 320 1.2.2.2 cgd struct dwlpx_config *ccp = t->_cookie; 321 1.2.2.2 cgd struct alpha_sgmap_cookie *a = map->_dm_sgcookie; 322 1.2.2.2 cgd 323 1.2.2.2 cgd if (a->apdc_flags & APDC_HAS_SGMAP) 324 1.2.2.2 cgd alpha_sgmap_free(&ccp->cc_sgmap, a); 325 1.2.2.2 cgd 326 1.2.2.2 cgd free(a, M_DEVBUF); 327 1.2.2.2 cgd _bus_dmamap_destroy(t, map); 328 1.2.2.2 cgd } 329 1.2.2.2 cgd 330 1.2.2.2 cgd /* 331 1.2.2.2 cgd * Load a DWLPx direct-mapped DMA map with a linear buffer. 332 1.2.2.2 cgd */ 333 1.2.2.2 cgd int 334 1.2.2.2 cgd dwlpx_bus_dmamap_load_direct(t, map, buf, buflen, p, flags) 335 1.2.2.2 cgd bus_dma_tag_t t; 336 1.2.2.2 cgd bus_dmamap_t map; 337 1.2.2.2 cgd void *buf; 338 1.2.2.2 cgd bus_size_t buflen; 339 1.2.2.2 cgd struct proc *p; 340 1.2.2.2 cgd int flags; 341 1.2.2.2 cgd { 342 1.2.2.2 cgd 343 1.2.2.2 cgd return (_bus_dmamap_load_direct_common(t, map, buf, buflen, p, 344 1.2.2.2 cgd flags, DWLPx_DIRECT_MAPPED_BASE)); 345 1.2.2.2 cgd } 346 1.2.2.2 cgd 347 1.2.2.2 cgd /* 348 1.2.2.2 cgd * Load a DWLPx SGMAP-mapped DMA map with a linear buffer. 349 1.2.2.2 cgd */ 350 1.2.2.2 cgd int 351 1.2.2.2 cgd dwlpx_bus_dmamap_load_sgmap(t, map, buf, buflen, p, flags) 352 1.2.2.2 cgd bus_dma_tag_t t; 353 1.2.2.2 cgd bus_dmamap_t map; 354 1.2.2.2 cgd void *buf; 355 1.2.2.2 cgd bus_size_t buflen; 356 1.2.2.2 cgd struct proc *p; 357 1.2.2.2 cgd int flags; 358 1.2.2.2 cgd { 359 1.2.2.2 cgd struct dwlpx_config *ccp = t->_cookie; 360 1.2.2.2 cgd 361 1.2.2.2 cgd return (pci_sgmap_pte32_load(t, map, buf, buflen, p, flags, 362 1.2.2.2 cgd &ccp->cc_sgmap)); 363 1.2.2.2 cgd } 364 1.2.2.2 cgd 365 1.2.2.2 cgd /* 366 1.2.2.2 cgd * Load a DWLPx direct-mapped DMA map with an mbuf chain. 367 1.2.2.2 cgd */ 368 1.2.2.2 cgd int 369 1.2.2.2 cgd dwlpx_bus_dmamap_load_mbuf_direct(t, map, m, flags) 370 1.2.2.2 cgd bus_dma_tag_t t; 371 1.2.2.2 cgd bus_dmamap_t map; 372 1.2.2.2 cgd struct mbuf *m; 373 1.2.2.2 cgd int flags; 374 1.2.2.2 cgd { 375 1.2.2.2 cgd 376 1.2.2.2 cgd return (_bus_dmamap_load_mbuf_direct_common(t, map, m, 377 1.2.2.2 cgd flags, DWLPx_DIRECT_MAPPED_BASE)); 378 1.2.2.2 cgd } 379 1.2.2.2 cgd 380 1.2.2.2 cgd /* 381 1.2.2.2 cgd * Load a DWLPx SGMAP-mapped DMA map with an mbuf chain. 382 1.2.2.2 cgd */ 383 1.2.2.2 cgd int 384 1.2.2.2 cgd dwlpx_bus_dmamap_load_mbuf_sgmap(t, map, m, flags) 385 1.2.2.2 cgd bus_dma_tag_t t; 386 1.2.2.2 cgd bus_dmamap_t map; 387 1.2.2.2 cgd struct mbuf *m; 388 1.2.2.2 cgd int flags; 389 1.2.2.2 cgd { 390 1.2.2.2 cgd struct dwlpx_config *ccp = t->_cookie; 391 1.2.2.2 cgd 392 1.2.2.2 cgd return (pci_sgmap_pte32_load_mbuf(t, map, m, flags, &ccp->cc_sgmap)); 393 1.2.2.2 cgd } 394 1.2.2.2 cgd 395 1.2.2.2 cgd /* 396 1.2.2.2 cgd * Load a DWLPx direct-mapped DMA map with a uio. 397 1.2.2.2 cgd */ 398 1.2.2.2 cgd int 399 1.2.2.2 cgd dwlpx_bus_dmamap_load_uio_direct(t, map, uio, flags) 400 1.2.2.2 cgd bus_dma_tag_t t; 401 1.2.2.2 cgd bus_dmamap_t map; 402 1.2.2.2 cgd struct uio *uio; 403 1.2.2.2 cgd int flags; 404 1.2.2.2 cgd { 405 1.2.2.2 cgd 406 1.2.2.2 cgd return (_bus_dmamap_load_uio_direct_common(t, map, uio, 407 1.2.2.2 cgd flags, DWLPx_DIRECT_MAPPED_BASE)); 408 1.2.2.2 cgd } 409 1.2.2.2 cgd 410 1.2.2.2 cgd /* 411 1.2.2.2 cgd * Load a DWLPx SGMAP-mapped DMA map with a uio. 412 1.2.2.2 cgd */ 413 1.2.2.2 cgd int 414 1.2.2.2 cgd dwlpx_bus_dmamap_load_uio_sgmap(t, map, uio, flags) 415 1.2.2.2 cgd bus_dma_tag_t t; 416 1.2.2.2 cgd bus_dmamap_t map; 417 1.2.2.2 cgd struct uio *uio; 418 1.2.2.2 cgd int flags; 419 1.2.2.2 cgd { 420 1.2.2.2 cgd struct dwlpx_config *ccp = t->_cookie; 421 1.2.2.2 cgd 422 1.2.2.2 cgd return (pci_sgmap_pte32_load_uio(t, map, uio, flags, &ccp->cc_sgmap)); 423 1.2.2.2 cgd } 424 1.2.2.2 cgd 425 1.2.2.2 cgd /* 426 1.2.2.2 cgd * Load a DWLPx direct-mapped DMA map with raw memory. 427 1.2.2.2 cgd */ 428 1.2.2.2 cgd int 429 1.2.2.2 cgd dwlpx_bus_dmamap_load_raw_direct(t, map, segs, nsegs, size, flags) 430 1.2.2.2 cgd bus_dma_tag_t t; 431 1.2.2.2 cgd bus_dmamap_t map; 432 1.2.2.2 cgd bus_dma_segment_t *segs; 433 1.2.2.2 cgd int nsegs; 434 1.2.2.2 cgd bus_size_t size; 435 1.2.2.2 cgd int flags; 436 1.2.2.2 cgd { 437 1.2.2.2 cgd 438 1.2.2.2 cgd return (_bus_dmamap_load_raw_direct_common(t, map, segs, nsegs, 439 1.2.2.2 cgd size, flags, DWLPx_DIRECT_MAPPED_BASE)); 440 1.2.2.2 cgd } 441 1.2.2.2 cgd 442 1.2.2.2 cgd /* 443 1.2.2.2 cgd * Load a DWLPx SGMAP-mapped DMA map with raw memory. 444 1.2.2.2 cgd */ 445 1.2.2.2 cgd int 446 1.2.2.2 cgd dwlpx_bus_dmamap_load_raw_sgmap(t, map, segs, nsegs, size, flags) 447 1.2.2.2 cgd bus_dma_tag_t t; 448 1.2.2.2 cgd bus_dmamap_t map; 449 1.2.2.2 cgd bus_dma_segment_t *segs; 450 1.2.2.2 cgd int nsegs; 451 1.2.2.2 cgd bus_size_t size; 452 1.2.2.2 cgd int flags; 453 1.2.2.2 cgd { 454 1.2.2.2 cgd struct dwlpx_config *ccp = t->_cookie; 455 1.2.2.2 cgd 456 1.2.2.2 cgd return (pci_sgmap_pte32_load_raw(t, map, segs, nsegs, size, flags, 457 1.2.2.2 cgd &ccp->cc_sgmap)); 458 1.2.2.2 cgd } 459 1.2.2.2 cgd 460 1.2.2.2 cgd /* 461 1.2.2.2 cgd * Unload a DWLPx DMA map. 462 1.2.2.2 cgd */ 463 1.2.2.2 cgd void 464 1.2.2.2 cgd dwlpx_bus_dmamap_unload_sgmap(t, map) 465 1.2.2.2 cgd bus_dma_tag_t t; 466 1.2.2.2 cgd bus_dmamap_t map; 467 1.2.2.2 cgd { 468 1.2.2.2 cgd struct dwlpx_config *ccp = t->_cookie; 469 1.2.2.2 cgd 470 1.2.2.2 cgd /* 471 1.2.2.2 cgd * Invalidate any SGMAP page table entries used by this 472 1.2.2.2 cgd * mapping. 473 1.2.2.2 cgd */ 474 1.2.2.2 cgd pci_sgmap_pte32_unload(t, map, &ccp->cc_sgmap); 475 1.2.2.2 cgd 476 1.2.2.2 cgd /* 477 1.2.2.2 cgd * Do the generic bits of the unload. 478 1.2.2.2 cgd */ 479 1.2.2.2 cgd _bus_dmamap_unload(t, map); 480 1.2.2.2 cgd } 481
Indexes created Mon Oct 27 08:10:08 GMT 2025