dwlpx_dma.c revision 1.8
1 /* $NetBSD: dwlpx_dma.c,v 1.8 1998/05/07 20:09:37 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPEDWLPxL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 41 42 __KERNEL_RCSID(0, "$NetBSD: dwlpx_dma.c,v 1.8 1998/05/07 20:09:37 thorpej Exp $"); 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/device.h> 48 #include <sys/malloc.h> 49 #include <vm/vm.h> 50 51 #define _ALPHA_BUS_DMA_PRIVATE 52 #include <machine/bus.h> 53 54 #include <dev/pci/pcireg.h> 55 #include <dev/pci/pcivar.h> 56 #include <alpha/tlsb/tlsbreg.h> 57 #include <alpha/tlsb/kftxxvar.h> 58 #include <alpha/tlsb/kftxxreg.h> 59 #include <alpha/pci/dwlpxreg.h> 60 #include <alpha/pci/dwlpxvar.h> 61 #include <alpha/pci/pci_kn8ae.h> 62 63 bus_dma_tag_t dwlpx_dma_get_tag __P((bus_dma_tag_t, alpha_bus_t)); 64 65 int dwlpx_bus_dmamap_create_sgmap __P((bus_dma_tag_t, bus_size_t, int, 66 bus_size_t, bus_size_t, int, bus_dmamap_t *)); 67 68 void dwlpx_bus_dmamap_destroy_sgmap __P((bus_dma_tag_t, bus_dmamap_t)); 69 70 int dwlpx_bus_dmamap_load_sgmap __P((bus_dma_tag_t, bus_dmamap_t, void *, 71 bus_size_t, struct proc *, int)); 72 73 int dwlpx_bus_dmamap_load_mbuf_sgmap __P((bus_dma_tag_t, bus_dmamap_t, 74 struct mbuf *, int)); 75 76 int dwlpx_bus_dmamap_load_uio_sgmap __P((bus_dma_tag_t, bus_dmamap_t, 77 struct uio *, int)); 78 79 int dwlpx_bus_dmamap_load_raw_sgmap __P((bus_dma_tag_t, bus_dmamap_t, 80 bus_dma_segment_t *, int, bus_size_t, int)); 81 82 void dwlpx_bus_dmamap_unload_sgmap __P((bus_dma_tag_t, bus_dmamap_t)); 83 84 #define DWLPx_DIRECT_MAPPED_BASE 0x80000000 85 #define DWLPx_SG_MAPPED_BASE 0x10000000 86 87 void 88 dwlpx_dma_init(ccp) 89 struct dwlpx_config *ccp; 90 { 91 char *exname; 92 bus_dma_tag_t t; 93 u_int32_t *page_table; 94 int i, lim, wmask; 95 96 /* 97 * Initialize the DMA tag used for direct-mapped DMA. 98 */ 99 t = &ccp->cc_dmat_direct; 100 t->_cookie = ccp; 101 t->_wbase = DWLPx_DIRECT_MAPPED_BASE; 102 t->_get_tag = dwlpx_dma_get_tag; 103 t->_dmamap_create = _bus_dmamap_create; 104 t->_dmamap_destroy = _bus_dmamap_destroy; 105 t->_dmamap_load = _bus_dmamap_load_direct; 106 t->_dmamap_load_mbuf = _bus_dmamap_load_mbuf_direct; 107 t->_dmamap_load_uio = _bus_dmamap_load_uio_direct; 108 t->_dmamap_load_raw = _bus_dmamap_load_raw_direct; 109 t->_dmamap_unload = _bus_dmamap_unload; 110 t->_dmamap_sync = _bus_dmamap_sync; 111 112 t->_dmamem_alloc = _bus_dmamem_alloc; 113 t->_dmamem_free = _bus_dmamem_free; 114 t->_dmamem_map = _bus_dmamem_map; 115 t->_dmamem_unmap = _bus_dmamem_unmap; 116 t->_dmamem_mmap = _bus_dmamem_mmap; 117 118 /* 119 * Initialize the DMA tag used for sgmap-mapped DMA. 120 */ 121 t = &ccp->cc_dmat_sgmap; 122 t->_cookie = ccp; 123 t->_wbase = DWLPx_SG_MAPPED_BASE; 124 t->_get_tag = dwlpx_dma_get_tag; 125 t->_dmamap_create = dwlpx_bus_dmamap_create_sgmap; 126 t->_dmamap_destroy = dwlpx_bus_dmamap_destroy_sgmap; 127 t->_dmamap_load = dwlpx_bus_dmamap_load_sgmap; 128 t->_dmamap_load_mbuf = dwlpx_bus_dmamap_load_mbuf_sgmap; 129 t->_dmamap_load_uio = dwlpx_bus_dmamap_load_uio_sgmap; 130 t->_dmamap_load_raw = dwlpx_bus_dmamap_load_raw_sgmap; 131 t->_dmamap_unload = dwlpx_bus_dmamap_unload_sgmap; 132 t->_dmamap_sync = _bus_dmamap_sync; 133 134 t->_dmamem_alloc = _bus_dmamem_alloc; 135 t->_dmamem_free = _bus_dmamem_free; 136 t->_dmamem_map = _bus_dmamem_map; 137 t->_dmamem_unmap = _bus_dmamem_unmap; 138 t->_dmamem_mmap = _bus_dmamem_mmap; 139 140 /* 141 * A few notes about SGMAP-mapped DMA on the DWLPx: 142 * 143 * The DWLPx has PCIA-resident SRAM that is used for 144 * the SGMAP page table; there is no TLB. The DWLPA 145 * has room for 32K entries, yielding a total of 256M 146 * of sgva space. The DWLPB has 32K entries or 128K 147 * entries, depending on TBIT, yielding either 256M or 148 * 1G of sgva space. 149 * 150 * This sgva space must be shared across all windows 151 * that wish to use SGMAP-mapped DMA; make sure to 152 * adjust the "sgvabase" argument to alpha_sgmap_init() 153 * accordingly if you create more than one SGMAP-mapped 154 * window. Note that sgvabase != window base. The former 155 * is used to compute indexes into the page table only. 156 * 157 * In the current implementation the first window is a 158 * 2G window direct-mapped mapped at 2G and the second 159 * window is disabled and the third window is a 256M 160 * or 1GB scatter/gather map at 1GB. 161 */ 162 163 /* 164 * Initialize the page table. 165 */ 166 page_table = 167 (u_int32_t *)ALPHA_PHYS_TO_K0SEG(PCIA_SGMAP_PT + ccp->cc_sysbase); 168 if (ccp->cc_sc->dwlpx_sgmapsz == DWLPX_SG128K) { 169 lim = 128 * 1024; 170 wmask = PCIA_WMASK_1G; 171 } else { 172 lim = 32 * 1024; 173 wmask = PCIA_WMASK_256M; 174 } 175 for (i = 0; i < lim; i++) 176 page_table[i * SGMAP_PTE_SPACING] = 0; 177 alpha_mb(); 178 179 /* 180 * Initialize the SGMAP for window C: 181 * 182 * Size: 256M or 1GB 183 * Window base: 1GB 184 * SGVA base: 0 185 */ 186 exname = malloc(16, M_DEVBUF, M_NOWAIT); 187 if (exname == NULL) 188 panic("dwlpx_dma_init"); 189 sprintf(exname, "%s_sgmap_a", ccp->cc_sc->dwlpx_dev.dv_xname); 190 alpha_sgmap_init(t, &ccp->cc_sgmap, exname, DWLPx_SG_MAPPED_BASE, 191 0, lim * NBPG, sizeof(u_int32_t), (void *)page_table, 0); 192 193 /* 194 * Set up DMA windows for this DWLPx. 195 * 196 * Do this even for all HPCs- even for the nonexistent 197 * one on hose zero of a KFTIA. 198 */ 199 for (i = 0; i < NHPC; i++) { 200 REGVAL(PCIA_WMASK_A(i) + ccp->cc_sysbase) = PCIA_WMASK_2G; 201 REGVAL(PCIA_TBASE_A(i) + ccp->cc_sysbase) = 0; 202 REGVAL(PCIA_WBASE_A(i) + ccp->cc_sysbase) = 203 DWLPx_DIRECT_MAPPED_BASE | PCIA_WBASE_W_EN; 204 205 REGVAL(PCIA_WMASK_B(i) + ccp->cc_sysbase) = 0; 206 REGVAL(PCIA_TBASE_B(i) + ccp->cc_sysbase) = 0; 207 REGVAL(PCIA_WBASE_B(i) + ccp->cc_sysbase) = 0; 208 209 REGVAL(PCIA_WMASK_C(i) + ccp->cc_sysbase) = wmask; 210 REGVAL(PCIA_TBASE_C(i) + ccp->cc_sysbase) = 0; 211 REGVAL(PCIA_WBASE_C(i) + ccp->cc_sysbase) = 212 DWLPx_SG_MAPPED_BASE | PCIA_WBASE_W_EN | PCIA_WBASE_SG_EN; 213 alpha_mb(); 214 } 215 216 /* XXX XXX BEGIN XXX XXX */ 217 { /* XXX */ 218 extern vm_offset_t alpha_XXX_dmamap_or; /* XXX */ 219 alpha_XXX_dmamap_or = DWLPx_DIRECT_MAPPED_BASE; /* XXX */ 220 } /* XXX */ 221 /* XXX XXX END XXX XXX */ 222 } 223 224 /* 225 * Return the bus dma tag to be used for the specified bus type. 226 * INTERNAL USE ONLY! 227 */ 228 bus_dma_tag_t 229 dwlpx_dma_get_tag(t, bustype) 230 bus_dma_tag_t t; 231 alpha_bus_t bustype; 232 { 233 struct dwlpx_config *ccp = t->_cookie; 234 extern int physmem; 235 236 switch (bustype) { 237 case ALPHA_BUS_PCI: 238 case ALPHA_BUS_EISA: 239 /* 240 * As best as I can tell from the DU source, you can't 241 * do DIRECT MAPPED and S/G at the same time. 242 */ 243 #ifndef MSS3_DEBUG_SG 244 if (physmem <= btoc(2048LL << 20LL)) 245 return (&ccp->cc_dmat_direct); 246 #endif 247 /* FALLTHROUGH */ 248 249 case ALPHA_BUS_ISA: 250 /* 251 * ISA doesn't have enough address bits to use 252 * the direct-mapped DMA window, so we must use 253 * SGMAPs. 254 */ 255 return (&ccp->cc_dmat_sgmap); 256 257 default: 258 panic("dwlpx_dma_get_tag: shouldn't be here, really..."); 259 } 260 } 261 262 /* 263 * Create a DWLPx SGMAP-mapped DMA map. 264 */ 265 int 266 dwlpx_bus_dmamap_create_sgmap(t, size, nsegments, maxsegsz, boundary, 267 flags, dmamp) 268 bus_dma_tag_t t; 269 bus_size_t size; 270 int nsegments; 271 bus_size_t maxsegsz; 272 bus_size_t boundary; 273 int flags; 274 bus_dmamap_t *dmamp; 275 { 276 struct dwlpx_config *ccp = t->_cookie; 277 bus_dmamap_t map; 278 int error; 279 280 error = _bus_dmamap_create(t, size, nsegments, maxsegsz, 281 boundary, flags, dmamp); 282 if (error) 283 return (error); 284 285 map = *dmamp; 286 287 if (flags & BUS_DMA_ALLOCNOW) { 288 error = alpha_sgmap_alloc(map, round_page(size), 289 &ccp->cc_sgmap, flags); 290 if (error) 291 dwlpx_bus_dmamap_destroy_sgmap(t, map); 292 } 293 294 return (error); 295 } 296 297 /* 298 * Destroy a DWLPx SGMAP-mapped DMA map. 299 */ 300 void 301 dwlpx_bus_dmamap_destroy_sgmap(t, map) 302 bus_dma_tag_t t; 303 bus_dmamap_t map; 304 { 305 struct dwlpx_config *ccp = t->_cookie; 306 307 if (map->_dm_flags & DMAMAP_HAS_SGMAP) 308 alpha_sgmap_free(map, &ccp->cc_sgmap); 309 310 _bus_dmamap_destroy(t, map); 311 } 312 313 /* 314 * Load a DWLPx SGMAP-mapped DMA map with a linear buffer. 315 */ 316 int 317 dwlpx_bus_dmamap_load_sgmap(t, map, buf, buflen, p, flags) 318 bus_dma_tag_t t; 319 bus_dmamap_t map; 320 void *buf; 321 bus_size_t buflen; 322 struct proc *p; 323 int flags; 324 { 325 struct dwlpx_config *ccp = t->_cookie; 326 327 return (pci_sgmap_pte32_load(t, map, buf, buflen, p, flags, 328 &ccp->cc_sgmap)); 329 } 330 331 /* 332 * Load a DWLPx SGMAP-mapped DMA map with an mbuf chain. 333 */ 334 int 335 dwlpx_bus_dmamap_load_mbuf_sgmap(t, map, m, flags) 336 bus_dma_tag_t t; 337 bus_dmamap_t map; 338 struct mbuf *m; 339 int flags; 340 { 341 struct dwlpx_config *ccp = t->_cookie; 342 343 return (pci_sgmap_pte32_load_mbuf(t, map, m, flags, &ccp->cc_sgmap)); 344 } 345 346 /* 347 * Load a DWLPx SGMAP-mapped DMA map with a uio. 348 */ 349 int 350 dwlpx_bus_dmamap_load_uio_sgmap(t, map, uio, flags) 351 bus_dma_tag_t t; 352 bus_dmamap_t map; 353 struct uio *uio; 354 int flags; 355 { 356 struct dwlpx_config *ccp = t->_cookie; 357 358 return (pci_sgmap_pte32_load_uio(t, map, uio, flags, &ccp->cc_sgmap)); 359 } 360 361 /* 362 * Load a DWLPx SGMAP-mapped DMA map with raw memory. 363 */ 364 int 365 dwlpx_bus_dmamap_load_raw_sgmap(t, map, segs, nsegs, size, flags) 366 bus_dma_tag_t t; 367 bus_dmamap_t map; 368 bus_dma_segment_t *segs; 369 int nsegs; 370 bus_size_t size; 371 int flags; 372 { 373 struct dwlpx_config *ccp = t->_cookie; 374 375 return (pci_sgmap_pte32_load_raw(t, map, segs, nsegs, size, flags, 376 &ccp->cc_sgmap)); 377 } 378 379 /* 380 * Unload a DWLPx DMA map. 381 */ 382 void 383 dwlpx_bus_dmamap_unload_sgmap(t, map) 384 bus_dma_tag_t t; 385 bus_dmamap_t map; 386 { 387 struct dwlpx_config *ccp = t->_cookie; 388 389 /* 390 * Invalidate any SGMAP page table entries used by this 391 * mapping. 392 */ 393 pci_sgmap_pte32_unload(t, map, &ccp->cc_sgmap); 394 395 /* 396 * Do the generic bits of the unload. 397 */ 398 _bus_dmamap_unload(t, map); 399 } 400
Indexes created Wed Oct 29 12:09:47 GMT 2025