irongate.c revision 1.17
1 /* $NetBSD: irongate.c,v 1.17 2021/04/24 23:36:23 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_api_up1000.h" 33 34 #include <sys/cdefs.h> 35 36 __KERNEL_RCSID(0, "$NetBSD: irongate.c,v 1.17 2021/04/24 23:36:23 thorpej Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 43 #include <machine/autoconf.h> 44 #include <machine/rpb.h> 45 #include <machine/sysarch.h> 46 47 #include <dev/isa/isareg.h> 48 #include <dev/isa/isavar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcivar.h> 51 #include <dev/pci/agpvar.h> 52 53 #include <alpha/pci/irongatereg.h> 54 #include <alpha/pci/irongatevar.h> 55 56 #ifdef API_UP1000 57 #include <alpha/pci/pci_up1000.h> 58 #endif 59 60 int irongate_match(device_t, cfdata_t, void *); 61 void irongate_attach(device_t, device_t, void *); 62 63 CFATTACH_DECL_NEW(irongate, sizeof(struct irongate_softc), 64 irongate_match, irongate_attach, NULL, NULL); 65 66 extern struct cfdriver irongate_cd; 67 68 /* There can be only one. */ 69 struct irongate_config irongate_configuration; 70 int irongate_found; 71 72 int irongate_bus_get_window(int, int, struct alpha_bus_space_translation *); 73 74 /* 75 * Set up the chipset's function pointers. 76 */ 77 void 78 irongate_init(struct irongate_config *icp, int mallocsafe) 79 { 80 pcitag_t tag; 81 pcireg_t reg; 82 83 icp->ic_mallocsafe = mallocsafe; 84 85 /* 86 * Set up PCI configuration space; we can only read the 87 * revision info through configuration space. 88 */ 89 irongate_pci_init(&icp->ic_pc, icp); 90 alpha_pci_chipset = &icp->ic_pc; 91 92 tag = pci_make_tag(&icp->ic_pc, 0, IRONGATE_PCIHOST_DEV, 0); 93 94 /* Read the revision. */ 95 reg = irongate_conf_read0(icp, tag, PCI_CLASS_REG); 96 icp->ic_rev = PCI_REVISION(reg); 97 98 if (icp->ic_initted == 0) { 99 /* Don't do these twice, since they set up extents. */ 100 irongate_bus_io_init(&icp->ic_iot, icp); 101 irongate_bus_mem_init(&icp->ic_memt, icp); 102 103 /* Only one each PCI I/O and MEM window. */ 104 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1; 105 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 1; 106 107 alpha_bus_get_window = irongate_bus_get_window; 108 } 109 110 icp->ic_initted = 1; 111 } 112 113 int 114 irongate_match(device_t parent, cfdata_t match, void *aux) 115 { 116 struct mainbus_attach_args *ma = aux; 117 118 /* Make sure we're looking for an Irongate. */ 119 if (strcmp(ma->ma_name, irongate_cd.cd_name) != 0) 120 return (0); 121 122 if (irongate_found) 123 return (0); 124 125 return (1); 126 } 127 128 void 129 irongate_attach(device_t parent, device_t self, void *aux) 130 { 131 struct irongate_softc *sc = device_private(self); 132 struct irongate_config *icp; 133 struct pcibus_attach_args pba; 134 struct agpbus_attach_args apa; 135 pcitag_t tag; 136 137 /* Note that we've attached the chipset; can't have 2 Irongates. */ 138 irongate_found = 1; 139 sc->sc_dev = self; 140 141 /* 142 * Set up the chipset's info; done once at console init time 143 * (maybe), but we must do it here as well to take care of things 144 * that need to use memory allocation. 145 */ 146 icp = sc->sc_icp = &irongate_configuration; 147 irongate_init(icp, 1); 148 149 printf(": AMD 751 Core Logic + AGP Chipset, rev. %d\n", icp->ic_rev); 150 151 irongate_dma_init(icp); 152 153 /* 154 * Do PCI memory initialization that needs to be deferred until 155 * malloc is safe. 156 */ 157 irongate_bus_mem_init2(&icp->ic_memt, icp); 158 159 switch (cputype) { 160 #ifdef API_UP1000 161 case ST_API_NAUTILUS: 162 pci_up1000_pickintr(icp); 163 break; 164 #endif 165 166 default: 167 panic("irongate_attach: shouldn't be here, really..."); 168 } 169 170 tag = pci_make_tag(&icp->ic_pc, 0, IRONGATE_PCIHOST_DEV, 0); 171 172 pba.pba_iot = &icp->ic_iot; 173 pba.pba_memt = &icp->ic_memt; 174 pba.pba_dmat = 175 alphabus_dma_get_tag(&icp->ic_dmat_pci, ALPHA_BUS_PCI); 176 pba.pba_dmat64 = NULL; 177 pba.pba_pc = &icp->ic_pc; 178 pba.pba_bus = 0; 179 pba.pba_bridgetag = NULL; 180 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY | 181 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 182 183 if (pci_get_capability(&icp->ic_pc, tag, PCI_CAP_AGP, 184 NULL, NULL) != 0) { 185 apa.apa_pci_args.pa_iot = pba.pba_iot; 186 apa.apa_pci_args.pa_memt = pba.pba_memt; 187 apa.apa_pci_args.pa_dmat = pba.pba_dmat; 188 apa.apa_pci_args.pa_pc = pba.pba_pc; 189 apa.apa_pci_args.pa_bus = pba.pba_bus; 190 apa.apa_pci_args.pa_device = IRONGATE_PCIHOST_DEV; 191 apa.apa_pci_args.pa_function = 0; 192 apa.apa_pci_args.pa_tag = tag; 193 apa.apa_pci_args.pa_id = 194 irongate_conf_read0(icp, tag, PCI_ID_REG); 195 apa.apa_pci_args.pa_class = 196 irongate_conf_read0(icp, tag, PCI_CLASS_REG); 197 apa.apa_pci_args.pa_flags = pba.pba_flags; 198 199 config_found(self, &apa, agpbusprint, 200 CFARG_IATTR, "agpbus", 201 CFARG_EOL); 202 } 203 204 config_found(self, &pba, pcibusprint, 205 CFARG_IATTR, "pcibus", 206 CFARG_EOL); 207 } 208 209 int 210 irongate_bus_get_window(int type, int window, 211 struct alpha_bus_space_translation *abst) 212 { 213 struct irongate_config *icp = &irongate_configuration; 214 bus_space_tag_t st; 215 int error; 216 217 switch (type) { 218 case ALPHA_BUS_TYPE_PCI_IO: 219 st = &icp->ic_iot; 220 break; 221 222 case ALPHA_BUS_TYPE_PCI_MEM: 223 st = &icp->ic_memt; 224 break; 225 226 default: 227 panic("irongate_bus_get_window"); 228 } 229 230 error = alpha_bus_space_get_window(st, window, abst); 231 if (error) 232 return (error); 233 234 abst->abst_sys_start = IRONGATE_PHYSADDR(abst->abst_sys_start); 235 abst->abst_sys_end = IRONGATE_PHYSADDR(abst->abst_sys_end); 236 237 return (0); 238 } 239
Indexes created Tue Sep 30 11:09:46 GMT 2025