irongate_pci.c revision 1.2
1 /* $NetBSD: irongate_pci.c,v 1.2 2000/06/29 08:58:47 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * PCI Configuration Space support for the AMD 751 (``Irongate'') core logic 41 * chipset. 42 */ 43 44 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 45 46 __KERNEL_RCSID(0, "$NetBSD: irongate_pci.c,v 1.2 2000/06/29 08:58:47 mrg Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/kernel.h> 51 #include <sys/device.h> 52 53 #include <uvm/uvm_extern.h> 54 55 #include <dev/pci/pcireg.h> 56 #include <dev/pci/pcivar.h> 57 #include <alpha/pci/irongatereg.h> 58 #include <alpha/pci/irongatevar.h> 59 60 void irongate_attach_hook __P((struct device *, struct device *, 61 struct pcibus_attach_args *)); 62 int irongate_bus_maxdevs __P((void *, int)); 63 pcitag_t irongate_make_tag __P((void *, int, int, int)); 64 void irongate_decompose_tag __P((void *, pcitag_t, int *, int *, 65 int *)); 66 pcireg_t irongate_conf_read __P((void *, pcitag_t, int)); 67 void irongate_conf_write __P((void *, pcitag_t, int, pcireg_t)); 68 69 /* AMD 751 systems are always single-processor, so this is easy. */ 70 #define PCI_CONF_LOCK(s) (s) = splhigh() 71 #define PCI_CONF_UNLOCK(s) splx((s)) 72 73 #define PCI_CONF_ADDR (IRONGATE_IO_BASE|IRONGATE_CONFADDR) 74 #define PCI_CONF_DATA (IRONGATE_IO_BASE|IRONGATE_CONFDATA) 75 76 #define REGVAL(r) (*(__volatile u_int32_t *)ALPHA_PHYS_TO_K0SEG(r)) 77 78 void 79 irongate_pci_init(pci_chipset_tag_t pc, void *v) 80 { 81 82 pc->pc_conf_v = v; 83 pc->pc_attach_hook = irongate_attach_hook; 84 pc->pc_bus_maxdevs = irongate_bus_maxdevs; 85 pc->pc_make_tag = irongate_make_tag; 86 pc->pc_decompose_tag = irongate_decompose_tag; 87 pc->pc_conf_read = irongate_conf_read; 88 pc->pc_conf_write = irongate_conf_write; 89 } 90 91 void 92 irongate_attach_hook(struct device *parent, struct device *self, 93 struct pcibus_attach_args *pba) 94 { 95 } 96 97 int 98 irongate_bus_maxdevs(void *ipv, int busno) 99 { 100 101 return 32; 102 } 103 104 pcitag_t 105 irongate_make_tag(void *ipv, int b, int d, int f) 106 { 107 108 return (b << 16) | (d << 11) | (f << 8); 109 } 110 111 void 112 irongate_decompose_tag(void *ipv, pcitag_t tag, int *bp, int *dp, int *fp) 113 { 114 115 if (bp != NULL) 116 *bp = (tag >> 16) & 0xff; 117 if (dp != NULL) 118 *dp = (tag >> 11) & 0x1f; 119 if (fp != NULL) 120 *fp = (tag >> 8) & 0x7; 121 } 122 123 pcireg_t 124 irongate_conf_read(void *ipv, pcitag_t tag, int offset) 125 { 126 int d; 127 128 /* 129 * The AMD 751 appears in PCI configuration space, but 130 * that is ... counter-intuitive to the way we normally 131 * attach PCI-Host bridges on the Alpha. So, filter out 132 * the AMD 751 device here. We provide a private entry 133 * point for getting at it from machdep code. 134 */ 135 irongate_decompose_tag(ipv, tag, NULL, &d, NULL); 136 if (d == IRONGATE_PCIHOST_DEV) 137 return ((pcireg_t) -1); 138 139 return (irongate_conf_read0(ipv, tag, offset)); 140 } 141 142 pcireg_t 143 irongate_conf_read0(void *ipv, pcitag_t tag, int offset) 144 { 145 pcireg_t data; 146 int s; 147 148 PCI_CONF_LOCK(s); 149 REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff)); 150 alpha_mb(); 151 data = REGVAL(PCI_CONF_DATA); 152 REGVAL(PCI_CONF_ADDR) = 0; 153 alpha_mb(); 154 PCI_CONF_UNLOCK(s); 155 156 return (data); 157 } 158 159 void 160 irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data) 161 { 162 int s; 163 164 PCI_CONF_LOCK(s); 165 REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff)); 166 alpha_mb(); 167 REGVAL(PCI_CONF_DATA) = data; 168 alpha_mb(); 169 REGVAL(PCI_CONF_ADDR) = 0; 170 alpha_mb(); 171 PCI_CONF_UNLOCK(s); 172 } 173
Indexes created Wed Sep 24 05:09:52 GMT 2025