lca.c revision 1.32 1 1.32 thorpej /* $NetBSD: lca.c,v 1.32 1998/06/27 10:10:52 thorpej Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.4 cgd * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.3 cgd * Authors: Jeffrey Hsu and Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.17 cgd
30 1.25 thorpej #include "opt_dec_axppci_33.h"
31 1.31 thorpej #include "opt_dec_alphabook1.h"
32 1.32 thorpej #include "opt_dec_eb66.h"
33 1.24 thorpej
34 1.18 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
35 1.18 cgd
36 1.32 thorpej __KERNEL_RCSID(0, "$NetBSD: lca.c,v 1.32 1998/06/27 10:10:52 thorpej Exp $");
37 1.1 cgd
38 1.1 cgd #include <sys/param.h>
39 1.1 cgd #include <sys/systm.h>
40 1.1 cgd #include <sys/kernel.h>
41 1.1 cgd #include <sys/malloc.h>
42 1.1 cgd #include <sys/device.h>
43 1.1 cgd #include <vm/vm.h>
44 1.1 cgd
45 1.1 cgd #include <machine/autoconf.h>
46 1.1 cgd #include <machine/rpb.h>
47 1.1 cgd
48 1.1 cgd #include <dev/isa/isareg.h>
49 1.1 cgd #include <dev/isa/isavar.h>
50 1.1 cgd
51 1.1 cgd #include <dev/pci/pcireg.h>
52 1.1 cgd #include <dev/pci/pcivar.h>
53 1.1 cgd #include <alpha/pci/lcareg.h>
54 1.1 cgd #include <alpha/pci/lcavar.h>
55 1.16 cgd #ifdef DEC_AXPPCI_33
56 1.7 cgd #include <alpha/pci/pci_axppci_33.h>
57 1.7 cgd #endif
58 1.30 thorpej #ifdef DEC_ALPHABOOK1
59 1.30 thorpej #include <alpha/pci/pci_alphabook1.h>
60 1.30 thorpej #endif
61 1.32 thorpej #ifdef DEC_EB66
62 1.32 thorpej #include <alpha/pci/pci_eb66.h>
63 1.32 thorpej #endif
64 1.1 cgd
65 1.14 cgd int lcamatch __P((struct device *, struct cfdata *, void *));
66 1.1 cgd void lcaattach __P((struct device *, struct device *, void *));
67 1.1 cgd
68 1.2 thorpej struct cfattach lca_ca = {
69 1.3 cgd sizeof(struct lca_softc), lcamatch, lcaattach,
70 1.2 thorpej };
71 1.2 thorpej
72 1.26 thorpej extern struct cfdriver lca_cd;
73 1.1 cgd
74 1.8 cgd static int lcaprint __P((void *, const char *pnp));
75 1.1 cgd
76 1.1 cgd /* There can be only one. */
77 1.1 cgd int lcafound;
78 1.1 cgd struct lca_config lca_configuration;
79 1.1 cgd
80 1.1 cgd int
81 1.1 cgd lcamatch(parent, match, aux)
82 1.1 cgd struct device *parent;
83 1.14 cgd struct cfdata *match;
84 1.14 cgd void *aux;
85 1.1 cgd {
86 1.28 thorpej struct mainbus_attach_args *ma = aux;
87 1.1 cgd
88 1.1 cgd /* Make sure that we're looking for a LCA. */
89 1.28 thorpej if (strcmp(ma->ma_name, lca_cd.cd_name) != 0)
90 1.1 cgd return (0);
91 1.1 cgd
92 1.1 cgd if (lcafound)
93 1.1 cgd return (0);
94 1.1 cgd
95 1.1 cgd return (1);
96 1.1 cgd }
97 1.1 cgd
98 1.1 cgd /*
99 1.1 cgd * Set up the chipset's function pointers.
100 1.1 cgd */
101 1.1 cgd void
102 1.13 cgd lca_init(lcp, mallocsafe)
103 1.1 cgd struct lca_config *lcp;
104 1.13 cgd int mallocsafe;
105 1.1 cgd {
106 1.1 cgd
107 1.1 cgd /*
108 1.13 cgd * The LCA HAE register is WRITE-ONLY, so we can't tell where
109 1.13 cgd * the second sparse window is actually mapped. Therefore,
110 1.13 cgd * we have to guess where it is. This seems to be the normal
111 1.13 cgd * address.
112 1.13 cgd */
113 1.13 cgd lcp->lc_s_mem_w2_masked_base = 0x80000000;
114 1.13 cgd
115 1.13 cgd if (!lcp->lc_initted) {
116 1.13 cgd /* don't do these twice since they set up extents */
117 1.21 thorpej lca_bus_io_init(&lcp->lc_iot, lcp);
118 1.21 thorpej lca_bus_mem_init(&lcp->lc_memt, lcp);
119 1.13 cgd }
120 1.13 cgd lcp->lc_mallocsafe = mallocsafe;
121 1.13 cgd
122 1.3 cgd lca_pci_init(&lcp->lc_pc, lcp);
123 1.1 cgd
124 1.5 cgd /*
125 1.5 cgd * Refer to ``DECchip 21066 and DECchip 21068 Alpha AXP Microprocessors
126 1.5 cgd * Hardware Reference Manual''.
127 1.5 cgd * ...
128 1.5 cgd */
129 1.5 cgd
130 1.5 cgd /*
131 1.5 cgd * According to section 6.4.1, all bits of the IOC_HAE register are
132 1.5 cgd * undefined after reset. Bits <31:27> are write-only. However, we
133 1.5 cgd * cannot blindly set it to zero. The serial ROM code that initializes
134 1.5 cgd * the PCI devices' address spaces, allocates sparse memory blocks in
135 1.5 cgd * the range that must use the IOC_HAE register for address translation,
136 1.5 cgd * and sets this register accordingly (see section 6.4.14).
137 1.5 cgd *
138 1.5 cgd * IOC_HAE left AS IS.
139 1.5 cgd */
140 1.1 cgd
141 1.5 cgd /* According to section 6.4.2, all bits of the IOC_CONF register are
142 1.5 cgd * undefined after reset. Bits <1:0> are write-only. Set them to
143 1.5 cgd * 0x00 for PCI Type 0 configuration access.
144 1.5 cgd *
145 1.5 cgd * IOC_CONF set to ZERO.
146 1.5 cgd */
147 1.20 thorpej REGVAL64(LCA_IOC_CONF) = 0;
148 1.1 cgd
149 1.13 cgd lcp->lc_initted = 1;
150 1.1 cgd }
151 1.1 cgd
152 1.1 cgd void
153 1.1 cgd lcaattach(parent, self, aux)
154 1.1 cgd struct device *parent, *self;
155 1.1 cgd void *aux;
156 1.1 cgd {
157 1.1 cgd struct lca_softc *sc = (struct lca_softc *)self;
158 1.1 cgd struct lca_config *lcp;
159 1.3 cgd struct pcibus_attach_args pba;
160 1.1 cgd
161 1.1 cgd /* note that we've attached the chipset; can't have 2 LCAs. */
162 1.1 cgd /* Um, not sure about this. XXX JH */
163 1.1 cgd lcafound = 1;
164 1.1 cgd
165 1.1 cgd /*
166 1.1 cgd * set up the chipset's info; done once at console init time
167 1.20 thorpej * (maybe), but we must do it twice to take care of things
168 1.20 thorpej * that need to use memory allocation.
169 1.1 cgd */
170 1.1 cgd lcp = sc->sc_lcp = &lca_configuration;
171 1.13 cgd lca_init(lcp, 1);
172 1.1 cgd
173 1.1 cgd /* XXX print chipset information */
174 1.10 christos printf("\n");
175 1.29 thorpej
176 1.29 thorpej lca_dma_init(lcp);
177 1.1 cgd
178 1.1 cgd switch (hwrpb->rpb_type) {
179 1.16 cgd #ifdef DEC_AXPPCI_33
180 1.1 cgd case ST_DEC_AXPPCI_33:
181 1.3 cgd pci_axppci_33_pickintr(lcp);
182 1.30 thorpej break;
183 1.30 thorpej #endif
184 1.30 thorpej #ifdef DEC_ALPHABOOK1
185 1.30 thorpej case ST_ALPHABOOK1:
186 1.30 thorpej pci_alphabook1_pickintr(lcp);
187 1.32 thorpej break;
188 1.32 thorpej #endif
189 1.32 thorpej #ifdef DEC_EB66
190 1.32 thorpej case ST_EB66:
191 1.32 thorpej pci_eb66_pickintr(lcp);
192 1.1 cgd break;
193 1.1 cgd #endif
194 1.12 cgd
195 1.1 cgd default:
196 1.1 cgd panic("lcaattach: shouldn't be here, really...");
197 1.1 cgd }
198 1.1 cgd
199 1.3 cgd pba.pba_busname = "pci";
200 1.22 thorpej pba.pba_iot = &lcp->lc_iot;
201 1.22 thorpej pba.pba_memt = &lcp->lc_memt;
202 1.27 thorpej pba.pba_dmat =
203 1.27 thorpej alphabus_dma_get_tag(&lcp->lc_dmat_direct, ALPHA_BUS_PCI);
204 1.3 cgd pba.pba_pc = &lcp->lc_pc;
205 1.3 cgd pba.pba_bus = 0;
206 1.19 cgd pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
207 1.3 cgd config_found(self, &pba, lcaprint);
208 1.1 cgd }
209 1.1 cgd
210 1.1 cgd static int
211 1.1 cgd lcaprint(aux, pnp)
212 1.1 cgd void *aux;
213 1.8 cgd const char *pnp;
214 1.1 cgd {
215 1.13 cgd register struct pcibus_attach_args *pba = aux;
216 1.1 cgd
217 1.1 cgd /* only PCIs can attach to LCAes; easy. */
218 1.1 cgd if (pnp)
219 1.10 christos printf("%s at %s", pba->pba_busname, pnp);
220 1.10 christos printf(" bus %d", pba->pba_bus);
221 1.1 cgd return (UNCONF);
222 1.1 cgd }
223