Home | History | Annotate | Line # | Download | only in pci
lca.c revision 1.14
      1 /*	$NetBSD: lca.c,v 1.14 1996/12/05 01:39:35 cgd Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Authors: Jeffrey Hsu and Chris G. Demetriou
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/param.h>
     31 #include <sys/systm.h>
     32 #include <sys/kernel.h>
     33 #include <sys/malloc.h>
     34 #include <sys/device.h>
     35 #include <vm/vm.h>
     36 
     37 #include <machine/autoconf.h>
     38 #include <machine/rpb.h>
     39 
     40 #include <dev/isa/isareg.h>
     41 #include <dev/isa/isavar.h>
     42 
     43 #include <dev/pci/pcireg.h>
     44 #include <dev/pci/pcivar.h>
     45 #include <alpha/pci/lcareg.h>
     46 #include <alpha/pci/lcavar.h>
     47 #if defined(DEC_AXPPCI_33)
     48 #include <alpha/pci/pci_axppci_33.h>
     49 #endif
     50 
     51 #ifdef __BROKEN_INDIRECT_CONFIG
     52 int	lcamatch __P((struct device *, void *, void *));
     53 #else
     54 int	lcamatch __P((struct device *, struct cfdata *, void *));
     55 #endif
     56 void	lcaattach __P((struct device *, struct device *, void *));
     57 
     58 struct cfattach lca_ca = {
     59 	sizeof(struct lca_softc), lcamatch, lcaattach,
     60 };
     61 
     62 struct cfdriver lca_cd = {
     63 	NULL, "lca", DV_DULL,
     64 };
     65 
     66 static int	lcaprint __P((void *, const char *pnp));
     67 
     68 /* There can be only one. */
     69 int lcafound;
     70 struct lca_config lca_configuration;
     71 
     72 int
     73 lcamatch(parent, match, aux)
     74 	struct device *parent;
     75 #ifdef __BROKEN_INDIRECT_CONFIG
     76 	void *match;
     77 #else
     78 	struct cfdata *match;
     79 #endif
     80 	void *aux;
     81 {
     82 	struct confargs *ca = aux;
     83 
     84 	/* Make sure that we're looking for a LCA. */
     85 	if (strcmp(ca->ca_name, lca_cd.cd_name) != 0)
     86 		return (0);
     87 
     88 	if (lcafound)
     89 		return (0);
     90 
     91 	return (1);
     92 }
     93 
     94 /*
     95  * Set up the chipset's function pointers.
     96  */
     97 void
     98 lca_init(lcp, mallocsafe)
     99 	struct lca_config *lcp;
    100 	int mallocsafe;
    101 {
    102 
    103 	/*
    104 	 * Can't set up SGMAP data here; can be called before malloc().
    105 	 */
    106 
    107 	/*
    108 	 * The LCA HAE register is WRITE-ONLY, so we can't tell where
    109 	 * the second sparse window is actually mapped.  Therefore,
    110 	 * we have to guess where it is.  This seems to be the normal
    111 	 * address.
    112 	 */
    113 	lcp->lc_s_mem_w2_masked_base = 0x80000000;
    114 
    115 	if (!lcp->lc_initted) {
    116 		/* don't do these twice since they set up extents */
    117 		lcp->lc_iot = lca_bus_io_init(lcp);
    118 		lcp->lc_memt = lca_bus_mem_init(lcp);
    119 	}
    120 	lcp->lc_mallocsafe = mallocsafe;
    121 
    122 	lca_pci_init(&lcp->lc_pc, lcp);
    123 
    124 	/*
    125 	 * Refer to ``DECchip 21066 and DECchip 21068 Alpha AXP Microprocessors
    126 	 * Hardware Reference Manual''.
    127 	 * ...
    128 	 */
    129 
    130 	/*
    131 	 * According to section 6.4.1, all bits of the IOC_HAE register are
    132 	 * undefined after reset.  Bits <31:27> are write-only.  However, we
    133 	 * cannot blindly set it to zero.  The serial ROM code that initializes
    134 	 * the PCI devices' address spaces, allocates sparse memory blocks in
    135 	 * the range that must use the IOC_HAE register for address translation,
    136 	 * and sets this register accordingly (see section 6.4.14).
    137 	 *
    138 	 *	IOC_HAE left AS IS.
    139 	 */
    140 
    141 	/* According to section 6.4.2, all bits of the IOC_CONF register are
    142 	 * undefined after reset.  Bits <1:0> are write-only.  Set them to
    143 	 * 0x00 for PCI Type 0 configuration access.
    144 	 *
    145 	 *	IOC_CONF set to ZERO.
    146 	 */
    147 	REGVAL(LCA_IOC_CONF) = 0;
    148 
    149 	/* Turn off DMA window enables in Window Base Registers */
    150 /*	REGVAL(LCA_IOC_W_BASE0) = 0;
    151 	REGVAL(LCA_IOC_W_BASE1) = 0; */
    152 	alpha_mb();
    153 
    154 	/* XXX XXX BEGIN XXX XXX */
    155 	{							/* XXX */
    156 		extern vm_offset_t alpha_XXX_dmamap_or;		/* XXX */
    157 		alpha_XXX_dmamap_or = 0x40000000;		/* XXX */
    158 	}							/* XXX */
    159 	/* XXX XXX END XXX XXX */
    160 
    161 	lcp->lc_initted = 1;
    162 }
    163 
    164 #ifdef notdef
    165 void
    166 lca_init_sgmap(lcp)
    167 	struct lca_config *lcp;
    168 {
    169 
    170 	/* XXX */
    171 	lcp->lc_sgmap = malloc(1024 * 8, M_DEVBUF, M_WAITOK);
    172 	bzero(lcp->lc_sgmap, 1024 * 8);		/* clear all entries. */
    173 
    174 	REGVAL(LCA_IOC_W_BASE0) = 0;
    175 	alpha_mb();
    176 
    177 	/* Set up Translated Base Register 1; translate to sybBus addr 0. */
    178 	/* check size against APEC XXX JH */
    179 	REGVAL(LCA_IOC_T_BASE_0) = vtophys(lcp->lc_sgmap) >> 1;
    180 
    181 	/* Set up PCI mask register 1; map 8MB space. */
    182 	REGVAL(LCA_IOC_W_MASK0) = 0x00700000;
    183 
    184 	/* Enable window 1; from PCI address 8MB, direct mapped. */
    185 	REGVAL(LCA_IOC_W_BASE0) = 0x300800000;
    186 	alpha_mb();
    187 }
    188 #endif
    189 
    190 void
    191 lcaattach(parent, self, aux)
    192 	struct device *parent, *self;
    193 	void *aux;
    194 {
    195 	struct lca_softc *sc = (struct lca_softc *)self;
    196 	struct lca_config *lcp;
    197 	struct pcibus_attach_args pba;
    198 
    199 	/* note that we've attached the chipset; can't have 2 LCAs. */
    200 	/* Um, not sure about this.  XXX JH */
    201 	lcafound = 1;
    202 
    203 	/*
    204 	 * set up the chipset's info; done once at console init time
    205 	 * (maybe), but doesn't hurt to do twice.
    206 	 */
    207 	lcp = sc->sc_lcp = &lca_configuration;
    208 	lca_init(lcp, 1);
    209 #ifdef notdef
    210 	lca_init_sgmap(lcp);
    211 #endif
    212 
    213 	/* XXX print chipset information */
    214 	printf("\n");
    215 
    216 	switch (hwrpb->rpb_type) {
    217 #if defined(DEC_AXPPCI_33)
    218 	case ST_DEC_AXPPCI_33:
    219 		pci_axppci_33_pickintr(lcp);
    220 		break;
    221 #endif
    222 
    223 	default:
    224 		panic("lcaattach: shouldn't be here, really...");
    225 	}
    226 
    227 	pba.pba_busname = "pci";
    228 	pba.pba_iot = lcp->lc_iot;
    229 	pba.pba_memt = lcp->lc_memt;
    230 	pba.pba_pc = &lcp->lc_pc;
    231 	pba.pba_bus = 0;
    232 	config_found(self, &pba, lcaprint);
    233 }
    234 
    235 static int
    236 lcaprint(aux, pnp)
    237 	void *aux;
    238 	const char *pnp;
    239 {
    240 	register struct pcibus_attach_args *pba = aux;
    241 
    242 	/* only PCIs can attach to LCAes; easy. */
    243 	if (pnp)
    244 		printf("%s at %s", pba->pba_busname, pnp);
    245 	printf(" bus %d", pba->pba_bus);
    246 	return (UNCONF);
    247 }
    248