lca.c revision 1.41 1 /* $NetBSD: lca.c,v 1.41 2003/06/15 23:08:55 fvdl Exp $ */
2
3 /*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
41 * All rights reserved.
42 *
43 * Authors: Jeffrey Hsu and Chris G. Demetriou
44 *
45 * Permission to use, copy, modify and distribute this software and
46 * its documentation is hereby granted, provided that both the copyright
47 * notice and this permission notice appear in all copies of the
48 * software, derivative works or modified versions, and any portions
49 * thereof, and that both notices appear in supporting documentation.
50 *
51 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
52 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
53 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
54 *
55 * Carnegie Mellon requests users of this software to return to
56 *
57 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
58 * School of Computer Science
59 * Carnegie Mellon University
60 * Pittsburgh PA 15213-3890
61 *
62 * any improvements or extensions that they make and grant Carnegie the
63 * rights to redistribute these changes.
64 */
65
66 #include "opt_dec_axppci_33.h"
67 #include "opt_dec_alphabook1.h"
68 #include "opt_dec_eb66.h"
69
70 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
71
72 __KERNEL_RCSID(0, "$NetBSD: lca.c,v 1.41 2003/06/15 23:08:55 fvdl Exp $");
73
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/kernel.h>
77 #include <sys/malloc.h>
78 #include <sys/device.h>
79
80 #include <uvm/uvm_extern.h>
81
82 #include <machine/autoconf.h>
83 #include <machine/rpb.h>
84 #include <machine/sysarch.h>
85
86 #include <dev/isa/isareg.h>
87 #include <dev/isa/isavar.h>
88
89 #include <dev/pci/pcireg.h>
90 #include <dev/pci/pcivar.h>
91 #include <alpha/pci/lcareg.h>
92 #include <alpha/pci/lcavar.h>
93 #ifdef DEC_AXPPCI_33
94 #include <alpha/pci/pci_axppci_33.h>
95 #endif
96 #ifdef DEC_ALPHABOOK1
97 #include <alpha/pci/pci_alphabook1.h>
98 #endif
99 #ifdef DEC_EB66
100 #include <alpha/pci/pci_eb66.h>
101 #endif
102
103 int lcamatch __P((struct device *, struct cfdata *, void *));
104 void lcaattach __P((struct device *, struct device *, void *));
105
106 CFATTACH_DECL(lca, sizeof(struct lca_softc),
107 lcamatch, lcaattach, NULL, NULL);
108
109 extern struct cfdriver lca_cd;
110
111 static int lcaprint __P((void *, const char *pnp));
112
113 int lca_bus_get_window __P((int, int,
114 struct alpha_bus_space_translation *));
115
116 /* There can be only one. */
117 int lcafound;
118 struct lca_config lca_configuration;
119
120 int
121 lcamatch(parent, match, aux)
122 struct device *parent;
123 struct cfdata *match;
124 void *aux;
125 {
126 struct mainbus_attach_args *ma = aux;
127
128 /* Make sure that we're looking for a LCA. */
129 if (strcmp(ma->ma_name, lca_cd.cd_name) != 0)
130 return (0);
131
132 if (lcafound)
133 return (0);
134
135 return (1);
136 }
137
138 /*
139 * Set up the chipset's function pointers.
140 */
141 void
142 lca_init(lcp, mallocsafe)
143 struct lca_config *lcp;
144 int mallocsafe;
145 {
146
147 /*
148 * The LCA HAE register is WRITE-ONLY, so we can't tell where
149 * the second sparse window is actually mapped. Therefore,
150 * we have to guess where it is. This seems to be the normal
151 * address.
152 */
153 lcp->lc_s_mem_w2_masked_base = 0x80000000;
154
155 if (!lcp->lc_initted) {
156 /* don't do these twice since they set up extents */
157 lca_bus_io_init(&lcp->lc_iot, lcp);
158 lca_bus_mem_init(&lcp->lc_memt, lcp);
159
160 /*
161 * We have 1 I/O window and 3 MEM windows.
162 */
163 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1;
164 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3;
165 alpha_bus_get_window = lca_bus_get_window;
166 }
167 lcp->lc_mallocsafe = mallocsafe;
168
169 lca_pci_init(&lcp->lc_pc, lcp);
170 alpha_pci_chipset = &lcp->lc_pc;
171
172 /*
173 * Refer to ``DECchip 21066 and DECchip 21068 Alpha AXP Microprocessors
174 * Hardware Reference Manual''.
175 * ...
176 */
177
178 /*
179 * According to section 6.4.1, all bits of the IOC_HAE register are
180 * undefined after reset. Bits <31:27> are write-only. However, we
181 * cannot blindly set it to zero. The serial ROM code that initializes
182 * the PCI devices' address spaces, allocates sparse memory blocks in
183 * the range that must use the IOC_HAE register for address translation,
184 * and sets this register accordingly (see section 6.4.14).
185 *
186 * IOC_HAE left AS IS.
187 */
188
189 /* According to section 6.4.2, all bits of the IOC_CONF register are
190 * undefined after reset. Bits <1:0> are write-only. Set them to
191 * 0x00 for PCI Type 0 configuration access.
192 *
193 * IOC_CONF set to ZERO.
194 */
195 REGVAL64(LCA_IOC_CONF) = 0;
196
197 lcp->lc_initted = 1;
198 }
199
200 void
201 lcaattach(parent, self, aux)
202 struct device *parent, *self;
203 void *aux;
204 {
205 struct lca_softc *sc = (struct lca_softc *)self;
206 struct lca_config *lcp;
207 struct pcibus_attach_args pba;
208
209 /* note that we've attached the chipset; can't have 2 LCAs. */
210 /* Um, not sure about this. XXX JH */
211 lcafound = 1;
212
213 /*
214 * set up the chipset's info; done once at console init time
215 * (maybe), but we must do it twice to take care of things
216 * that need to use memory allocation.
217 */
218 lcp = sc->sc_lcp = &lca_configuration;
219 lca_init(lcp, 1);
220
221 /* XXX print chipset information */
222 printf("\n");
223
224 lca_dma_init(lcp);
225
226 switch (cputype) {
227 #ifdef DEC_AXPPCI_33
228 case ST_DEC_AXPPCI_33:
229 pci_axppci_33_pickintr(lcp);
230 break;
231 #endif
232 #ifdef DEC_ALPHABOOK1
233 case ST_ALPHABOOK1:
234 pci_alphabook1_pickintr(lcp);
235 break;
236 #endif
237 #ifdef DEC_EB66
238 case ST_EB66:
239 pci_eb66_pickintr(lcp);
240 break;
241 #endif
242
243 default:
244 panic("lcaattach: shouldn't be here, really...");
245 }
246
247 pba.pba_busname = "pci";
248 pba.pba_iot = &lcp->lc_iot;
249 pba.pba_memt = &lcp->lc_memt;
250 pba.pba_dmat =
251 alphabus_dma_get_tag(&lcp->lc_dmat_direct, ALPHA_BUS_PCI);
252 pba.pba_dmat64 = NULL;
253 pba.pba_pc = &lcp->lc_pc;
254 pba.pba_bus = 0;
255 pba.pba_bridgetag = NULL;
256 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
257 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
258 config_found(self, &pba, lcaprint);
259 }
260
261 static int
262 lcaprint(aux, pnp)
263 void *aux;
264 const char *pnp;
265 {
266 register struct pcibus_attach_args *pba = aux;
267
268 /* only PCIs can attach to LCAes; easy. */
269 if (pnp)
270 aprint_normal("%s at %s", pba->pba_busname, pnp);
271 aprint_normal(" bus %d", pba->pba_bus);
272 return (UNCONF);
273 }
274
275 int
276 lca_bus_get_window(type, window, abst)
277 int type, window;
278 struct alpha_bus_space_translation *abst;
279 {
280 struct lca_config *lcp = &lca_configuration;
281 bus_space_tag_t st;
282
283 switch (type) {
284 case ALPHA_BUS_TYPE_PCI_IO:
285 st = &lcp->lc_iot;
286 break;
287
288 case ALPHA_BUS_TYPE_PCI_MEM:
289 st = &lcp->lc_memt;
290 break;
291
292 default:
293 panic("lca_bus_get_window");
294 }
295
296 return (alpha_bus_space_get_window(st, window, abst));
297 }
298