lca.c revision 1.42 1 /* $NetBSD: lca.c,v 1.42 2004/08/30 15:05:16 drochner Exp $ */
2
3 /*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
41 * All rights reserved.
42 *
43 * Authors: Jeffrey Hsu and Chris G. Demetriou
44 *
45 * Permission to use, copy, modify and distribute this software and
46 * its documentation is hereby granted, provided that both the copyright
47 * notice and this permission notice appear in all copies of the
48 * software, derivative works or modified versions, and any portions
49 * thereof, and that both notices appear in supporting documentation.
50 *
51 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
52 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
53 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
54 *
55 * Carnegie Mellon requests users of this software to return to
56 *
57 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
58 * School of Computer Science
59 * Carnegie Mellon University
60 * Pittsburgh PA 15213-3890
61 *
62 * any improvements or extensions that they make and grant Carnegie the
63 * rights to redistribute these changes.
64 */
65
66 #include "opt_dec_axppci_33.h"
67 #include "opt_dec_alphabook1.h"
68 #include "opt_dec_eb66.h"
69
70 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
71
72 __KERNEL_RCSID(0, "$NetBSD: lca.c,v 1.42 2004/08/30 15:05:16 drochner Exp $");
73
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/kernel.h>
77 #include <sys/malloc.h>
78 #include <sys/device.h>
79
80 #include <uvm/uvm_extern.h>
81
82 #include <machine/autoconf.h>
83 #include <machine/rpb.h>
84 #include <machine/sysarch.h>
85
86 #include <dev/isa/isareg.h>
87 #include <dev/isa/isavar.h>
88
89 #include <dev/pci/pcireg.h>
90 #include <dev/pci/pcivar.h>
91 #include <alpha/pci/lcareg.h>
92 #include <alpha/pci/lcavar.h>
93 #ifdef DEC_AXPPCI_33
94 #include <alpha/pci/pci_axppci_33.h>
95 #endif
96 #ifdef DEC_ALPHABOOK1
97 #include <alpha/pci/pci_alphabook1.h>
98 #endif
99 #ifdef DEC_EB66
100 #include <alpha/pci/pci_eb66.h>
101 #endif
102
103 int lcamatch __P((struct device *, struct cfdata *, void *));
104 void lcaattach __P((struct device *, struct device *, void *));
105
106 CFATTACH_DECL(lca, sizeof(struct lca_softc),
107 lcamatch, lcaattach, NULL, NULL);
108
109 extern struct cfdriver lca_cd;
110
111 int lca_bus_get_window __P((int, int,
112 struct alpha_bus_space_translation *));
113
114 /* There can be only one. */
115 int lcafound;
116 struct lca_config lca_configuration;
117
118 int
119 lcamatch(parent, match, aux)
120 struct device *parent;
121 struct cfdata *match;
122 void *aux;
123 {
124 struct mainbus_attach_args *ma = aux;
125
126 /* Make sure that we're looking for a LCA. */
127 if (strcmp(ma->ma_name, lca_cd.cd_name) != 0)
128 return (0);
129
130 if (lcafound)
131 return (0);
132
133 return (1);
134 }
135
136 /*
137 * Set up the chipset's function pointers.
138 */
139 void
140 lca_init(lcp, mallocsafe)
141 struct lca_config *lcp;
142 int mallocsafe;
143 {
144
145 /*
146 * The LCA HAE register is WRITE-ONLY, so we can't tell where
147 * the second sparse window is actually mapped. Therefore,
148 * we have to guess where it is. This seems to be the normal
149 * address.
150 */
151 lcp->lc_s_mem_w2_masked_base = 0x80000000;
152
153 if (!lcp->lc_initted) {
154 /* don't do these twice since they set up extents */
155 lca_bus_io_init(&lcp->lc_iot, lcp);
156 lca_bus_mem_init(&lcp->lc_memt, lcp);
157
158 /*
159 * We have 1 I/O window and 3 MEM windows.
160 */
161 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1;
162 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3;
163 alpha_bus_get_window = lca_bus_get_window;
164 }
165 lcp->lc_mallocsafe = mallocsafe;
166
167 lca_pci_init(&lcp->lc_pc, lcp);
168 alpha_pci_chipset = &lcp->lc_pc;
169
170 /*
171 * Refer to ``DECchip 21066 and DECchip 21068 Alpha AXP Microprocessors
172 * Hardware Reference Manual''.
173 * ...
174 */
175
176 /*
177 * According to section 6.4.1, all bits of the IOC_HAE register are
178 * undefined after reset. Bits <31:27> are write-only. However, we
179 * cannot blindly set it to zero. The serial ROM code that initializes
180 * the PCI devices' address spaces, allocates sparse memory blocks in
181 * the range that must use the IOC_HAE register for address translation,
182 * and sets this register accordingly (see section 6.4.14).
183 *
184 * IOC_HAE left AS IS.
185 */
186
187 /* According to section 6.4.2, all bits of the IOC_CONF register are
188 * undefined after reset. Bits <1:0> are write-only. Set them to
189 * 0x00 for PCI Type 0 configuration access.
190 *
191 * IOC_CONF set to ZERO.
192 */
193 REGVAL64(LCA_IOC_CONF) = 0;
194
195 lcp->lc_initted = 1;
196 }
197
198 void
199 lcaattach(parent, self, aux)
200 struct device *parent, *self;
201 void *aux;
202 {
203 struct lca_softc *sc = (struct lca_softc *)self;
204 struct lca_config *lcp;
205 struct pcibus_attach_args pba;
206
207 /* note that we've attached the chipset; can't have 2 LCAs. */
208 /* Um, not sure about this. XXX JH */
209 lcafound = 1;
210
211 /*
212 * set up the chipset's info; done once at console init time
213 * (maybe), but we must do it twice to take care of things
214 * that need to use memory allocation.
215 */
216 lcp = sc->sc_lcp = &lca_configuration;
217 lca_init(lcp, 1);
218
219 /* XXX print chipset information */
220 printf("\n");
221
222 lca_dma_init(lcp);
223
224 switch (cputype) {
225 #ifdef DEC_AXPPCI_33
226 case ST_DEC_AXPPCI_33:
227 pci_axppci_33_pickintr(lcp);
228 break;
229 #endif
230 #ifdef DEC_ALPHABOOK1
231 case ST_ALPHABOOK1:
232 pci_alphabook1_pickintr(lcp);
233 break;
234 #endif
235 #ifdef DEC_EB66
236 case ST_EB66:
237 pci_eb66_pickintr(lcp);
238 break;
239 #endif
240
241 default:
242 panic("lcaattach: shouldn't be here, really...");
243 }
244
245 pba.pba_iot = &lcp->lc_iot;
246 pba.pba_memt = &lcp->lc_memt;
247 pba.pba_dmat =
248 alphabus_dma_get_tag(&lcp->lc_dmat_direct, ALPHA_BUS_PCI);
249 pba.pba_dmat64 = NULL;
250 pba.pba_pc = &lcp->lc_pc;
251 pba.pba_bus = 0;
252 pba.pba_bridgetag = NULL;
253 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
254 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
255 config_found_ia(self, "pcibus", &pba, pcibusprint);
256 }
257
258 int
259 lca_bus_get_window(type, window, abst)
260 int type, window;
261 struct alpha_bus_space_translation *abst;
262 {
263 struct lca_config *lcp = &lca_configuration;
264 bus_space_tag_t st;
265
266 switch (type) {
267 case ALPHA_BUS_TYPE_PCI_IO:
268 st = &lcp->lc_iot;
269 break;
270
271 case ALPHA_BUS_TYPE_PCI_MEM:
272 st = &lcp->lc_memt;
273 break;
274
275 default:
276 panic("lca_bus_get_window");
277 }
278
279 return (alpha_bus_space_get_window(st, window, abst));
280 }
281