Home | History | Annotate | Line # | Download | only in pci
lca.c revision 1.52
      1 /* $NetBSD: lca.c,v 1.52 2021/04/24 23:36:23 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
     34  * All rights reserved.
     35  *
     36  * Authors: Jeffrey Hsu and Chris G. Demetriou
     37  *
     38  * Permission to use, copy, modify and distribute this software and
     39  * its documentation is hereby granted, provided that both the copyright
     40  * notice and this permission notice appear in all copies of the
     41  * software, derivative works or modified versions, and any portions
     42  * thereof, and that both notices appear in supporting documentation.
     43  *
     44  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     45  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     46  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     47  *
     48  * Carnegie Mellon requests users of this software to return to
     49  *
     50  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     51  *  School of Computer Science
     52  *  Carnegie Mellon University
     53  *  Pittsburgh PA 15213-3890
     54  *
     55  * any improvements or extensions that they make and grant Carnegie the
     56  * rights to redistribute these changes.
     57  */
     58 
     59 #include "opt_dec_axppci_33.h"
     60 #include "opt_dec_alphabook1.h"
     61 #include "opt_dec_eb66.h"
     62 
     63 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     64 
     65 __KERNEL_RCSID(0, "$NetBSD: lca.c,v 1.52 2021/04/24 23:36:23 thorpej Exp $");
     66 
     67 #include <sys/param.h>
     68 #include <sys/systm.h>
     69 #include <sys/kernel.h>
     70 #include <sys/malloc.h>
     71 #include <sys/device.h>
     72 
     73 #include <machine/autoconf.h>
     74 #include <machine/rpb.h>
     75 #include <machine/sysarch.h>
     76 
     77 #include <dev/isa/isareg.h>
     78 #include <dev/isa/isavar.h>
     79 
     80 #include <dev/pci/pcireg.h>
     81 #include <dev/pci/pcivar.h>
     82 #include <alpha/pci/lcareg.h>
     83 #include <alpha/pci/lcavar.h>
     84 #ifdef DEC_AXPPCI_33
     85 #include <alpha/pci/pci_axppci_33.h>
     86 #endif
     87 #ifdef DEC_ALPHABOOK1
     88 #include <alpha/pci/pci_alphabook1.h>
     89 #endif
     90 #ifdef DEC_EB66
     91 #include <alpha/pci/pci_eb66.h>
     92 #endif
     93 
     94 int	lcamatch(device_t, cfdata_t, void *);
     95 void	lcaattach(device_t, device_t, void *);
     96 
     97 CFATTACH_DECL_NEW(lca, sizeof(struct lca_softc),
     98     lcamatch, lcaattach, NULL, NULL);
     99 
    100 extern struct cfdriver lca_cd;
    101 
    102 int	lca_bus_get_window(int, int,
    103 	    struct alpha_bus_space_translation *);
    104 
    105 /* There can be only one. */
    106 int lcafound;
    107 struct lca_config lca_configuration;
    108 
    109 int
    110 lcamatch(device_t parent, cfdata_t match, void *aux)
    111 {
    112 	struct mainbus_attach_args *ma = aux;
    113 
    114 	/* Make sure that we're looking for a LCA. */
    115 	if (strcmp(ma->ma_name, lca_cd.cd_name) != 0)
    116 		return (0);
    117 
    118 	if (lcafound)
    119 		return (0);
    120 
    121 	return (1);
    122 }
    123 
    124 /*
    125  * Set up the chipset's function pointers.
    126  */
    127 void
    128 lca_init(struct lca_config *lcp, int mallocsafe)
    129 {
    130 
    131 	/*
    132 	 * The LCA HAE register is WRITE-ONLY, so we can't tell where
    133 	 * the second sparse window is actually mapped.  Therefore,
    134 	 * we have to guess where it is.  This seems to be the normal
    135 	 * address.
    136 	 */
    137 	lcp->lc_s_mem_w2_masked_base = 0x80000000;
    138 
    139 	if (!lcp->lc_initted) {
    140 		/* don't do these twice since they set up extents */
    141 		lca_bus_io_init(&lcp->lc_iot, lcp);
    142 		lca_bus_mem_init(&lcp->lc_memt, lcp);
    143 
    144 		/*
    145 		 * We have 1 I/O window and 3 MEM windows.
    146 		 */
    147 		alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1;
    148 		alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3;
    149 		alpha_bus_get_window = lca_bus_get_window;
    150 	}
    151 	lcp->lc_mallocsafe = mallocsafe;
    152 
    153 	lca_pci_init(&lcp->lc_pc, lcp);
    154 	alpha_pci_chipset = &lcp->lc_pc;
    155 
    156 	/*
    157 	 * Refer to ``DECchip 21066 and DECchip 21068 Alpha AXP Microprocessors
    158 	 * Hardware Reference Manual''.
    159 	 * ...
    160 	 */
    161 
    162 	/*
    163 	 * According to section 6.4.1, all bits of the IOC_HAE register are
    164 	 * undefined after reset.  Bits <31:27> are write-only.  However, we
    165 	 * cannot blindly set it to zero.  The serial ROM code that initializes
    166 	 * the PCI devices' address spaces, allocates sparse memory blocks in
    167 	 * the range that must use the IOC_HAE register for address translation,
    168 	 * and sets this register accordingly (see section 6.4.14).
    169 	 *
    170 	 *	IOC_HAE left AS IS.
    171 	 */
    172 
    173 	/* According to section 6.4.2, all bits of the IOC_CONF register are
    174 	 * undefined after reset.  Bits <1:0> are write-only.  Set them to
    175 	 * 0x00 for PCI Type 0 configuration access.
    176 	 *
    177 	 *	IOC_CONF set to ZERO.
    178 	 */
    179 	REGVAL64(LCA_IOC_CONF) = 0;
    180 
    181 	lcp->lc_initted = 1;
    182 }
    183 
    184 void
    185 lcaattach(device_t parent, device_t self, void *aux)
    186 {
    187 	struct lca_softc *sc = device_private(self);
    188 	struct lca_config *lcp;
    189 	struct pcibus_attach_args pba;
    190 
    191 	/* note that we've attached the chipset; can't have 2 LCAs. */
    192 	/* Um, not sure about this.  XXX JH */
    193 	lcafound = 1;
    194 	sc->sc_dev = self;
    195 
    196 	/*
    197 	 * set up the chipset's info; done once at console init time
    198 	 * (maybe), but we must do it twice to take care of things
    199 	 * that need to use memory allocation.
    200 	 */
    201 	lcp = sc->sc_lcp = &lca_configuration;
    202 	lca_init(lcp, 1);
    203 
    204 	/* XXX print chipset information */
    205 	aprint_normal("\n");
    206 
    207 	lca_dma_init(lcp);
    208 
    209 	switch (cputype) {
    210 #ifdef DEC_AXPPCI_33
    211 	case ST_DEC_AXPPCI_33:
    212 		pci_axppci_33_pickintr(lcp);
    213 		break;
    214 #endif
    215 #ifdef DEC_ALPHABOOK1
    216 	case ST_ALPHABOOK1:
    217 		pci_alphabook1_pickintr(lcp);
    218 		break;
    219 #endif
    220 #ifdef DEC_EB66
    221 	case ST_EB66:
    222 		pci_eb66_pickintr(lcp);
    223 		break;
    224 #endif
    225 
    226 	default:
    227 		panic("lcaattach: shouldn't be here, really...");
    228 	}
    229 
    230 	pba.pba_iot = &lcp->lc_iot;
    231 	pba.pba_memt = &lcp->lc_memt;
    232 	pba.pba_dmat =
    233 	    alphabus_dma_get_tag(&lcp->lc_dmat_direct, ALPHA_BUS_PCI);
    234 	pba.pba_dmat64 = NULL;
    235 	pba.pba_pc = &lcp->lc_pc;
    236 	pba.pba_bus = 0;
    237 	pba.pba_bridgetag = NULL;
    238 	pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY |
    239 	    PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
    240 	config_found(self, &pba, pcibusprint, CFARG_EOL);
    241 }
    242 
    243 int
    244 lca_bus_get_window(int type, int window, struct alpha_bus_space_translation *abst)
    245 {
    246 	struct lca_config *lcp = &lca_configuration;
    247 	bus_space_tag_t st;
    248 
    249 	switch (type) {
    250 	case ALPHA_BUS_TYPE_PCI_IO:
    251 		st = &lcp->lc_iot;
    252 		break;
    253 
    254 	case ALPHA_BUS_TYPE_PCI_MEM:
    255 		st = &lcp->lc_memt;
    256 		break;
    257 
    258 	default:
    259 		panic("lca_bus_get_window");
    260 	}
    261 
    262 	return (alpha_bus_space_get_window(st, window, abst));
    263 }
    264