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lcareg.h revision 1.5.2.1
      1  1.5.2.1  thorpej /* $NetBSD: lcareg.h,v 1.5.2.1 1997/05/23 21:33:44 thorpej Exp $ */
      2      1.1      cgd 
      3      1.1      cgd /*
      4      1.1      cgd  * Copyright (c) 1995 Carnegie-Mellon University.
      5      1.1      cgd  * All rights reserved.
      6      1.1      cgd  *
      7  1.5.2.1  thorpej  * Authors: Jeffrey Hsu, Jason R. Thorpe
      8      1.1      cgd  *
      9      1.1      cgd  * Permission to use, copy, modify and distribute this software and
     10      1.1      cgd  * its documentation is hereby granted, provided that both the copyright
     11      1.1      cgd  * notice and this permission notice appear in all copies of the
     12      1.1      cgd  * software, derivative works or modified versions, and any portions
     13      1.1      cgd  * thereof, and that both notices appear in supporting documentation.
     14      1.1      cgd  *
     15      1.1      cgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16      1.1      cgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17      1.1      cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18      1.1      cgd  *
     19      1.1      cgd  * Carnegie Mellon requests users of this software to return to
     20      1.1      cgd  *
     21      1.1      cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22      1.1      cgd  *  School of Computer Science
     23      1.1      cgd  *  Carnegie Mellon University
     24      1.1      cgd  *  Pittsburgh PA 15213-3890
     25      1.1      cgd  *
     26      1.1      cgd  * any improvements or extensions that they make and grant Carnegie the
     27      1.1      cgd  * rights to redistribute these changes.
     28      1.1      cgd  */
     29      1.1      cgd 
     30      1.1      cgd /*
     31      1.1      cgd  * 21066 chip registers
     32      1.1      cgd  */
     33      1.1      cgd 
     34      1.3      cgd #define REGVAL(r)	(*(int32_t *)ALPHA_PHYS_TO_K0SEG(r))
     35      1.4      cgd #define REGVAL64(r)	(*(int64_t *)ALPHA_PHYS_TO_K0SEG(r))
     36      1.1      cgd 
     37      1.1      cgd /*
     38      1.1      cgd  * Base addresses
     39      1.1      cgd  */
     40      1.1      cgd #define LCA_IOC_BASE	0x180000000L		/* LCA IOC Regs */
     41      1.1      cgd #define LCA_PCI_SIO	0x1c0000000L		/* PCI Sp. I/O Space */
     42      1.1      cgd #define LCA_PCI_CONF	0x1e0000000L		/* PCI Conf. Space */
     43      1.1      cgd #define LCA_PCI_SPARSE	0x200000000L		/* PCI Sparse Space */
     44      1.1      cgd #define LCA_PCI_DENSE	0x300000000L		/* PCI Dense Space */
     45      1.1      cgd 
     46      1.4      cgd #define LCA_IOC_HAE	LCA_IOC_BASE		/* Host Address Ext. (64) */
     47      1.4      cgd #define	IOC_HAE_ADDREXT	0x00000000f8000000UL
     48      1.4      cgd #define	IOC_HAE_RSVSD	0xffffffff07ffffffUL
     49      1.1      cgd 
     50      1.1      cgd #define LCA_IOC_CONF	(LCA_IOC_BASE + 0x020)	/* Configuration Cycle Type */
     51      1.2      cgd #define LCA_IOC_STAT0	(LCA_IOC_BASE + 0x040)	/* Status 0 */
     52      1.2      cgd #define LCA_IOC_STAT1	(LCA_IOC_BASE + 0x060)	/* Status 1 */
     53      1.1      cgd 
     54  1.5.2.1  thorpej #define	LCA_IOC_TBIA	(LCA_IOC_BASE + 0x080)	/* TLB Invalidate All */
     55  1.5.2.1  thorpej #define	LCA_IOC_TB_ENA	(LCA_IOC_BASE + 0x0a0)	/* TLB Enable */
     56  1.5.2.1  thorpej #define	IOC_TB_ENA_TEN	0x0000000000000080UL
     57  1.5.2.1  thorpej 
     58      1.1      cgd #define LCA_IOC_W_BASE0	(LCA_IOC_BASE + 0x100)	/* Window Base */
     59      1.1      cgd #define LCA_IOC_W_MASK0	(LCA_IOC_BASE + 0x140)	/* Window Mask */
     60      1.1      cgd #define LCA_IOC_W_T_BASE0 (LCA_IOC_BASE + 0x180) /* Translated Base */
     61      1.1      cgd 
     62      1.1      cgd #define LCA_IOC_W_BASE1	(LCA_IOC_BASE + 0x120)	/* Window Base */
     63      1.1      cgd #define LCA_IOC_W_MASK1	(LCA_IOC_BASE + 0x160)	/* Window Mask */
     64      1.1      cgd #define LCA_IOC_W_T_BASE1 (LCA_IOC_BASE + 0x1a0) /* Translated Base */
     65  1.5.2.1  thorpej 
     66  1.5.2.1  thorpej #define	IOC_W_BASE_W_BASE 0x00000000fff00000UL	/* Window base value */
     67  1.5.2.1  thorpej #define	IOC_W_BASE_SG	  0x0000000100000000UL	/* Window uses SGMAPs */
     68  1.5.2.1  thorpej #define	IOC_W_BASE_WEN	  0x0000000200000000UL	/* Window enable */
     69  1.5.2.1  thorpej 
     70  1.5.2.1  thorpej #define	IOC_W_MASK_1M	0x0000000000000000UL	/* 1MB window */
     71  1.5.2.1  thorpej #define	IOC_W_MASK_2M	0x0000000000100000UL	/* 2MB window */
     72  1.5.2.1  thorpej #define	IOC_W_MASK_4M	0x0000000000300000UL	/* 4MB window */
     73  1.5.2.1  thorpej #define	IOC_W_MASK_8M	0x0000000000700000UL	/* 8MB window */
     74  1.5.2.1  thorpej #define	IOC_W_MASK_16M	0x0000000000f00000UL	/* 16MB window */
     75  1.5.2.1  thorpej #define	IOC_W_MASK_32M	0x0000000001f00000UL	/* 32MB window */
     76  1.5.2.1  thorpej #define	IOC_W_MASK_64M	0x0000000003f00000UL	/* 64MB window */
     77  1.5.2.1  thorpej #define	IOC_W_MASK_128M	0x0000000007f00000UL	/* 128M window */
     78  1.5.2.1  thorpej #define	IOC_W_MASK_256M	0x000000000ff00000UL	/* 256M window */
     79  1.5.2.1  thorpej #define	IOC_W_MASK_512M	0x000000001ff00000UL	/* 512M window */
     80  1.5.2.1  thorpej #define	IOC_W_MASK_1G	0x000000003ff00000UL	/* 1GB window */
     81  1.5.2.1  thorpej #define	IOC_W_MASK_2G	0x000000007ff00000UL	/* 2GB window */
     82  1.5.2.1  thorpej #define	IOC_W_MASK_4G	0x00000000fff00000UL	/* 4GB window */
     83  1.5.2.1  thorpej 
     84  1.5.2.1  thorpej #define	IOC_W_T_BASE	0x00000000fffffc00UL	/* page table base */
     85