mcpcia.c revision 1.5
1 /* $NetBSD: mcpcia.c,v 1.5 1999/04/15 22:27:40 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1998 by Matthew Jacob 42 * NASA AMES Research Center. 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice immediately at the beginning of the file, without modification, 50 * this list of conditions, and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. The name of the author may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 59 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 60 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 61 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 62 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 63 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 64 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 65 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 66 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 67 * SUCH DAMAGE. 68 */ 69 70 /* 71 * MCPCIA mcbus to PCI bus adapter 72 * found on AlphaServer 4100 systems. 73 */ 74 75 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 76 77 __KERNEL_RCSID(0, "$NetBSD: mcpcia.c,v 1.5 1999/04/15 22:27:40 thorpej Exp $"); 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/device.h> 82 #include <sys/malloc.h> 83 84 #include <machine/autoconf.h> 85 #include <machine/rpb.h> 86 #include <machine/pte.h> 87 88 #include <alpha/mcbus/mcbusreg.h> 89 #include <alpha/mcbus/mcbusvar.h> 90 #include <alpha/pci/mcpciareg.h> 91 #include <alpha/pci/mcpciavar.h> 92 #include <alpha/pci/pci_kn300.h> 93 94 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 95 #define MCPCIA_SYSBASE(mc) \ 96 ((((unsigned long) (mc)->cc_gid) << MCBUS_GID_SHIFT) | \ 97 (((unsigned long) (mc)->cc_mid) << MCBUS_MID_SHIFT) | \ 98 (MCBUS_IOSPACE)) 99 100 static int mcpciamatch __P((struct device *, struct cfdata *, void *)); 101 static void mcpciaattach __P((struct device *, struct device *, void *)); 102 struct cfattach mcpcia_ca = { 103 sizeof(struct mcpcia_softc), mcpciamatch, mcpciaattach 104 }; 105 106 static int mcpciaprint __P((void *, const char *)); 107 108 void mcpcia_init0 __P((struct mcpcia_config *, int)); 109 110 /* 111 * We have one statically-allocated mcpcia_config structure; this is 112 * the one used for the console (which, coincidentally, is the only 113 * MCPCIA with an EISA adapter attached to it). 114 */ 115 struct mcpcia_config mcpcia_console_configuration; 116 117 static int 118 mcpciaprint(aux, pnp) 119 void *aux; 120 const char *pnp; 121 { 122 register struct pcibus_attach_args *pba = aux; 123 /* only PCIs can attach to MCPCIA for now */ 124 if (pnp) 125 printf("%s at %s", pba->pba_busname, pnp); 126 printf(" bus %d", pba->pba_bus); 127 return (UNCONF); 128 } 129 130 static int 131 mcpciamatch(parent, cf, aux) 132 struct device *parent; 133 struct cfdata *cf; 134 void *aux; 135 { 136 struct mcbus_dev_attach_args *ma = aux; 137 if (ma->ma_type == MCBUS_TYPE_PCI) 138 return (1); 139 return (0); 140 } 141 142 static void 143 mcpciaattach(parent, self, aux) 144 struct device *parent; 145 struct device *self; 146 void *aux; 147 { 148 static int first = 1; 149 struct mcbus_dev_attach_args *ma = aux; 150 struct mcpcia_softc *mcp = (struct mcpcia_softc *)self; 151 struct mcpcia_config *ccp; 152 struct pcibus_attach_args pba; 153 u_int32_t ctl; 154 155 printf("\n"); 156 157 /* 158 * Determine if we're the console's MCPCIA. 159 */ 160 if (ma->ma_mid == mcpcia_console_configuration.cc_mid && 161 ma->ma_gid == mcpcia_console_configuration.cc_gid) 162 ccp = &mcpcia_console_configuration; 163 else { 164 ccp = malloc(sizeof(struct mcpcia_config), M_DEVBUF, M_WAITOK); 165 memset(ccp, 0, sizeof(struct mcpcia_config)); 166 167 ccp->cc_mid = ma->ma_mid; 168 ccp->cc_gid = ma->ma_gid; 169 } 170 171 mcp->mcpcia_cc = ccp; 172 ccp->cc_sc = mcp; 173 174 /* This initializes cc_sysbase so we can do register access. */ 175 mcpcia_init0(ccp, 1); 176 177 ctl = REGVAL(MCPCIA_PCI_REV(ccp)); 178 printf("%s: Horse Revision %d, %s Handed Saddle Revision %d," 179 " CAP Revision %d\n", mcp->mcpcia_dev.dv_xname, HORSE_REV(ctl), 180 (SADDLE_TYPE(ctl) & 1)? "Right": "Left", SADDLE_REV(ctl), 181 CAP_REV(ctl)); 182 183 mcpcia_dma_init(ccp); 184 185 /* 186 * Set up interrupts 187 */ 188 pci_kn300_pickintr(ccp, first); 189 #ifdef EVCNT_COUNTERS 190 if (first == 1) { 191 evcnt_attach(self, "intr", kn300_intr_evcnt); 192 first = 0; 193 } 194 #else 195 first = 0; 196 #endif 197 198 /* 199 * Attach PCI bus 200 */ 201 pba.pba_busname = "pci"; 202 pba.pba_iot = &ccp->cc_iot; 203 pba.pba_memt = &ccp->cc_memt; 204 pba.pba_dmat = /* start with direct, may change... */ 205 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI); 206 pba.pba_pc = &ccp->cc_pc; 207 pba.pba_bus = 0; 208 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 209 (void) config_found(self, &pba, mcpciaprint); 210 211 /* 212 * Clear any errors that may have occurred during the probe 213 * sequence. 214 */ 215 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF; 216 alpha_mb(); 217 } 218 219 void 220 mcpcia_init() 221 { 222 struct mcpcia_config *ccp = &mcpcia_console_configuration; 223 int i; 224 225 /* 226 * Look for all of the MCPCIAs on the system. One of them 227 * will have an EISA attached to it. This MCPCIA is the 228 * only one that can be used for the console. Once we find 229 * that one, initialize it. 230 */ 231 232 for (i = 0; i < MCPCIA_PER_MCBUS; i++) { 233 ccp->cc_mid = mcbus_mcpcia_probe_order[i]; 234 /* 235 * XXX If we ever support more than one MCBUS, we'll 236 * XXX have to probe for them, and map them to unit 237 * XXX numbers. 238 */ 239 ccp->cc_gid = MCBUS_GID_FROM_INSTANCE(0); 240 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp); 241 242 if (badaddr((void *)ALPHA_PHYS_TO_K0SEG(MCPCIA_PCI_REV(ccp)), 243 sizeof(u_int32_t))) 244 continue; 245 246 if (EISA_PRESENT(REGVAL(MCPCIA_PCI_REV(ccp)))) { 247 mcpcia_init0(ccp, 0); 248 return; 249 } 250 } 251 252 panic("mcpcia_init: unable to find EISA bus"); 253 } 254 255 void 256 mcpcia_init0(ccp, mallocsafe) 257 struct mcpcia_config *ccp; 258 int mallocsafe; 259 { 260 u_int32_t ctl; 261 262 if (ccp->cc_initted == 0) { 263 /* don't do these twice since they set up extents */ 264 mcpcia_bus_io_init(&ccp->cc_iot, ccp); 265 mcpcia_bus_mem_init(&ccp->cc_memt, ccp); 266 } 267 ccp->cc_mallocsafe = mallocsafe; 268 269 mcpcia_pci_init(&ccp->cc_pc, ccp); 270 271 /* 272 * Establish a precalculated base for convenience's sake. 273 */ 274 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp); 275 276 /* 277 * Disable interrupts and clear errors prior to probing 278 */ 279 REGVAL(MCPCIA_INT_MASK0(ccp)) = 0; 280 REGVAL(MCPCIA_INT_MASK1(ccp)) = 0; 281 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF; 282 alpha_mb(); 283 284 /* 285 * Use this opportunity to also find out the MID and CPU 286 * type of the currently running CPU (that's us, billybob....) 287 */ 288 ctl = REGVAL(MCPCIA_WHOAMI(ccp)); 289 mcbus_primary.mcbus_cpu_mid = MCBUS_CPU_MID(ctl); 290 if ((MCBUS_CPU_INFO(ctl) & CPU_Fill_Err) == 0 && 291 mcbus_primary.mcbus_valid == 0) { 292 mcbus_primary.mcbus_bcache = 293 MCBUS_CPU_INFO(ctl) & CPU_BCacheMask; 294 mcbus_primary.mcbus_valid = 1; 295 } 296 alpha_mb(); 297 298 ccp->cc_initted = 1; 299 } 300 301 #ifdef TEST_PROBE_DEATH 302 static void 303 die_heathen_dog(arg) 304 void *arg; 305 { 306 struct mcpcia_config *ccp = arg; 307 308 /* this causes a fatal machine check (0x670) */ 309 REGVAL(MCPCIA_CAP_DIAG(ccp)) |= CAP_DIAG_MC_ADRPE; 310 } 311 #endif 312 313 void 314 mcpcia_config_cleanup() 315 { 316 volatile u_int32_t ctl; 317 struct mcpcia_softc *mcp; 318 struct mcpcia_config *ccp; 319 int i; 320 extern struct cfdriver mcpcia_cd; 321 322 /* 323 * Turn on Hard, Soft error interrupts. Maybe i2c too. 324 */ 325 for (i = 0; i < mcpcia_cd.cd_ndevs; i++) { 326 if ((mcp = mcpcia_cd.cd_devs[i]) == NULL) 327 continue; 328 329 ccp = mcp->mcpcia_cc; 330 331 ctl = REGVAL(MCPCIA_INT_MASK0(ccp)); 332 ctl |= MCPCIA_GEN_IENABL; 333 REGVAL(MCPCIA_INT_MASK0(ccp)) = ctl; 334 alpha_mb(); 335 336 /* force stall while write completes */ 337 ctl = REGVAL(MCPCIA_INT_MASK0(ccp)); 338 } 339 #ifdef TEST_PROBE_DEATH 340 (void) timeout (die_heathen_dog, &mcpcia_console_configuration, 341 30 * hz); 342 #endif 343 } 344
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