mcpcia.c revision 1.5.8.1
1 /* $NetBSD: mcpcia.c,v 1.5.8.1 1999/12/27 18:31:27 wrstuden Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1998 by Matthew Jacob 42 * NASA AMES Research Center. 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice immediately at the beginning of the file, without modification, 50 * this list of conditions, and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. The name of the author may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 59 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 60 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 61 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 62 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 63 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 64 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 65 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 66 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 67 * SUCH DAMAGE. 68 */ 69 70 /* 71 * MCPCIA mcbus to PCI bus adapter 72 * found on AlphaServer 4100 systems. 73 */ 74 75 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 76 77 __KERNEL_RCSID(0, "$NetBSD: mcpcia.c,v 1.5.8.1 1999/12/27 18:31:27 wrstuden Exp $"); 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/device.h> 82 #include <sys/malloc.h> 83 84 #include <machine/autoconf.h> 85 #include <machine/rpb.h> 86 #include <machine/pte.h> 87 88 #include <alpha/mcbus/mcbusreg.h> 89 #include <alpha/mcbus/mcbusvar.h> 90 #include <alpha/pci/mcpciareg.h> 91 #include <alpha/pci/mcpciavar.h> 92 #include <alpha/pci/pci_kn300.h> 93 94 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 95 #define MCPCIA_SYSBASE(mc) \ 96 ((((unsigned long) (mc)->cc_gid) << MCBUS_GID_SHIFT) | \ 97 (((unsigned long) (mc)->cc_mid) << MCBUS_MID_SHIFT) | \ 98 (MCBUS_IOSPACE)) 99 100 #define MCPCIA_PROBE(mid, gid) \ 101 badaddr((void *)KV(((((unsigned long) gid) << MCBUS_GID_SHIFT) | \ 102 (((unsigned long) mid) << MCBUS_MID_SHIFT) | \ 103 (MCBUS_IOSPACE) | MCPCIA_PCI_BRIDGE | _MCPCIA_PCI_REV)), \ 104 sizeof(u_int32_t)) 105 106 static int mcpciamatch __P((struct device *, struct cfdata *, void *)); 107 static void mcpciaattach __P((struct device *, struct device *, void *)); 108 struct cfattach mcpcia_ca = { 109 sizeof(struct mcpcia_softc), mcpciamatch, mcpciaattach 110 }; 111 112 static int mcpciaprint __P((void *, const char *)); 113 114 void mcpcia_init0 __P((struct mcpcia_config *, int)); 115 116 /* 117 * We have one statically-allocated mcpcia_config structure; this is 118 * the one used for the console (which, coincidentally, is the only 119 * MCPCIA with an EISA adapter attached to it). 120 */ 121 struct mcpcia_config mcpcia_console_configuration; 122 123 static int 124 mcpciaprint(aux, pnp) 125 void *aux; 126 const char *pnp; 127 { 128 register struct pcibus_attach_args *pba = aux; 129 /* only PCIs can attach to MCPCIA for now */ 130 if (pnp) 131 printf("%s at %s", pba->pba_busname, pnp); 132 printf(" bus %d", pba->pba_bus); 133 return (UNCONF); 134 } 135 136 static int 137 mcpciamatch(parent, cf, aux) 138 struct device *parent; 139 struct cfdata *cf; 140 void *aux; 141 { 142 struct mcbus_dev_attach_args *ma = aux; 143 if (ma->ma_type == MCBUS_TYPE_PCI) 144 return (1); 145 return (0); 146 } 147 148 static void 149 mcpciaattach(parent, self, aux) 150 struct device *parent; 151 struct device *self; 152 void *aux; 153 { 154 static int first = 1; 155 struct mcbus_dev_attach_args *ma = aux; 156 struct mcpcia_softc *mcp = (struct mcpcia_softc *)self; 157 struct mcpcia_config *ccp; 158 struct pcibus_attach_args pba; 159 u_int32_t ctl; 160 161 /* 162 * Make sure this MCPCIA exists... 163 */ 164 if (MCPCIA_PROBE(ma->ma_mid, ma->ma_gid)) { 165 mcp->mcpcia_cc = NULL; 166 printf(" (not present)\n"); 167 return; 168 } 169 printf("\n"); 170 171 /* 172 * Determine if we're the console's MCPCIA. 173 */ 174 if (ma->ma_mid == mcpcia_console_configuration.cc_mid && 175 ma->ma_gid == mcpcia_console_configuration.cc_gid) 176 ccp = &mcpcia_console_configuration; 177 else { 178 ccp = malloc(sizeof(struct mcpcia_config), M_DEVBUF, M_WAITOK); 179 memset(ccp, 0, sizeof(struct mcpcia_config)); 180 181 ccp->cc_mid = ma->ma_mid; 182 ccp->cc_gid = ma->ma_gid; 183 } 184 185 mcp->mcpcia_cc = ccp; 186 ccp->cc_sc = mcp; 187 188 /* This initializes cc_sysbase so we can do register access. */ 189 mcpcia_init0(ccp, 1); 190 191 ctl = REGVAL(MCPCIA_PCI_REV(ccp)); 192 printf("%s: Horse Revision %d, %s Handed Saddle Revision %d," 193 " CAP Revision %d\n", mcp->mcpcia_dev.dv_xname, HORSE_REV(ctl), 194 (SADDLE_TYPE(ctl) & 1)? "Right": "Left", SADDLE_REV(ctl), 195 CAP_REV(ctl)); 196 197 mcpcia_dma_init(ccp); 198 199 /* 200 * Set up interrupts 201 */ 202 pci_kn300_pickintr(ccp, first); 203 #ifdef EVCNT_COUNTERS 204 if (first == 1) { 205 evcnt_attach(self, "intr", kn300_intr_evcnt); 206 first = 0; 207 } 208 #else 209 first = 0; 210 #endif 211 212 /* 213 * Attach PCI bus 214 */ 215 pba.pba_busname = "pci"; 216 pba.pba_iot = &ccp->cc_iot; 217 pba.pba_memt = &ccp->cc_memt; 218 pba.pba_dmat = /* start with direct, may change... */ 219 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI); 220 pba.pba_pc = &ccp->cc_pc; 221 pba.pba_bus = 0; 222 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 223 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 224 (void) config_found(self, &pba, mcpciaprint); 225 226 /* 227 * Clear any errors that may have occurred during the probe 228 * sequence. 229 */ 230 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF; 231 alpha_mb(); 232 } 233 234 void 235 mcpcia_init() 236 { 237 struct mcpcia_config *ccp = &mcpcia_console_configuration; 238 int i; 239 240 /* 241 * Look for all of the MCPCIAs on the system. One of them 242 * will have an EISA attached to it. This MCPCIA is the 243 * only one that can be used for the console. Once we find 244 * that one, initialize it. 245 */ 246 247 for (i = 0; i < MCPCIA_PER_MCBUS; i++) { 248 ccp->cc_mid = mcbus_mcpcia_probe_order[i]; 249 /* 250 * XXX If we ever support more than one MCBUS, we'll 251 * XXX have to probe for them, and map them to unit 252 * XXX numbers. 253 */ 254 ccp->cc_gid = MCBUS_GID_FROM_INSTANCE(0); 255 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp); 256 257 if (badaddr((void *)ALPHA_PHYS_TO_K0SEG(MCPCIA_PCI_REV(ccp)), 258 sizeof(u_int32_t))) 259 continue; 260 261 if (EISA_PRESENT(REGVAL(MCPCIA_PCI_REV(ccp)))) { 262 mcpcia_init0(ccp, 0); 263 return; 264 } 265 } 266 267 panic("mcpcia_init: unable to find EISA bus"); 268 } 269 270 void 271 mcpcia_init0(ccp, mallocsafe) 272 struct mcpcia_config *ccp; 273 int mallocsafe; 274 { 275 u_int32_t ctl; 276 277 if (ccp->cc_initted == 0) { 278 /* don't do these twice since they set up extents */ 279 mcpcia_bus_io_init(&ccp->cc_iot, ccp); 280 mcpcia_bus_mem_init(&ccp->cc_memt, ccp); 281 } 282 ccp->cc_mallocsafe = mallocsafe; 283 284 mcpcia_pci_init(&ccp->cc_pc, ccp); 285 286 /* 287 * Establish a precalculated base for convenience's sake. 288 */ 289 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp); 290 291 /* 292 * Disable interrupts and clear errors prior to probing 293 */ 294 REGVAL(MCPCIA_INT_MASK0(ccp)) = 0; 295 REGVAL(MCPCIA_INT_MASK1(ccp)) = 0; 296 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF; 297 alpha_mb(); 298 299 /* 300 * Use this opportunity to also find out the MID and CPU 301 * type of the currently running CPU (that's us, billybob....) 302 */ 303 ctl = REGVAL(MCPCIA_WHOAMI(ccp)); 304 mcbus_primary.mcbus_cpu_mid = MCBUS_CPU_MID(ctl); 305 if ((MCBUS_CPU_INFO(ctl) & CPU_Fill_Err) == 0 && 306 mcbus_primary.mcbus_valid == 0) { 307 mcbus_primary.mcbus_bcache = 308 MCBUS_CPU_INFO(ctl) & CPU_BCacheMask; 309 mcbus_primary.mcbus_valid = 1; 310 } 311 alpha_mb(); 312 313 ccp->cc_initted = 1; 314 } 315 316 #ifdef TEST_PROBE_DEATH 317 static void 318 die_heathen_dog(arg) 319 void *arg; 320 { 321 struct mcpcia_config *ccp = arg; 322 323 /* this causes a fatal machine check (0x670) */ 324 REGVAL(MCPCIA_CAP_DIAG(ccp)) |= CAP_DIAG_MC_ADRPE; 325 } 326 #endif 327 328 void 329 mcpcia_config_cleanup() 330 { 331 volatile u_int32_t ctl; 332 struct mcpcia_softc *mcp; 333 struct mcpcia_config *ccp; 334 int i; 335 extern struct cfdriver mcpcia_cd; 336 337 /* 338 * Turn on Hard, Soft error interrupts. Maybe i2c too. 339 */ 340 for (i = 0; i < mcpcia_cd.cd_ndevs; i++) { 341 if ((mcp = mcpcia_cd.cd_devs[i]) == NULL) 342 continue; 343 344 ccp = mcp->mcpcia_cc; 345 if (ccp == NULL) 346 continue; 347 348 ctl = REGVAL(MCPCIA_INT_MASK0(ccp)); 349 ctl |= MCPCIA_GEN_IENABL; 350 REGVAL(MCPCIA_INT_MASK0(ccp)) = ctl; 351 alpha_mb(); 352 353 /* force stall while write completes */ 354 ctl = REGVAL(MCPCIA_INT_MASK0(ccp)); 355 } 356 #ifdef TEST_PROBE_DEATH 357 (void) timeout (die_heathen_dog, &mcpcia_console_configuration, 358 30 * hz); 359 #endif 360 } 361
Indexes created Mon Oct 27 04:09:48 GMT 2025