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mcpciavar.h revision 1.3 
      1 /* $NetBSD: mcpciavar.h,v 1.3 1999/04/15 22:27:40 thorpej Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1998 by Matthew Jacob
      5  * NASA AMES Research Center.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice immediately at the beginning of the file, without modification,
     13  *    this list of conditions, and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     23  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     24  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     30  * SUCH DAMAGE.
     31  */
     32 
     33 #include <dev/pci/pcivar.h>
     34 #include <sys/extent.h>
     35 
     36 #include <alpha/pci/pci_sgmap_pte64.h>
     37 
     38 #define	_FSTORE	(EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long))
     39 
     40 /*
     41  * MPCIA configuration.
     42  */
     43 struct mcpcia_config {
     44 	int				cc_gid;	/* GID of this MCbus */
     45 	int				cc_mid;	/* MCbus Module ID */
     46 	int				cc_initted;
     47 	int				cc_mallocsafe;
     48 	struct alpha_bus_space		cc_iot;
     49 	struct alpha_bus_space		cc_memt;
     50 	struct extent *			cc_io_ex;
     51 	struct extent *			cc_d_mem_ex;
     52 	struct extent *			cc_s_mem_ex;
     53 	struct alpha_pci_chipset	cc_pc;
     54 	struct mcpcia_softc *		cc_sc;	/* back pointer */
     55 	long				cc_io_exstorage[_FSTORE];
     56 	long				cc_dmem_exstorage[_FSTORE];
     57 	long				cc_smem_exstorage[_FSTORE];
     58 	unsigned long			cc_sysbase;	/* shorthand */
     59 	struct alpha_bus_dma_tag	cc_dmat_direct;
     60 	struct alpha_bus_dma_tag	cc_dmat_sgmap;
     61 	struct alpha_sgmap		cc_sgmap;
     62 };
     63 
     64 struct mcpcia_softc {
     65 	struct device		mcpcia_dev;
     66 	struct mcpcia_config	*mcpcia_cc;	/* config info */
     67 };
     68 
     69 void	mcpcia_init __P((void));
     70 void	mcpcia_config_cleanup __P((void));
     71 
     72 void	mcpcia_pci_init __P((pci_chipset_tag_t, void *));
     73 void	mcpcia_dma_init __P((struct mcpcia_config *));
     74 
     75 void	mcpcia_bus_io_init __P((bus_space_tag_t, void *));
     76 void	mcpcia_bus_mem_init __P((bus_space_tag_t, void *));
     77 
     78 /*
     79  * IO Interrupt handler.
     80  */
     81 void 	mcpcia_iointr __P((void *, unsigned long));
     82 
     83 /*
     84  * There are four PCI slots per MCPCIA PCI bus here, but some are 'hidden'-
     85  * none seems to be higher than 6 though.
     86  */
     87 #define	MCPCIA_MAXDEV	6
     88 #define	MCPCIA_MAXSLOT	8
     89 
     90 /*
     91  * Interrupt Stuff for MCPCIA systems.
     92  *
     93  * EISA interrupts (at vector 0x800) have to be shared interrupts-
     94  * and that can be easily managed. All the PCI interrupts are deterministic
     95  * in that they start at vector 0x900, 0x40 per PCI slot, 0x200 per
     96  * MCPCIA, 4 MCPCIAs per GCBUS....
     97  */
     98 #define MCPCIA_EISA_KEYB_IRQ	1
     99 #define MCPCIA_EISA_MOUSE_IRQ	12
    100 #define MCPCIA_VEC_EISA		0x800
    101 #define MCPCIA_VEC_PCI		0x900
    102 
    103 /*
    104  * Special Vectors
    105  */
    106 #define	MCPCIA_I2C_CVEC		0xA90
    107 #define	MCPCIA_I2C_BVEC		0xAA0
    108