pci_1000a.c revision 1.22
1 /* $NetBSD: pci_1000a.c,v 1.22 2009/03/14 15:35:59 dsl Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at 8 * Carnegie-Mellon University. Platform support for Noritake, Pintake, and 9 * Corelle by Ross Harvey with copyright assignment by permission of Avalon 10 * Computer Systems, Inc. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 36 * All rights reserved. 37 * 38 * Author: Chris G. Demetriou 39 * 40 * Permission to use, copy, modify and distribute this software and 41 * its documentation is hereby granted, provided that both the copyright 42 * notice and this permission notice appear in all copies of the 43 * software, derivative works or modified versions, and any portions 44 * thereof, and that both notices appear in supporting documentation. 45 * 46 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 47 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 48 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 49 * 50 * Carnegie Mellon requests users of this software to return to 51 * 52 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 53 * School of Computer Science 54 * Carnegie Mellon University 55 * Pittsburgh PA 15213-3890 56 * 57 * any improvements or extensions that they make and grant Carnegie the 58 * rights to redistribute these changes. 59 */ 60 61 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 62 63 __KERNEL_RCSID(0, "$NetBSD: pci_1000a.c,v 1.22 2009/03/14 15:35:59 dsl Exp $"); 64 65 #include <sys/types.h> 66 #include <sys/param.h> 67 #include <sys/time.h> 68 #include <sys/systm.h> 69 #include <sys/errno.h> 70 #include <sys/malloc.h> 71 #include <sys/device.h> 72 #include <sys/syslog.h> 73 74 #include <uvm/uvm_extern.h> 75 76 #include <machine/autoconf.h> 77 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcivar.h> 80 81 #include <alpha/pci/pci_1000a.h> 82 83 #include "sio.h" 84 #if NSIO > 0 || NPCEB > 0 85 #include <alpha/pci/siovar.h> 86 #endif 87 88 #define PCI_NIRQ 32 89 #define PCI_STRAY_MAX 5 90 91 #define IMR2IRQ(bn) ((bn) - 1) 92 #define IRQ2IMR(irq) ((irq) + 1) 93 94 static bus_space_tag_t mystery_icu_iot; 95 static bus_space_handle_t mystery_icu_ioh[2]; 96 97 int dec_1000a_intr_map(struct pci_attach_args *, 98 pci_intr_handle_t *); 99 const char *dec_1000a_intr_string(void *, pci_intr_handle_t); 100 const struct evcnt *dec_1000a_intr_evcnt(void *, pci_intr_handle_t); 101 void *dec_1000a_intr_establish(void *, pci_intr_handle_t, 102 int, int (*func)(void *), void *); 103 void dec_1000a_intr_disestablish(void *, void *); 104 105 struct alpha_shared_intr *dec_1000a_pci_intr; 106 107 static void dec_1000a_iointr(void *arg, unsigned long vec); 108 static void dec_1000a_enable_intr(int irq); 109 static void dec_1000a_disable_intr(int irq); 110 static void pci_1000a_imi(void); 111 static pci_chipset_tag_t pc_tag; 112 113 void 114 pci_1000a_pickintr(core, iot, memt, pc) 115 void *core; 116 bus_space_tag_t iot, memt; 117 pci_chipset_tag_t pc; 118 { 119 char *cp; 120 int i; 121 122 mystery_icu_iot = iot; 123 124 pc_tag = pc; 125 if (bus_space_map(iot, 0x54a, 2, 0, mystery_icu_ioh + 0) 126 || bus_space_map(iot, 0x54c, 2, 0, mystery_icu_ioh + 1)) 127 panic("pci_1000a_pickintr"); 128 pc->pc_intr_v = core; 129 pc->pc_intr_map = dec_1000a_intr_map; 130 pc->pc_intr_string = dec_1000a_intr_string; 131 pc->pc_intr_evcnt = dec_1000a_intr_evcnt; 132 pc->pc_intr_establish = dec_1000a_intr_establish; 133 pc->pc_intr_disestablish = dec_1000a_intr_disestablish; 134 135 pc->pc_pciide_compat_intr_establish = NULL; 136 137 dec_1000a_pci_intr = alpha_shared_intr_alloc(PCI_NIRQ, 8); 138 for (i = 0; i < PCI_NIRQ; i++) { 139 alpha_shared_intr_set_maxstrays(dec_1000a_pci_intr, i, 140 PCI_STRAY_MAX); 141 142 cp = alpha_shared_intr_string(dec_1000a_pci_intr, i); 143 sprintf(cp, "irq %d", i); 144 evcnt_attach_dynamic(alpha_shared_intr_evcnt( 145 dec_1000a_pci_intr, i), EVCNT_TYPE_INTR, NULL, 146 "dec_1000a", cp); 147 } 148 149 pci_1000a_imi(); 150 #if NSIO > 0 || NPCEB > 0 151 sio_intr_setup(pc, iot); 152 #endif 153 } 154 155 int 156 dec_1000a_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 157 { 158 pcitag_t bustag = pa->pa_intrtag; 159 int buspin = pa->pa_intrpin; 160 pci_chipset_tag_t pc = pa->pa_pc; 161 int imrbit, device; 162 /* 163 * Get bit number in mystery ICU imr 164 */ 165 static const signed char imrmap[][4] = { 166 # define IRQSPLIT(o) { (o), (o)+1, (o)+16, (o)+16+1 } 167 # define IRQNONE { 0, 0, 0, 0 } 168 /* 0 */ { 1, 0, 0, 0 }, /* Noritake and Pintake */ 169 /* 1 */ IRQSPLIT(8), 170 /* 2 */ IRQSPLIT(10), 171 /* 3 */ IRQSPLIT(12), 172 /* 4 */ IRQSPLIT(14), 173 /* 5 */ { 1, 0, 0, 0 }, /* Corelle */ 174 /* 6 */ { 10, 0, 0, 0 }, /* Corelle */ 175 /* 7 */ IRQNONE, 176 /* 8 */ { 1, 0, 0, 0 }, /* isp behind ppb */ 177 /* 9 */ IRQNONE, 178 /* 10 */ IRQNONE, 179 /* 11 */ IRQSPLIT(2), 180 /* 12 */ IRQSPLIT(4), 181 /* 13 */ IRQSPLIT(6), 182 /* 14 */ IRQSPLIT(8) /* Corelle */ 183 }; 184 185 if (buspin == 0) /* No IRQ used. */ 186 return 1; 187 if (!(1 <= buspin && buspin <= 4)) 188 goto bad; 189 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 190 if (0 <= device && device < sizeof imrmap / sizeof imrmap[0]) { 191 if (device == 0) 192 printf("dec_1000a_intr_map: ?! UNEXPECTED DEV 0\n"); 193 imrbit = imrmap[device][buspin - 1]; 194 if (imrbit) { 195 *ihp = IMR2IRQ(imrbit); 196 return 0; 197 } 198 } 199 bad: printf("dec_1000a_intr_map: can't map dev %d pin %d\n", device, buspin); 200 return 1; 201 } 202 203 const char * 204 dec_1000a_intr_string(void *ccv, pci_intr_handle_t ih) 205 { 206 static const char irqmsg_fmt[] = "dec_1000a irq %ld"; 207 static char irqstr[sizeof irqmsg_fmt]; 208 209 210 if (ih >= PCI_NIRQ) 211 panic("dec_1000a_intr_string: bogus dec_1000a IRQ 0x%lx", ih); 212 213 snprintf(irqstr, sizeof irqstr, irqmsg_fmt, ih); 214 return (irqstr); 215 } 216 217 const struct evcnt * 218 dec_1000a_intr_evcnt(void *ccv, pci_intr_handle_t ih) 219 { 220 221 if (ih >= PCI_NIRQ) 222 panic("dec_1000a_intr_evcnt: bogus dec_1000a IRQ 0x%lx", ih); 223 224 return (alpha_shared_intr_evcnt(dec_1000a_pci_intr, ih)); 225 } 226 227 void * 228 dec_1000a_intr_establish(ccv, ih, level, func, arg) 229 void *ccv, *arg; 230 pci_intr_handle_t ih; 231 int level; 232 int (*func)(void *); 233 { 234 void *cookie; 235 236 if (ih >= PCI_NIRQ) 237 panic("dec_1000a_intr_establish: IRQ too high, 0x%lx", ih); 238 239 cookie = alpha_shared_intr_establish(dec_1000a_pci_intr, ih, IST_LEVEL, 240 level, func, arg, "dec_1000a irq"); 241 242 if (cookie != NULL && 243 alpha_shared_intr_firstactive(dec_1000a_pci_intr, ih)) { 244 scb_set(0x900 + SCB_IDXTOVEC(ih), dec_1000a_iointr, NULL, 245 level); 246 dec_1000a_enable_intr(ih); 247 } 248 return (cookie); 249 } 250 251 void 252 dec_1000a_intr_disestablish(ccv, cookie) 253 void *ccv, *cookie; 254 { 255 struct alpha_shared_intrhand *ih = cookie; 256 unsigned int irq = ih->ih_num; 257 int s; 258 259 s = splhigh(); 260 261 alpha_shared_intr_disestablish(dec_1000a_pci_intr, cookie, 262 "dec_1000a irq"); 263 if (alpha_shared_intr_isactive(dec_1000a_pci_intr, irq) == 0) { 264 dec_1000a_disable_intr(irq); 265 alpha_shared_intr_set_dfltsharetype(dec_1000a_pci_intr, irq, 266 IST_NONE); 267 scb_free(0x900 + SCB_IDXTOVEC(irq)); 268 } 269 270 splx(s); 271 } 272 273 static void 274 dec_1000a_iointr(void *framep, unsigned long vec) 275 { 276 int irq; 277 278 irq = SCB_VECTOIDX(vec - 0x900); 279 280 if (!alpha_shared_intr_dispatch(dec_1000a_pci_intr, irq)) { 281 alpha_shared_intr_stray(dec_1000a_pci_intr, irq, 282 "dec_1000a irq"); 283 if (ALPHA_SHARED_INTR_DISABLE(dec_1000a_pci_intr, irq)) 284 dec_1000a_disable_intr(irq); 285 } else 286 alpha_shared_intr_reset_strays(dec_1000a_pci_intr, irq); 287 } 288 289 /* 290 * Read and write the mystery ICU IMR registers 291 */ 292 293 #define IR(h) bus_space_read_2(mystery_icu_iot, mystery_icu_ioh[h], 0) 294 #define IW(h, v) bus_space_write_2(mystery_icu_iot, mystery_icu_ioh[h], 0, (v)) 295 296 /* 297 * Enable and disable interrupts at the ICU level 298 */ 299 300 static void 301 dec_1000a_enable_intr(int irq) 302 { 303 int imrval = IRQ2IMR(irq); 304 int i = imrval >= 16; 305 306 IW(i, IR(i) | 1 << (imrval & 0xf)); 307 } 308 309 static void 310 dec_1000a_disable_intr(int irq) 311 { 312 int imrval = IRQ2IMR(irq); 313 int i = imrval >= 16; 314 315 IW(i, IR(i) & ~(1 << (imrval & 0xf))); 316 } 317 /* 318 * Initialize mystery ICU 319 */ 320 static void 321 pci_1000a_imi() 322 { 323 IW(0, IR(0) & 1); 324 IW(1, IR(0) & 3); 325 } 326
Indexes created Wed Oct 01 07:09:59 GMT 2025