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pci_1000a.c revision 1.30
      1 /* $NetBSD: pci_1000a.c,v 1.30 2021/06/19 16:59:07 thorpej Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at
      8  * Carnegie-Mellon University. Platform support for Noritake, Pintake, and
      9  * Corelle by Ross Harvey with copyright assignment by permission of Avalon
     10  * Computer Systems, Inc.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
     36  * All rights reserved.
     37  *
     38  * Author: Chris G. Demetriou
     39  *
     40  * Permission to use, copy, modify and distribute this software and
     41  * its documentation is hereby granted, provided that both the copyright
     42  * notice and this permission notice appear in all copies of the
     43  * software, derivative works or modified versions, and any portions
     44  * thereof, and that both notices appear in supporting documentation.
     45  *
     46  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     47  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     48  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     49  *
     50  * Carnegie Mellon requests users of this software to return to
     51  *
     52  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     53  *  School of Computer Science
     54  *  Carnegie Mellon University
     55  *  Pittsburgh PA 15213-3890
     56  *
     57  * any improvements or extensions that they make and grant Carnegie the
     58  * rights to redistribute these changes.
     59  */
     60 
     61 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     62 
     63 __KERNEL_RCSID(0, "$NetBSD: pci_1000a.c,v 1.30 2021/06/19 16:59:07 thorpej Exp $");
     64 
     65 #include <sys/types.h>
     66 #include <sys/param.h>
     67 #include <sys/time.h>
     68 #include <sys/systm.h>
     69 #include <sys/errno.h>
     70 #include <sys/malloc.h>
     71 #include <sys/device.h>
     72 #include <sys/syslog.h>
     73 
     74 #include <machine/autoconf.h>
     75 #include <machine/rpb.h>
     76 
     77 #include <dev/pci/pcireg.h>
     78 #include <dev/pci/pcivar.h>
     79 
     80 #include "sio.h"
     81 #if NSIO > 0 || NPCEB > 0
     82 #include <alpha/pci/siovar.h>
     83 #endif
     84 
     85 #define	PCI_NIRQ	32
     86 #define	PCI_STRAY_MAX	5
     87 
     88 #define IMR2IRQ(bn) ((bn) - 1)
     89 #define IRQ2IMR(irq) ((irq) + 1)
     90 
     91 static bus_space_tag_t mystery_icu_iot;
     92 static bus_space_handle_t mystery_icu_ioh[2];
     93 
     94 static int	dec_1000a_intr_map(const struct pci_attach_args *,
     95 		    pci_intr_handle_t *);
     96 
     97 static void	dec_1000a_enable_intr(pci_chipset_tag_t, int irq);
     98 static void	dec_1000a_disable_intr(pci_chipset_tag_t, int irq);
     99 static void	pci_1000a_imi(void);
    100 
    101 static void
    102 pci_1000a_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt,
    103     pci_chipset_tag_t pc)
    104 {
    105 	char *cp;
    106 	int i;
    107 
    108 	mystery_icu_iot = iot;
    109 
    110 	if (bus_space_map(iot, 0x54a, 2, 0, mystery_icu_ioh + 0)
    111 	||  bus_space_map(iot, 0x54c, 2, 0, mystery_icu_ioh + 1))
    112 		panic("pci_1000a_pickintr");
    113 
    114 	pc->pc_intr_v = core;
    115 	pc->pc_intr_map = dec_1000a_intr_map;
    116 	pc->pc_intr_string = alpha_pci_generic_intr_string;
    117 	pc->pc_intr_evcnt = alpha_pci_generic_intr_evcnt;
    118 	pc->pc_intr_establish = alpha_pci_generic_intr_establish;
    119 	pc->pc_intr_disestablish = alpha_pci_generic_intr_disestablish;
    120 
    121 	pc->pc_pciide_compat_intr_establish = NULL;
    122 
    123 #define PCI_1000A_IRQ_STR	8
    124 	pc->pc_shared_intrs = alpha_shared_intr_alloc(PCI_NIRQ,
    125 	    PCI_1000A_IRQ_STR);
    126 	pc->pc_intr_desc = "dec 1000a irq";
    127 	pc->pc_vecbase = 0x900;
    128 	pc->pc_nirq = PCI_NIRQ;
    129 
    130 	pc->pc_intr_enable = dec_1000a_enable_intr;
    131 	pc->pc_intr_disable = dec_1000a_disable_intr;
    132 
    133 	for (i = 0; i < PCI_NIRQ; i++) {
    134 		alpha_shared_intr_set_maxstrays(pc->pc_shared_intrs, i,
    135 		    PCI_STRAY_MAX);
    136 
    137 		cp = alpha_shared_intr_string(pc->pc_shared_intrs, i);
    138 		snprintf(cp, PCI_1000A_IRQ_STR, "irq %d", i);
    139 		evcnt_attach_dynamic(alpha_shared_intr_evcnt(
    140 		    pc->pc_shared_intrs, i), EVCNT_TYPE_INTR, NULL,
    141 		    "dec 1000a", cp);
    142 	}
    143 
    144 	pci_1000a_imi();
    145 #if NSIO > 0 || NPCEB > 0
    146 	sio_intr_setup(pc, iot);
    147 #endif
    148 }
    149 ALPHA_PCI_INTR_INIT(ST_DEC_1000A, pci_1000a_pickintr)
    150 
    151 int
    152 dec_1000a_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
    153 {
    154 	pcitag_t bustag = pa->pa_intrtag;
    155 	int buspin = pa->pa_intrpin;
    156 	pci_chipset_tag_t pc = pa->pa_pc;
    157 	int imrbit, device = 0;	/* XXX gcc */
    158 	/*
    159 	 * Get bit number in mystery ICU imr
    160 	 */
    161 	static const signed char imrmap[][4] = {
    162 #		define	IRQSPLIT(o) { (o), (o)+1, (o)+16, (o)+16+1 }
    163 #		define	IRQNONE		 { 0, 0, 0, 0 }
    164 		/*  0  */ { 1, 0, 0, 0 },	/* Noritake and Pintake */
    165 		/*  1  */ IRQSPLIT(8),
    166 		/*  2  */ IRQSPLIT(10),
    167 		/*  3  */ IRQSPLIT(12),
    168 		/*  4  */ IRQSPLIT(14),
    169 		/*  5  */ { 1, 0, 0, 0 },	/* Corelle */
    170 		/*  6  */ { 10, 0, 0, 0 },	/* Corelle */
    171 		/*  7  */ IRQNONE,
    172 		/*  8  */ { 1, 0, 0, 0 },	/* isp behind ppb */
    173 		/*  9  */ IRQNONE,
    174 		/* 10  */ IRQNONE,
    175 		/* 11  */ IRQSPLIT(2),
    176 		/* 12  */ IRQSPLIT(4),
    177 		/* 13  */ IRQSPLIT(6),
    178 		/* 14  */ IRQSPLIT(8)		/* Corelle */
    179 	};
    180 
    181 	if (buspin == 0)	/* No IRQ used. */
    182 		return 1;
    183 	if (!(1 <= buspin && buspin <= 4))
    184 		goto bad;
    185 	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
    186 	if (0 <= device && device < sizeof imrmap / sizeof imrmap[0]) {
    187 		if (device == 0)
    188 			printf("dec_1000a_intr_map: ?! UNEXPECTED DEV 0\n");
    189 		imrbit = imrmap[device][buspin - 1];
    190 		if (imrbit) {
    191 			alpha_pci_intr_handle_init(ihp, IMR2IRQ(imrbit), 0);
    192 			return 0;
    193 		}
    194 	}
    195 bad:	printf("dec_1000a_intr_map: can't map dev %d pin %d\n", device, buspin);
    196 	return 1;
    197 }
    198 
    199 /*
    200  * Read and write the mystery ICU IMR registers
    201  */
    202 
    203 #define	IR(h) bus_space_read_2(mystery_icu_iot, mystery_icu_ioh[h], 0)
    204 #define	IW(h, v) bus_space_write_2(mystery_icu_iot, mystery_icu_ioh[h], 0, (v))
    205 
    206 /*
    207  * Enable and disable interrupts at the ICU level
    208  */
    209 
    210 static void
    211 dec_1000a_enable_intr(pci_chipset_tag_t pc __unused, int irq)
    212 {
    213 	int imrval = IRQ2IMR(irq);
    214 	int i = imrval >= 16;
    215 
    216 	IW(i, IR(i) | 1 << (imrval & 0xf));
    217 }
    218 
    219 static void
    220 dec_1000a_disable_intr(pci_chipset_tag_t pc __unused, int irq)
    221 {
    222 	int imrval = IRQ2IMR(irq);
    223 	int i = imrval >= 16;
    224 
    225 	IW(i, IR(i) & ~(1 << (imrval & 0xf)));
    226 }
    227 
    228 /*
    229  * Initialize mystery ICU
    230  */
    231 static void
    232 pci_1000a_imi(void)
    233 {
    234 	IW(0, IR(0) & 1);
    235 	IW(1, IR(0) & 3);
    236 }
    237