pci_1000a.c revision 1.4
1 /* $NetBSD: pci_1000a.c,v 1.4 1998/07/07 22:24:39 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at 8 * Carnegie-Mellon University. Platform support for Noritake, Pintake, and 9 * Corelle by Ross Harvey with copyright assignment by permission of Avalon 10 * Computer Systems, Inc. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 43 * All rights reserved. 44 * 45 * Author: Chris G. Demetriou 46 * 47 * Permission to use, copy, modify and distribute this software and 48 * its documentation is hereby granted, provided that both the copyright 49 * notice and this permission notice appear in all copies of the 50 * software, derivative works or modified versions, and any portions 51 * thereof, and that both notices appear in supporting documentation. 52 * 53 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 54 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 55 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 56 * 57 * Carnegie Mellon requests users of this software to return to 58 * 59 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 60 * School of Computer Science 61 * Carnegie Mellon University 62 * Pittsburgh PA 15213-3890 63 * 64 * any improvements or extensions that they make and grant Carnegie the 65 * rights to redistribute these changes. 66 */ 67 68 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 69 70 __KERNEL_RCSID(0, "$NetBSD: pci_1000a.c,v 1.4 1998/07/07 22:24:39 thorpej Exp $"); 71 72 #include <sys/types.h> 73 #include <sys/param.h> 74 #include <sys/time.h> 75 #include <sys/systm.h> 76 #include <sys/errno.h> 77 #include <sys/malloc.h> 78 #include <sys/device.h> 79 #include <sys/syslog.h> 80 81 #include <vm/vm.h> 82 83 #include <machine/autoconf.h> 84 85 #include <dev/pci/pcireg.h> 86 #include <dev/pci/pcivar.h> 87 88 #include <alpha/pci/pci_1000a.h> 89 90 #include <machine/intrcnt.h> 91 92 #include "sio.h" 93 #if NSIO 94 #include <alpha/pci/siovar.h> 95 #endif 96 97 #define PCI_STRAY_MAX 5 98 99 #define IMR2IRQ(bn) ((bn) - 1) 100 #define IRQ2IMR(irq) ((irq) + 1) 101 102 static bus_space_tag_t mystery_icu_iot; 103 static bus_space_handle_t mystery_icu_ioh[2]; 104 105 int dec_1000a_intr_map __P((void *, pcitag_t, int, int, 106 pci_intr_handle_t *)); 107 const char *dec_1000a_intr_string __P((void *, pci_intr_handle_t)); 108 void *dec_1000a_intr_establish __P((void *, pci_intr_handle_t, 109 int, int (*func)(void *), void *)); 110 void dec_1000a_intr_disestablish __P((void *, void *)); 111 112 struct alpha_shared_intr *dec_1000a_pci_intr; 113 114 static void dec_1000a_iointr __P((void *framep, unsigned long vec)); 115 static void dec_1000a_enable_intr __P((int irq)); 116 static void dec_1000a_disable_intr __P((int irq)); 117 static void pci_1000a_imi __P((void)); 118 static pci_chipset_tag_t pc_tag; 119 120 void 121 pci_1000a_pickintr(core, iot, memt, pc) 122 void *core; 123 bus_space_tag_t iot, memt; 124 pci_chipset_tag_t pc; 125 { 126 int i; 127 128 mystery_icu_iot = iot; 129 130 pc_tag = pc; 131 if (bus_space_map(iot, 0x54a, 2, 0, mystery_icu_ioh + 0) 132 || bus_space_map(iot, 0x54c, 2, 0, mystery_icu_ioh + 1)) 133 panic("pci_1000a_pickintr"); 134 pc->pc_intr_v = core; 135 pc->pc_intr_map = dec_1000a_intr_map; 136 pc->pc_intr_string = dec_1000a_intr_string; 137 pc->pc_intr_establish = dec_1000a_intr_establish; 138 pc->pc_intr_disestablish = dec_1000a_intr_disestablish; 139 140 pc->pc_pciide_compat_intr_establish = NULL; 141 142 dec_1000a_pci_intr = alpha_shared_intr_alloc(INTRCNT_DEC_1000A_IRQ_LEN); 143 for (i = 0; i < INTRCNT_DEC_1000A_IRQ_LEN; i++) 144 alpha_shared_intr_set_maxstrays(dec_1000a_pci_intr, i, 145 PCI_STRAY_MAX); 146 147 pci_1000a_imi(); 148 #if NSIO 149 sio_intr_setup(pc, iot); 150 #endif 151 set_iointr(dec_1000a_iointr); 152 } 153 154 int 155 dec_1000a_intr_map(ccv, bustag, buspin, line, ihp) 156 void *ccv; 157 pcitag_t bustag; 158 int buspin, line; 159 pci_intr_handle_t *ihp; 160 { 161 int imrbit, device; 162 /* 163 * Get bit number in mystery ICU imr 164 */ 165 static const signed char imrmap[][4] = { 166 # define IRQSPLIT(o) { (o), (o)+1, (o)+16, (o)+16+1 } 167 # define IRQNONE { 0, 0, 0, 0 } 168 /* 0 */ { 1, 0, 0, 0 }, /* Noritake and Pintake */ 169 /* 1 */ IRQSPLIT(8), 170 /* 2 */ IRQSPLIT(10), 171 /* 3 */ IRQSPLIT(12), 172 /* 4 */ IRQSPLIT(14), 173 /* 5 */ { 1, 0, 0, 0 }, /* Corelle */ 174 /* 6 */ { 10, 0, 0, 0 }, /* Corelle */ 175 /* 7 */ IRQNONE, 176 /* 8 */ IRQNONE, 177 /* 9 */ IRQNONE, 178 /* 10 */ IRQNONE, 179 /* 11 */ IRQSPLIT(2), 180 /* 12 */ IRQSPLIT(4), 181 /* 13 */ IRQSPLIT(6), 182 /* 14 */ IRQSPLIT(8) /* Corelle */ 183 }; 184 185 if (buspin == 0) /* No IRQ used. */ 186 return 1; 187 if (!(1 <= buspin && buspin <= 4)) 188 goto bad; 189 alpha_pci_decompose_tag(pc_tag, bustag, NULL, &device, NULL); 190 if (0 <= device && device < sizeof imrmap / sizeof imrmap[0]) { 191 imrbit = imrmap[device][buspin - 1]; 192 if (imrbit) { 193 *ihp = IMR2IRQ(imrbit); 194 return 0; 195 } 196 } 197 bad: printf("dec_1000a_intr_map: can't map dev %d pin %d\n", device, buspin); 198 return 1; 199 } 200 201 const char * 202 dec_1000a_intr_string(ccv, ih) 203 void *ccv; 204 pci_intr_handle_t ih; 205 { 206 static const char irqmsg_fmt[] = "dec_1000a irq %ld"; 207 static char irqstr[sizeof irqmsg_fmt]; 208 209 210 if (ih >= INTRCNT_DEC_1000A_IRQ_LEN) 211 panic("dec_1000a_intr_string: bogus dec_1000a IRQ 0x%x\n", ih); 212 213 sprintf(irqstr, irqmsg_fmt, ih); 214 return (irqstr); 215 } 216 217 void * 218 dec_1000a_intr_establish(ccv, ih, level, func, arg) 219 void *ccv, *arg; 220 pci_intr_handle_t ih; 221 int level; 222 int (*func) __P((void *)); 223 { 224 void *cookie; 225 226 if (ih >= INTRCNT_DEC_1000A_IRQ_LEN) 227 panic("dec_1000a_intr_establish: IRQ too high, 0x%x\n", ih); 228 229 cookie = alpha_shared_intr_establish(dec_1000a_pci_intr, ih, IST_LEVEL, 230 level, func, arg, "dec_1000a irq"); 231 232 if (cookie != NULL && 233 alpha_shared_intr_isactive(dec_1000a_pci_intr, ih)) 234 dec_1000a_enable_intr(ih); 235 return (cookie); 236 } 237 238 void 239 dec_1000a_intr_disestablish(ccv, cookie) 240 void *ccv, *cookie; 241 { 242 panic("dec_1000a_intr_disestablish not implemented"); /* XXX */ 243 } 244 245 static void 246 dec_1000a_iointr(framep, vec) 247 void *framep; 248 unsigned long vec; 249 { 250 int irq; 251 252 if (vec >= 0x900) { 253 if (vec >= 0x900 + (INTRCNT_DEC_1000A_IRQ_LEN << 4)) 254 panic("dec_1000a_iointr: vec 0x%x out of range\n", vec); 255 irq = (vec - 0x900) >> 4; 256 intrcnt[INTRCNT_DEC_1000A_IRQ + irq]++; 257 if (!alpha_shared_intr_dispatch(dec_1000a_pci_intr, irq)) { 258 alpha_shared_intr_stray(dec_1000a_pci_intr, irq, 259 "dec_1000a irq"); 260 if (ALPHA_SHARED_INTR_DISABLE(dec_1000a_pci_intr, irq)) 261 dec_1000a_disable_intr(irq); 262 } 263 return; 264 } 265 #if NSIO 266 if (vec >= 0x800) { 267 sio_iointr(framep, vec); 268 return; 269 } 270 #endif 271 panic("dec_1000a_iointr: weird vec 0x%x\n", vec); 272 } 273 274 /* 275 * Read and write the mystery ICU IMR registers 276 */ 277 278 #define IR(h) bus_space_read_2(mystery_icu_iot, mystery_icu_ioh[h], 0) 279 #define IW(h, v) bus_space_write_2(mystery_icu_iot, mystery_icu_ioh[h], 0, (v)) 280 281 /* 282 * Enable and disable interrupts at the ICU level 283 */ 284 285 static void 286 dec_1000a_enable_intr(irq) 287 int irq; 288 { 289 int imrval = IRQ2IMR(irq); 290 int i = imrval >= 16; 291 292 IW(i, IR(i) | 1 << (imrval & 0xf)); 293 } 294 295 static void 296 dec_1000a_disable_intr(irq) 297 int irq; 298 { 299 int imrval = IRQ2IMR(irq); 300 int i = imrval >= 16; 301 302 IW(i, IR(i) & ~(1 << (imrval & 0xf))); 303 } 304 /* 305 * Initialize mystery ICU 306 */ 307 static void 308 pci_1000a_imi() 309 { 310 IW(0, IR(0) & 1); 311 IW(1, IR(0) & 3); 312 } 313
Indexes created Tue Sep 30 20:09:53 GMT 2025