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pci_2100_a50.c revision 1.25.10.1
      1  1.25.10.1    bouyer /* $NetBSD: pci_2100_a50.c,v 1.25.10.1 2000/11/20 19:57:12 bouyer Exp $ */
      2        1.1       cgd 
      3        1.1       cgd /*
      4        1.6       cgd  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
      5        1.1       cgd  * All rights reserved.
      6        1.1       cgd  *
      7        1.1       cgd  * Author: Chris G. Demetriou
      8        1.1       cgd  *
      9        1.1       cgd  * Permission to use, copy, modify and distribute this software and
     10        1.1       cgd  * its documentation is hereby granted, provided that both the copyright
     11        1.1       cgd  * notice and this permission notice appear in all copies of the
     12        1.1       cgd  * software, derivative works or modified versions, and any portions
     13        1.1       cgd  * thereof, and that both notices appear in supporting documentation.
     14        1.1       cgd  *
     15        1.1       cgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16        1.1       cgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17        1.1       cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18        1.1       cgd  *
     19        1.1       cgd  * Carnegie Mellon requests users of this software to return to
     20        1.1       cgd  *
     21        1.1       cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22        1.1       cgd  *  School of Computer Science
     23        1.1       cgd  *  Carnegie Mellon University
     24        1.1       cgd  *  Pittsburgh PA 15213-3890
     25        1.1       cgd  *
     26        1.1       cgd  * any improvements or extensions that they make and grant Carnegie the
     27        1.1       cgd  * rights to redistribute these changes.
     28        1.1       cgd  */
     29       1.13       cgd 
     30       1.14       cgd #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     31       1.14       cgd 
     32  1.25.10.1    bouyer __KERNEL_RCSID(0, "$NetBSD: pci_2100_a50.c,v 1.25.10.1 2000/11/20 19:57:12 bouyer Exp $");
     33        1.1       cgd 
     34        1.1       cgd #include <sys/types.h>
     35        1.1       cgd #include <sys/param.h>
     36        1.1       cgd #include <sys/time.h>
     37        1.1       cgd #include <sys/systm.h>
     38        1.1       cgd #include <sys/errno.h>
     39        1.1       cgd #include <sys/device.h>
     40  1.25.10.1    bouyer 
     41  1.25.10.1    bouyer #include <uvm/uvm_extern.h>
     42        1.1       cgd 
     43        1.8       cgd #include <machine/autoconf.h>
     44        1.5       cgd #include <machine/bus.h>
     45        1.5       cgd #include <machine/intr.h>
     46        1.5       cgd 
     47        1.1       cgd #include <dev/isa/isavar.h>
     48        1.3       cgd #include <dev/pci/pcireg.h>
     49        1.1       cgd #include <dev/pci/pcivar.h>
     50        1.1       cgd 
     51        1.3       cgd #include <alpha/pci/apecsvar.h>
     52        1.1       cgd 
     53        1.3       cgd #include <alpha/pci/pci_2100_a50.h>
     54        1.3       cgd #include <alpha/pci/siovar.h>
     55        1.7       cgd #include <alpha/pci/sioreg.h>
     56        1.1       cgd 
     57        1.3       cgd #include "sio.h"
     58        1.1       cgd 
     59        1.5       cgd int	dec_2100_a50_intr_map __P((void *, pcitag_t, int, int,
     60        1.5       cgd 	    pci_intr_handle_t *));
     61        1.5       cgd const char *dec_2100_a50_intr_string __P((void *, pci_intr_handle_t));
     62  1.25.10.1    bouyer const struct evcnt *dec_2100_a50_intr_evcnt __P((void *, pci_intr_handle_t));
     63        1.5       cgd void    *dec_2100_a50_intr_establish __P((void *, pci_intr_handle_t,
     64        1.5       cgd 	    int, int (*func)(void *), void *));
     65        1.5       cgd void    dec_2100_a50_intr_disestablish __P((void *, void *));
     66        1.5       cgd 
     67        1.7       cgd #define	APECS_SIO_DEVICE	7	/* XXX */
     68        1.7       cgd 
     69        1.5       cgd void
     70        1.5       cgd pci_2100_a50_pickintr(acp)
     71        1.5       cgd 	struct apecs_config *acp;
     72        1.5       cgd {
     73       1.18   thorpej 	bus_space_tag_t iot = &acp->ac_iot;
     74        1.5       cgd 	pci_chipset_tag_t pc = &acp->ac_pc;
     75        1.5       cgd 	pcireg_t sioclass;
     76        1.5       cgd 	int sioII;
     77        1.5       cgd 
     78        1.5       cgd 	/* XXX MAGIC NUMBER */
     79        1.5       cgd 	sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG);
     80        1.5       cgd         sioII = (sioclass & 0xff) >= 3;
     81        1.5       cgd 
     82        1.5       cgd 	if (!sioII)
     83       1.10  christos 		printf("WARNING: SIO NOT SIO II... NO BETS...\n");
     84        1.5       cgd 
     85        1.5       cgd 	pc->pc_intr_v = acp;
     86        1.5       cgd 	pc->pc_intr_map = dec_2100_a50_intr_map;
     87        1.5       cgd 	pc->pc_intr_string = dec_2100_a50_intr_string;
     88  1.25.10.1    bouyer 	pc->pc_intr_evcnt = dec_2100_a50_intr_evcnt;
     89        1.5       cgd 	pc->pc_intr_establish = dec_2100_a50_intr_establish;
     90        1.5       cgd 	pc->pc_intr_disestablish = dec_2100_a50_intr_disestablish;
     91       1.22   thorpej 
     92       1.23    mjacob 	/* Not supported on 2100 A50. */
     93       1.22   thorpej 	pc->pc_pciide_compat_intr_establish = NULL;
     94        1.1       cgd 
     95        1.5       cgd #if NSIO
     96       1.20   thorpej 	sio_intr_setup(pc, iot);
     97        1.5       cgd 	set_iointr(&sio_iointr);
     98        1.5       cgd #else
     99        1.5       cgd 	panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)");
    100        1.5       cgd #endif
    101        1.5       cgd }
    102        1.5       cgd 
    103        1.5       cgd int
    104        1.5       cgd dec_2100_a50_intr_map(acv, bustag, buspin, line, ihp)
    105        1.3       cgd 	void *acv;
    106        1.5       cgd         pcitag_t bustag;
    107        1.5       cgd 	int buspin, line;
    108        1.5       cgd 	pci_intr_handle_t *ihp;
    109        1.1       cgd {
    110        1.3       cgd 	struct apecs_config *acp = acv;
    111        1.5       cgd 	pci_chipset_tag_t pc = &acp->ac_pc;
    112        1.5       cgd 	int device, pirq;
    113        1.5       cgd 	pcireg_t pirqreg;
    114        1.3       cgd 	u_int8_t pirqline;
    115       1.15       cgd 
    116       1.15       cgd #ifndef DIAGNOSTIC
    117       1.15       cgd 	pirq = 0;				/* XXX gcc -Wuninitialized */
    118       1.15       cgd #endif
    119        1.1       cgd 
    120       1.24   thorpej 	if (buspin == 0) {
    121       1.24   thorpej 		/* No IRQ used. */
    122       1.24   thorpej 		return 1;
    123       1.24   thorpej 	}
    124       1.24   thorpej 	if (buspin > 4) {
    125       1.24   thorpej 		printf("dec_2100_a50_intr_map: bad interrupt pin %d\n",
    126       1.12       cgd 		    buspin);
    127       1.24   thorpej 		return 1;
    128       1.24   thorpej 	}
    129        1.1       cgd 
    130       1.16       cgd 	alpha_pci_decompose_tag(pc, bustag, NULL, &device, NULL);
    131        1.1       cgd 
    132        1.1       cgd 	switch (device) {
    133        1.1       cgd 	case 6:					/* NCR SCSI */
    134        1.1       cgd 		pirq = 3;
    135        1.1       cgd 		break;
    136        1.1       cgd 
    137        1.1       cgd 	case 11:				/* slot 1 */
    138        1.5       cgd 	case 14:				/* slot 3 */
    139        1.5       cgd 		switch (buspin) {
    140        1.1       cgd 		case PCI_INTERRUPT_PIN_A:
    141        1.1       cgd 		case PCI_INTERRUPT_PIN_D:
    142        1.1       cgd 			pirq = 0;
    143        1.1       cgd 			break;
    144        1.1       cgd 		case PCI_INTERRUPT_PIN_B:
    145        1.1       cgd 			pirq = 2;
    146        1.1       cgd 			break;
    147        1.1       cgd 		case PCI_INTERRUPT_PIN_C:
    148        1.1       cgd 			pirq = 1;
    149        1.1       cgd 			break;
    150       1.12       cgd #ifdef DIAGNOSTIC
    151       1.12       cgd 		default:			/* XXX gcc -Wuninitialized */
    152       1.12       cgd 			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
    153       1.12       cgd 			    buspin);
    154       1.12       cgd #endif
    155        1.1       cgd 		};
    156        1.1       cgd 		break;
    157        1.1       cgd 
    158        1.1       cgd 	case 12:				/* slot 2 */
    159        1.5       cgd 		switch (buspin) {
    160        1.1       cgd 		case PCI_INTERRUPT_PIN_A:
    161        1.1       cgd 		case PCI_INTERRUPT_PIN_D:
    162        1.1       cgd 			pirq = 1;
    163        1.1       cgd 			break;
    164        1.1       cgd 		case PCI_INTERRUPT_PIN_B:
    165        1.1       cgd 			pirq = 0;
    166        1.1       cgd 			break;
    167        1.1       cgd 		case PCI_INTERRUPT_PIN_C:
    168        1.1       cgd 			pirq = 2;
    169        1.1       cgd 			break;
    170       1.12       cgd #ifdef DIAGNOSTIC
    171       1.12       cgd 		default:			/* XXX gcc -Wuninitialized */
    172       1.12       cgd 			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
    173       1.12       cgd 			    buspin);
    174       1.12       cgd #endif
    175        1.1       cgd 		};
    176        1.1       cgd 		break;
    177        1.1       cgd 
    178        1.1       cgd 	case 13:				/* slot 3 */
    179        1.5       cgd 		switch (buspin) {
    180        1.1       cgd 		case PCI_INTERRUPT_PIN_A:
    181        1.1       cgd 		case PCI_INTERRUPT_PIN_D:
    182        1.1       cgd 			pirq = 2;
    183        1.1       cgd 			break;
    184        1.1       cgd 		case PCI_INTERRUPT_PIN_B:
    185        1.1       cgd 			pirq = 1;
    186        1.1       cgd 			break;
    187        1.1       cgd 		case PCI_INTERRUPT_PIN_C:
    188        1.1       cgd 			pirq = 0;
    189        1.1       cgd 			break;
    190       1.12       cgd #ifdef DIAGNOSTIC
    191       1.12       cgd 		default:			/* XXX gcc -Wuninitialized */
    192       1.12       cgd 			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
    193       1.12       cgd 			    buspin);
    194       1.12       cgd #endif
    195        1.1       cgd 		};
    196        1.1       cgd 		break;
    197       1.12       cgd 
    198       1.12       cgd 	default:
    199       1.12       cgd                 printf("dec_2100_a50_intr_map: weird device number %d\n",
    200       1.12       cgd 		    device);
    201       1.12       cgd                 return 1;
    202        1.1       cgd 	}
    203        1.1       cgd 
    204        1.7       cgd 	pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0),
    205        1.7       cgd 	    SIO_PCIREG_PIRQ_RTCTRL);
    206        1.1       cgd #if 0
    207       1.21   thorpej 	printf("pci_2100_a50_intr_map: device %d pin %c: pirq %d, reg = %x\n",
    208        1.5       cgd 		device, '@' + buspin, pirq, pirqreg);
    209        1.1       cgd #endif
    210        1.3       cgd 	pirqline = (pirqreg >> (pirq * 8)) & 0xff;
    211        1.3       cgd 	if ((pirqline & 0x80) != 0)
    212        1.5       cgd 		return 1;
    213        1.3       cgd 	pirqline &= 0xf;
    214        1.1       cgd 
    215        1.1       cgd #if 0
    216       1.21   thorpej 	printf("pci_2100_a50_intr_map: device %d pin %c: mapped to line %d\n",
    217        1.5       cgd 	    device, '@' + buspin, pirqline);
    218        1.1       cgd #endif
    219        1.1       cgd 
    220        1.5       cgd 	*ihp = pirqline;
    221        1.5       cgd 	return (0);
    222        1.3       cgd }
    223        1.3       cgd 
    224        1.5       cgd const char *
    225        1.5       cgd dec_2100_a50_intr_string(acv, ih)
    226        1.5       cgd 	void *acv;
    227        1.5       cgd 	pci_intr_handle_t ih;
    228        1.3       cgd {
    229       1.12       cgd #if 0
    230        1.5       cgd 	struct apecs_config *acp = acv;
    231       1.12       cgd #endif
    232        1.3       cgd 
    233        1.5       cgd 	return sio_intr_string(NULL /*XXX*/, ih);
    234  1.25.10.1    bouyer }
    235  1.25.10.1    bouyer 
    236  1.25.10.1    bouyer const struct evcnt *
    237  1.25.10.1    bouyer dec_2100_a50_intr_evcnt(acv, ih)
    238  1.25.10.1    bouyer 	void *acv;
    239  1.25.10.1    bouyer 	pci_intr_handle_t ih;
    240  1.25.10.1    bouyer {
    241  1.25.10.1    bouyer #if 0
    242  1.25.10.1    bouyer 	struct apecs_config *acp = acv;
    243  1.25.10.1    bouyer #endif
    244  1.25.10.1    bouyer 
    245  1.25.10.1    bouyer 	return sio_intr_evcnt(NULL /*XXX*/, ih);
    246        1.1       cgd }
    247        1.1       cgd 
    248        1.5       cgd void *
    249        1.5       cgd dec_2100_a50_intr_establish(acv, ih, level, func, arg)
    250        1.5       cgd 	void *acv, *arg;
    251        1.5       cgd 	pci_intr_handle_t ih;
    252        1.5       cgd 	int level;
    253        1.5       cgd 	int (*func) __P((void *));
    254        1.1       cgd {
    255       1.12       cgd #if 0
    256        1.5       cgd 	struct apecs_config *acp = acv;
    257       1.12       cgd #endif
    258        1.1       cgd 
    259        1.5       cgd 	return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func,
    260        1.5       cgd 	    arg);
    261        1.5       cgd }
    262        1.3       cgd 
    263        1.5       cgd void
    264        1.5       cgd dec_2100_a50_intr_disestablish(acv, cookie)
    265        1.5       cgd 	void *acv, *cookie;
    266        1.5       cgd {
    267       1.12       cgd #if 0
    268        1.5       cgd 	struct apecs_config *acp = acv;
    269       1.12       cgd #endif
    270        1.1       cgd 
    271        1.5       cgd 	sio_intr_disestablish(NULL /*XXX*/, cookie);
    272        1.1       cgd }
    273