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pci_2100_a50.c revision 1.25.10.2
      1  1.25.10.2    bouyer /* $NetBSD: pci_2100_a50.c,v 1.25.10.2 2001/01/05 17:33:47 bouyer Exp $ */
      2        1.1       cgd 
      3        1.1       cgd /*
      4        1.6       cgd  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
      5        1.1       cgd  * All rights reserved.
      6        1.1       cgd  *
      7        1.1       cgd  * Author: Chris G. Demetriou
      8        1.1       cgd  *
      9        1.1       cgd  * Permission to use, copy, modify and distribute this software and
     10        1.1       cgd  * its documentation is hereby granted, provided that both the copyright
     11        1.1       cgd  * notice and this permission notice appear in all copies of the
     12        1.1       cgd  * software, derivative works or modified versions, and any portions
     13        1.1       cgd  * thereof, and that both notices appear in supporting documentation.
     14        1.1       cgd  *
     15        1.1       cgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16        1.1       cgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17        1.1       cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18        1.1       cgd  *
     19        1.1       cgd  * Carnegie Mellon requests users of this software to return to
     20        1.1       cgd  *
     21        1.1       cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22        1.1       cgd  *  School of Computer Science
     23        1.1       cgd  *  Carnegie Mellon University
     24        1.1       cgd  *  Pittsburgh PA 15213-3890
     25        1.1       cgd  *
     26        1.1       cgd  * any improvements or extensions that they make and grant Carnegie the
     27        1.1       cgd  * rights to redistribute these changes.
     28        1.1       cgd  */
     29       1.13       cgd 
     30       1.14       cgd #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     31       1.14       cgd 
     32  1.25.10.2    bouyer __KERNEL_RCSID(0, "$NetBSD: pci_2100_a50.c,v 1.25.10.2 2001/01/05 17:33:47 bouyer Exp $");
     33        1.1       cgd 
     34        1.1       cgd #include <sys/types.h>
     35        1.1       cgd #include <sys/param.h>
     36        1.1       cgd #include <sys/time.h>
     37        1.1       cgd #include <sys/systm.h>
     38        1.1       cgd #include <sys/errno.h>
     39        1.1       cgd #include <sys/device.h>
     40  1.25.10.1    bouyer 
     41  1.25.10.1    bouyer #include <uvm/uvm_extern.h>
     42        1.1       cgd 
     43        1.8       cgd #include <machine/autoconf.h>
     44        1.5       cgd #include <machine/bus.h>
     45        1.5       cgd #include <machine/intr.h>
     46        1.5       cgd 
     47        1.1       cgd #include <dev/isa/isavar.h>
     48        1.3       cgd #include <dev/pci/pcireg.h>
     49        1.1       cgd #include <dev/pci/pcivar.h>
     50        1.1       cgd 
     51        1.3       cgd #include <alpha/pci/apecsvar.h>
     52        1.1       cgd 
     53        1.3       cgd #include <alpha/pci/pci_2100_a50.h>
     54        1.3       cgd #include <alpha/pci/siovar.h>
     55        1.7       cgd #include <alpha/pci/sioreg.h>
     56        1.1       cgd 
     57        1.3       cgd #include "sio.h"
     58        1.1       cgd 
     59  1.25.10.2    bouyer int	dec_2100_a50_intr_map __P((struct pci_attach_args *, pci_intr_handle_t *));
     60        1.5       cgd const char *dec_2100_a50_intr_string __P((void *, pci_intr_handle_t));
     61  1.25.10.1    bouyer const struct evcnt *dec_2100_a50_intr_evcnt __P((void *, pci_intr_handle_t));
     62        1.5       cgd void    *dec_2100_a50_intr_establish __P((void *, pci_intr_handle_t,
     63        1.5       cgd 	    int, int (*func)(void *), void *));
     64        1.5       cgd void    dec_2100_a50_intr_disestablish __P((void *, void *));
     65        1.5       cgd 
     66        1.7       cgd #define	APECS_SIO_DEVICE	7	/* XXX */
     67        1.7       cgd 
     68        1.5       cgd void
     69        1.5       cgd pci_2100_a50_pickintr(acp)
     70        1.5       cgd 	struct apecs_config *acp;
     71        1.5       cgd {
     72       1.18   thorpej 	bus_space_tag_t iot = &acp->ac_iot;
     73        1.5       cgd 	pci_chipset_tag_t pc = &acp->ac_pc;
     74        1.5       cgd 	pcireg_t sioclass;
     75        1.5       cgd 	int sioII;
     76        1.5       cgd 
     77        1.5       cgd 	/* XXX MAGIC NUMBER */
     78        1.5       cgd 	sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG);
     79        1.5       cgd         sioII = (sioclass & 0xff) >= 3;
     80        1.5       cgd 
     81        1.5       cgd 	if (!sioII)
     82       1.10  christos 		printf("WARNING: SIO NOT SIO II... NO BETS...\n");
     83        1.5       cgd 
     84        1.5       cgd 	pc->pc_intr_v = acp;
     85        1.5       cgd 	pc->pc_intr_map = dec_2100_a50_intr_map;
     86        1.5       cgd 	pc->pc_intr_string = dec_2100_a50_intr_string;
     87  1.25.10.1    bouyer 	pc->pc_intr_evcnt = dec_2100_a50_intr_evcnt;
     88        1.5       cgd 	pc->pc_intr_establish = dec_2100_a50_intr_establish;
     89        1.5       cgd 	pc->pc_intr_disestablish = dec_2100_a50_intr_disestablish;
     90       1.22   thorpej 
     91       1.23    mjacob 	/* Not supported on 2100 A50. */
     92       1.22   thorpej 	pc->pc_pciide_compat_intr_establish = NULL;
     93        1.1       cgd 
     94        1.5       cgd #if NSIO
     95       1.20   thorpej 	sio_intr_setup(pc, iot);
     96        1.5       cgd 	set_iointr(&sio_iointr);
     97        1.5       cgd #else
     98        1.5       cgd 	panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)");
     99        1.5       cgd #endif
    100        1.5       cgd }
    101        1.5       cgd 
    102        1.5       cgd int
    103  1.25.10.2    bouyer dec_2100_a50_intr_map(pa, ihp)
    104  1.25.10.2    bouyer 	struct pci_attach_args *pa;
    105        1.5       cgd 	pci_intr_handle_t *ihp;
    106        1.1       cgd {
    107  1.25.10.2    bouyer         pcitag_t bustag = pa->pa_intrtag;
    108  1.25.10.2    bouyer 	int buspin = pa->pa_intrpin;
    109  1.25.10.2    bouyer 	pci_chipset_tag_t pc = pa->pa_pc;
    110        1.5       cgd 	int device, pirq;
    111        1.5       cgd 	pcireg_t pirqreg;
    112        1.3       cgd 	u_int8_t pirqline;
    113       1.15       cgd 
    114       1.15       cgd #ifndef DIAGNOSTIC
    115       1.15       cgd 	pirq = 0;				/* XXX gcc -Wuninitialized */
    116       1.15       cgd #endif
    117        1.1       cgd 
    118       1.24   thorpej 	if (buspin == 0) {
    119       1.24   thorpej 		/* No IRQ used. */
    120       1.24   thorpej 		return 1;
    121       1.24   thorpej 	}
    122       1.24   thorpej 	if (buspin > 4) {
    123       1.24   thorpej 		printf("dec_2100_a50_intr_map: bad interrupt pin %d\n",
    124       1.12       cgd 		    buspin);
    125       1.24   thorpej 		return 1;
    126       1.24   thorpej 	}
    127        1.1       cgd 
    128       1.16       cgd 	alpha_pci_decompose_tag(pc, bustag, NULL, &device, NULL);
    129        1.1       cgd 
    130        1.1       cgd 	switch (device) {
    131        1.1       cgd 	case 6:					/* NCR SCSI */
    132        1.1       cgd 		pirq = 3;
    133        1.1       cgd 		break;
    134        1.1       cgd 
    135        1.1       cgd 	case 11:				/* slot 1 */
    136        1.5       cgd 	case 14:				/* slot 3 */
    137        1.5       cgd 		switch (buspin) {
    138        1.1       cgd 		case PCI_INTERRUPT_PIN_A:
    139        1.1       cgd 		case PCI_INTERRUPT_PIN_D:
    140        1.1       cgd 			pirq = 0;
    141        1.1       cgd 			break;
    142        1.1       cgd 		case PCI_INTERRUPT_PIN_B:
    143        1.1       cgd 			pirq = 2;
    144        1.1       cgd 			break;
    145        1.1       cgd 		case PCI_INTERRUPT_PIN_C:
    146        1.1       cgd 			pirq = 1;
    147        1.1       cgd 			break;
    148       1.12       cgd #ifdef DIAGNOSTIC
    149       1.12       cgd 		default:			/* XXX gcc -Wuninitialized */
    150       1.12       cgd 			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
    151       1.12       cgd 			    buspin);
    152       1.12       cgd #endif
    153        1.1       cgd 		};
    154        1.1       cgd 		break;
    155        1.1       cgd 
    156        1.1       cgd 	case 12:				/* slot 2 */
    157        1.5       cgd 		switch (buspin) {
    158        1.1       cgd 		case PCI_INTERRUPT_PIN_A:
    159        1.1       cgd 		case PCI_INTERRUPT_PIN_D:
    160        1.1       cgd 			pirq = 1;
    161        1.1       cgd 			break;
    162        1.1       cgd 		case PCI_INTERRUPT_PIN_B:
    163        1.1       cgd 			pirq = 0;
    164        1.1       cgd 			break;
    165        1.1       cgd 		case PCI_INTERRUPT_PIN_C:
    166        1.1       cgd 			pirq = 2;
    167        1.1       cgd 			break;
    168       1.12       cgd #ifdef DIAGNOSTIC
    169       1.12       cgd 		default:			/* XXX gcc -Wuninitialized */
    170       1.12       cgd 			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
    171       1.12       cgd 			    buspin);
    172       1.12       cgd #endif
    173        1.1       cgd 		};
    174        1.1       cgd 		break;
    175        1.1       cgd 
    176        1.1       cgd 	case 13:				/* slot 3 */
    177        1.5       cgd 		switch (buspin) {
    178        1.1       cgd 		case PCI_INTERRUPT_PIN_A:
    179        1.1       cgd 		case PCI_INTERRUPT_PIN_D:
    180        1.1       cgd 			pirq = 2;
    181        1.1       cgd 			break;
    182        1.1       cgd 		case PCI_INTERRUPT_PIN_B:
    183        1.1       cgd 			pirq = 1;
    184        1.1       cgd 			break;
    185        1.1       cgd 		case PCI_INTERRUPT_PIN_C:
    186        1.1       cgd 			pirq = 0;
    187        1.1       cgd 			break;
    188       1.12       cgd #ifdef DIAGNOSTIC
    189       1.12       cgd 		default:			/* XXX gcc -Wuninitialized */
    190       1.12       cgd 			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
    191       1.12       cgd 			    buspin);
    192       1.12       cgd #endif
    193        1.1       cgd 		};
    194        1.1       cgd 		break;
    195       1.12       cgd 
    196       1.12       cgd 	default:
    197       1.12       cgd                 printf("dec_2100_a50_intr_map: weird device number %d\n",
    198       1.12       cgd 		    device);
    199       1.12       cgd                 return 1;
    200        1.1       cgd 	}
    201        1.1       cgd 
    202        1.7       cgd 	pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0),
    203        1.7       cgd 	    SIO_PCIREG_PIRQ_RTCTRL);
    204        1.1       cgd #if 0
    205       1.21   thorpej 	printf("pci_2100_a50_intr_map: device %d pin %c: pirq %d, reg = %x\n",
    206        1.5       cgd 		device, '@' + buspin, pirq, pirqreg);
    207        1.1       cgd #endif
    208        1.3       cgd 	pirqline = (pirqreg >> (pirq * 8)) & 0xff;
    209        1.3       cgd 	if ((pirqline & 0x80) != 0)
    210        1.5       cgd 		return 1;
    211        1.3       cgd 	pirqline &= 0xf;
    212        1.1       cgd 
    213        1.1       cgd #if 0
    214       1.21   thorpej 	printf("pci_2100_a50_intr_map: device %d pin %c: mapped to line %d\n",
    215        1.5       cgd 	    device, '@' + buspin, pirqline);
    216        1.1       cgd #endif
    217        1.1       cgd 
    218        1.5       cgd 	*ihp = pirqline;
    219        1.5       cgd 	return (0);
    220        1.3       cgd }
    221        1.3       cgd 
    222        1.5       cgd const char *
    223        1.5       cgd dec_2100_a50_intr_string(acv, ih)
    224        1.5       cgd 	void *acv;
    225        1.5       cgd 	pci_intr_handle_t ih;
    226        1.3       cgd {
    227       1.12       cgd #if 0
    228        1.5       cgd 	struct apecs_config *acp = acv;
    229       1.12       cgd #endif
    230        1.3       cgd 
    231        1.5       cgd 	return sio_intr_string(NULL /*XXX*/, ih);
    232  1.25.10.1    bouyer }
    233  1.25.10.1    bouyer 
    234  1.25.10.1    bouyer const struct evcnt *
    235  1.25.10.1    bouyer dec_2100_a50_intr_evcnt(acv, ih)
    236  1.25.10.1    bouyer 	void *acv;
    237  1.25.10.1    bouyer 	pci_intr_handle_t ih;
    238  1.25.10.1    bouyer {
    239  1.25.10.1    bouyer #if 0
    240  1.25.10.1    bouyer 	struct apecs_config *acp = acv;
    241  1.25.10.1    bouyer #endif
    242  1.25.10.1    bouyer 
    243  1.25.10.1    bouyer 	return sio_intr_evcnt(NULL /*XXX*/, ih);
    244        1.1       cgd }
    245        1.1       cgd 
    246        1.5       cgd void *
    247        1.5       cgd dec_2100_a50_intr_establish(acv, ih, level, func, arg)
    248        1.5       cgd 	void *acv, *arg;
    249        1.5       cgd 	pci_intr_handle_t ih;
    250        1.5       cgd 	int level;
    251        1.5       cgd 	int (*func) __P((void *));
    252        1.1       cgd {
    253       1.12       cgd #if 0
    254        1.5       cgd 	struct apecs_config *acp = acv;
    255       1.12       cgd #endif
    256        1.1       cgd 
    257        1.5       cgd 	return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func,
    258        1.5       cgd 	    arg);
    259        1.5       cgd }
    260        1.3       cgd 
    261        1.5       cgd void
    262        1.5       cgd dec_2100_a50_intr_disestablish(acv, cookie)
    263        1.5       cgd 	void *acv, *cookie;
    264        1.5       cgd {
    265       1.12       cgd #if 0
    266        1.5       cgd 	struct apecs_config *acp = acv;
    267       1.12       cgd #endif
    268        1.1       cgd 
    269        1.5       cgd 	sio_intr_disestablish(NULL /*XXX*/, cookie);
    270        1.1       cgd }
    271