Home | History | Annotate | Line # | Download | only in pci
pci_2100_a50.c revision 1.29.4.3
      1  1.29.4.3  jdolecek /* $NetBSD: pci_2100_a50.c,v 1.29.4.3 2002/10/10 18:31:06 jdolecek Exp $ */
      2       1.1       cgd 
      3       1.1       cgd /*
      4       1.6       cgd  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
      5       1.1       cgd  * All rights reserved.
      6       1.1       cgd  *
      7       1.1       cgd  * Author: Chris G. Demetriou
      8       1.1       cgd  *
      9       1.1       cgd  * Permission to use, copy, modify and distribute this software and
     10       1.1       cgd  * its documentation is hereby granted, provided that both the copyright
     11       1.1       cgd  * notice and this permission notice appear in all copies of the
     12       1.1       cgd  * software, derivative works or modified versions, and any portions
     13       1.1       cgd  * thereof, and that both notices appear in supporting documentation.
     14       1.1       cgd  *
     15       1.1       cgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16       1.1       cgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17       1.1       cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18       1.1       cgd  *
     19       1.1       cgd  * Carnegie Mellon requests users of this software to return to
     20       1.1       cgd  *
     21       1.1       cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22       1.1       cgd  *  School of Computer Science
     23       1.1       cgd  *  Carnegie Mellon University
     24       1.1       cgd  *  Pittsburgh PA 15213-3890
     25       1.1       cgd  *
     26       1.1       cgd  * any improvements or extensions that they make and grant Carnegie the
     27       1.1       cgd  * rights to redistribute these changes.
     28       1.1       cgd  */
     29      1.13       cgd 
     30      1.14       cgd #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     31      1.14       cgd 
     32  1.29.4.3  jdolecek __KERNEL_RCSID(0, "$NetBSD: pci_2100_a50.c,v 1.29.4.3 2002/10/10 18:31:06 jdolecek Exp $");
     33       1.1       cgd 
     34       1.1       cgd #include <sys/types.h>
     35       1.1       cgd #include <sys/param.h>
     36       1.1       cgd #include <sys/time.h>
     37       1.1       cgd #include <sys/systm.h>
     38       1.1       cgd #include <sys/errno.h>
     39       1.1       cgd #include <sys/device.h>
     40      1.28       mrg 
     41      1.28       mrg #include <uvm/uvm_extern.h>
     42       1.1       cgd 
     43       1.8       cgd #include <machine/autoconf.h>
     44       1.5       cgd #include <machine/bus.h>
     45       1.5       cgd #include <machine/intr.h>
     46       1.5       cgd 
     47       1.1       cgd #include <dev/isa/isavar.h>
     48       1.3       cgd #include <dev/pci/pcireg.h>
     49       1.1       cgd #include <dev/pci/pcivar.h>
     50       1.1       cgd 
     51       1.3       cgd #include <alpha/pci/apecsvar.h>
     52       1.1       cgd 
     53       1.3       cgd #include <alpha/pci/pci_2100_a50.h>
     54       1.3       cgd #include <alpha/pci/siovar.h>
     55       1.7       cgd #include <alpha/pci/sioreg.h>
     56       1.1       cgd 
     57       1.3       cgd #include "sio.h"
     58       1.1       cgd 
     59      1.29  sommerfe int	dec_2100_a50_intr_map __P((struct pci_attach_args *, pci_intr_handle_t *));
     60       1.5       cgd const char *dec_2100_a50_intr_string __P((void *, pci_intr_handle_t));
     61      1.26       cgd const struct evcnt *dec_2100_a50_intr_evcnt __P((void *, pci_intr_handle_t));
     62       1.5       cgd void    *dec_2100_a50_intr_establish __P((void *, pci_intr_handle_t,
     63       1.5       cgd 	    int, int (*func)(void *), void *));
     64       1.5       cgd void    dec_2100_a50_intr_disestablish __P((void *, void *));
     65       1.5       cgd 
     66       1.7       cgd #define	APECS_SIO_DEVICE	7	/* XXX */
     67       1.7       cgd 
     68       1.5       cgd void
     69       1.5       cgd pci_2100_a50_pickintr(acp)
     70       1.5       cgd 	struct apecs_config *acp;
     71       1.5       cgd {
     72      1.18   thorpej 	bus_space_tag_t iot = &acp->ac_iot;
     73       1.5       cgd 	pci_chipset_tag_t pc = &acp->ac_pc;
     74       1.5       cgd 	pcireg_t sioclass;
     75       1.5       cgd 	int sioII;
     76       1.5       cgd 
     77       1.5       cgd 	/* XXX MAGIC NUMBER */
     78       1.5       cgd 	sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG);
     79       1.5       cgd         sioII = (sioclass & 0xff) >= 3;
     80       1.5       cgd 
     81       1.5       cgd 	if (!sioII)
     82      1.10  christos 		printf("WARNING: SIO NOT SIO II... NO BETS...\n");
     83       1.5       cgd 
     84       1.5       cgd 	pc->pc_intr_v = acp;
     85       1.5       cgd 	pc->pc_intr_map = dec_2100_a50_intr_map;
     86       1.5       cgd 	pc->pc_intr_string = dec_2100_a50_intr_string;
     87      1.26       cgd 	pc->pc_intr_evcnt = dec_2100_a50_intr_evcnt;
     88       1.5       cgd 	pc->pc_intr_establish = dec_2100_a50_intr_establish;
     89       1.5       cgd 	pc->pc_intr_disestablish = dec_2100_a50_intr_disestablish;
     90      1.22   thorpej 
     91      1.23    mjacob 	/* Not supported on 2100 A50. */
     92      1.22   thorpej 	pc->pc_pciide_compat_intr_establish = NULL;
     93       1.1       cgd 
     94       1.5       cgd #if NSIO
     95      1.20   thorpej 	sio_intr_setup(pc, iot);
     96       1.5       cgd #else
     97       1.5       cgd 	panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)");
     98       1.5       cgd #endif
     99       1.5       cgd }
    100       1.5       cgd 
    101       1.5       cgd int
    102      1.29  sommerfe dec_2100_a50_intr_map(pa, ihp)
    103      1.29  sommerfe 	struct pci_attach_args *pa;
    104       1.5       cgd 	pci_intr_handle_t *ihp;
    105       1.1       cgd {
    106      1.29  sommerfe         pcitag_t bustag = pa->pa_intrtag;
    107      1.29  sommerfe 	int buspin = pa->pa_intrpin;
    108      1.29  sommerfe 	pci_chipset_tag_t pc = pa->pa_pc;
    109       1.5       cgd 	int device, pirq;
    110       1.5       cgd 	pcireg_t pirqreg;
    111       1.3       cgd 	u_int8_t pirqline;
    112      1.15       cgd 
    113      1.15       cgd #ifndef DIAGNOSTIC
    114      1.15       cgd 	pirq = 0;				/* XXX gcc -Wuninitialized */
    115      1.15       cgd #endif
    116       1.1       cgd 
    117      1.24   thorpej 	if (buspin == 0) {
    118      1.24   thorpej 		/* No IRQ used. */
    119      1.24   thorpej 		return 1;
    120      1.24   thorpej 	}
    121      1.24   thorpej 	if (buspin > 4) {
    122      1.24   thorpej 		printf("dec_2100_a50_intr_map: bad interrupt pin %d\n",
    123      1.12       cgd 		    buspin);
    124      1.24   thorpej 		return 1;
    125      1.24   thorpej 	}
    126       1.1       cgd 
    127  1.29.4.2  jdolecek 	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
    128       1.1       cgd 
    129       1.1       cgd 	switch (device) {
    130       1.1       cgd 	case 6:					/* NCR SCSI */
    131       1.1       cgd 		pirq = 3;
    132       1.1       cgd 		break;
    133       1.1       cgd 
    134       1.1       cgd 	case 11:				/* slot 1 */
    135       1.5       cgd 	case 14:				/* slot 3 */
    136       1.5       cgd 		switch (buspin) {
    137       1.1       cgd 		case PCI_INTERRUPT_PIN_A:
    138       1.1       cgd 		case PCI_INTERRUPT_PIN_D:
    139       1.1       cgd 			pirq = 0;
    140       1.1       cgd 			break;
    141       1.1       cgd 		case PCI_INTERRUPT_PIN_B:
    142       1.1       cgd 			pirq = 2;
    143       1.1       cgd 			break;
    144       1.1       cgd 		case PCI_INTERRUPT_PIN_C:
    145       1.1       cgd 			pirq = 1;
    146       1.1       cgd 			break;
    147      1.12       cgd #ifdef DIAGNOSTIC
    148      1.12       cgd 		default:			/* XXX gcc -Wuninitialized */
    149  1.29.4.3  jdolecek 			panic("dec_2100_a50_intr_map bogus PCI pin %d",
    150      1.12       cgd 			    buspin);
    151      1.12       cgd #endif
    152       1.1       cgd 		};
    153       1.1       cgd 		break;
    154       1.1       cgd 
    155       1.1       cgd 	case 12:				/* slot 2 */
    156       1.5       cgd 		switch (buspin) {
    157       1.1       cgd 		case PCI_INTERRUPT_PIN_A:
    158       1.1       cgd 		case PCI_INTERRUPT_PIN_D:
    159       1.1       cgd 			pirq = 1;
    160       1.1       cgd 			break;
    161       1.1       cgd 		case PCI_INTERRUPT_PIN_B:
    162       1.1       cgd 			pirq = 0;
    163       1.1       cgd 			break;
    164       1.1       cgd 		case PCI_INTERRUPT_PIN_C:
    165       1.1       cgd 			pirq = 2;
    166       1.1       cgd 			break;
    167      1.12       cgd #ifdef DIAGNOSTIC
    168      1.12       cgd 		default:			/* XXX gcc -Wuninitialized */
    169  1.29.4.3  jdolecek 			panic("dec_2100_a50_intr_map bogus PCI pin %d",
    170      1.12       cgd 			    buspin);
    171      1.12       cgd #endif
    172       1.1       cgd 		};
    173       1.1       cgd 		break;
    174       1.1       cgd 
    175       1.1       cgd 	case 13:				/* slot 3 */
    176       1.5       cgd 		switch (buspin) {
    177       1.1       cgd 		case PCI_INTERRUPT_PIN_A:
    178       1.1       cgd 		case PCI_INTERRUPT_PIN_D:
    179       1.1       cgd 			pirq = 2;
    180       1.1       cgd 			break;
    181       1.1       cgd 		case PCI_INTERRUPT_PIN_B:
    182       1.1       cgd 			pirq = 1;
    183       1.1       cgd 			break;
    184       1.1       cgd 		case PCI_INTERRUPT_PIN_C:
    185       1.1       cgd 			pirq = 0;
    186       1.1       cgd 			break;
    187      1.12       cgd #ifdef DIAGNOSTIC
    188      1.12       cgd 		default:			/* XXX gcc -Wuninitialized */
    189  1.29.4.3  jdolecek 			panic("dec_2100_a50_intr_map bogus PCI pin %d",
    190      1.12       cgd 			    buspin);
    191      1.12       cgd #endif
    192       1.1       cgd 		};
    193       1.1       cgd 		break;
    194      1.12       cgd 
    195      1.12       cgd 	default:
    196      1.12       cgd                 printf("dec_2100_a50_intr_map: weird device number %d\n",
    197      1.12       cgd 		    device);
    198      1.12       cgd                 return 1;
    199       1.1       cgd 	}
    200       1.1       cgd 
    201       1.7       cgd 	pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0),
    202       1.7       cgd 	    SIO_PCIREG_PIRQ_RTCTRL);
    203       1.1       cgd #if 0
    204      1.21   thorpej 	printf("pci_2100_a50_intr_map: device %d pin %c: pirq %d, reg = %x\n",
    205       1.5       cgd 		device, '@' + buspin, pirq, pirqreg);
    206       1.1       cgd #endif
    207       1.3       cgd 	pirqline = (pirqreg >> (pirq * 8)) & 0xff;
    208       1.3       cgd 	if ((pirqline & 0x80) != 0)
    209       1.5       cgd 		return 1;
    210       1.3       cgd 	pirqline &= 0xf;
    211       1.1       cgd 
    212       1.1       cgd #if 0
    213      1.21   thorpej 	printf("pci_2100_a50_intr_map: device %d pin %c: mapped to line %d\n",
    214       1.5       cgd 	    device, '@' + buspin, pirqline);
    215       1.1       cgd #endif
    216       1.1       cgd 
    217       1.5       cgd 	*ihp = pirqline;
    218       1.5       cgd 	return (0);
    219       1.3       cgd }
    220       1.3       cgd 
    221       1.5       cgd const char *
    222       1.5       cgd dec_2100_a50_intr_string(acv, ih)
    223       1.5       cgd 	void *acv;
    224       1.5       cgd 	pci_intr_handle_t ih;
    225       1.3       cgd {
    226      1.12       cgd #if 0
    227       1.5       cgd 	struct apecs_config *acp = acv;
    228      1.12       cgd #endif
    229       1.3       cgd 
    230       1.5       cgd 	return sio_intr_string(NULL /*XXX*/, ih);
    231      1.26       cgd }
    232      1.26       cgd 
    233      1.26       cgd const struct evcnt *
    234      1.26       cgd dec_2100_a50_intr_evcnt(acv, ih)
    235      1.26       cgd 	void *acv;
    236      1.26       cgd 	pci_intr_handle_t ih;
    237      1.26       cgd {
    238      1.26       cgd #if 0
    239      1.26       cgd 	struct apecs_config *acp = acv;
    240      1.26       cgd #endif
    241      1.26       cgd 
    242      1.26       cgd 	return sio_intr_evcnt(NULL /*XXX*/, ih);
    243       1.1       cgd }
    244       1.1       cgd 
    245       1.5       cgd void *
    246       1.5       cgd dec_2100_a50_intr_establish(acv, ih, level, func, arg)
    247       1.5       cgd 	void *acv, *arg;
    248       1.5       cgd 	pci_intr_handle_t ih;
    249       1.5       cgd 	int level;
    250       1.5       cgd 	int (*func) __P((void *));
    251       1.1       cgd {
    252      1.12       cgd #if 0
    253       1.5       cgd 	struct apecs_config *acp = acv;
    254      1.12       cgd #endif
    255       1.1       cgd 
    256       1.5       cgd 	return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func,
    257       1.5       cgd 	    arg);
    258       1.5       cgd }
    259       1.3       cgd 
    260       1.5       cgd void
    261       1.5       cgd dec_2100_a50_intr_disestablish(acv, cookie)
    262       1.5       cgd 	void *acv, *cookie;
    263       1.5       cgd {
    264      1.12       cgd #if 0
    265       1.5       cgd 	struct apecs_config *acp = acv;
    266      1.12       cgd #endif
    267       1.1       cgd 
    268       1.5       cgd 	sio_intr_disestablish(NULL /*XXX*/, cookie);
    269       1.1       cgd }
    270