pci_2100_a50.c revision 1.42 1 1.42 thorpej /* $NetBSD: pci_2100_a50.c,v 1.42 2020/09/22 15:24:02 thorpej Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.6 cgd * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.40 matt *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.40 matt *
15 1.40 matt * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.40 matt * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.40 matt *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.13 cgd
30 1.14 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
31 1.14 cgd
32 1.42 thorpej __KERNEL_RCSID(0, "$NetBSD: pci_2100_a50.c,v 1.42 2020/09/22 15:24:02 thorpej Exp $");
33 1.1 cgd
34 1.1 cgd #include <sys/types.h>
35 1.1 cgd #include <sys/param.h>
36 1.1 cgd #include <sys/time.h>
37 1.1 cgd #include <sys/systm.h>
38 1.1 cgd #include <sys/errno.h>
39 1.1 cgd #include <sys/device.h>
40 1.28 mrg
41 1.8 cgd #include <machine/autoconf.h>
42 1.39 dyoung #include <sys/bus.h>
43 1.5 cgd #include <machine/intr.h>
44 1.5 cgd
45 1.1 cgd #include <dev/isa/isavar.h>
46 1.3 cgd #include <dev/pci/pcireg.h>
47 1.1 cgd #include <dev/pci/pcivar.h>
48 1.1 cgd
49 1.3 cgd #include <alpha/pci/apecsvar.h>
50 1.1 cgd
51 1.3 cgd #include <alpha/pci/pci_2100_a50.h>
52 1.3 cgd #include <alpha/pci/siovar.h>
53 1.7 cgd #include <alpha/pci/sioreg.h>
54 1.1 cgd
55 1.3 cgd #include "sio.h"
56 1.1 cgd
57 1.42 thorpej static int dec_2100_a50_intr_map(const struct pci_attach_args *,
58 1.42 thorpej pci_intr_handle_t *);
59 1.5 cgd
60 1.7 cgd #define APECS_SIO_DEVICE 7 /* XXX */
61 1.7 cgd
62 1.5 cgd void
63 1.34 dsl pci_2100_a50_pickintr(struct apecs_config *acp)
64 1.5 cgd {
65 1.18 thorpej bus_space_tag_t iot = &acp->ac_iot;
66 1.5 cgd pci_chipset_tag_t pc = &acp->ac_pc;
67 1.5 cgd pcireg_t sioclass;
68 1.5 cgd int sioII;
69 1.5 cgd
70 1.5 cgd /* XXX MAGIC NUMBER */
71 1.5 cgd sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG);
72 1.40 matt sioII = (sioclass & 0xff) >= 3;
73 1.5 cgd
74 1.5 cgd if (!sioII)
75 1.10 christos printf("WARNING: SIO NOT SIO II... NO BETS...\n");
76 1.5 cgd
77 1.5 cgd pc->pc_intr_v = acp;
78 1.5 cgd pc->pc_intr_map = dec_2100_a50_intr_map;
79 1.42 thorpej pc->pc_intr_string = sio_pci_intr_string;
80 1.42 thorpej pc->pc_intr_evcnt = sio_pci_intr_evcnt;
81 1.42 thorpej pc->pc_intr_establish = sio_pci_intr_establish;
82 1.42 thorpej pc->pc_intr_disestablish = sio_pci_intr_disestablish;
83 1.22 thorpej
84 1.23 mjacob /* Not supported on 2100 A50. */
85 1.22 thorpej pc->pc_pciide_compat_intr_establish = NULL;
86 1.1 cgd
87 1.5 cgd #if NSIO
88 1.20 thorpej sio_intr_setup(pc, iot);
89 1.5 cgd #else
90 1.5 cgd panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)");
91 1.5 cgd #endif
92 1.5 cgd }
93 1.5 cgd
94 1.5 cgd int
95 1.38 dyoung dec_2100_a50_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
96 1.1 cgd {
97 1.40 matt pcitag_t bustag = pa->pa_intrtag;
98 1.29 sommerfe int buspin = pa->pa_intrpin;
99 1.29 sommerfe pci_chipset_tag_t pc = pa->pa_pc;
100 1.5 cgd int device, pirq;
101 1.5 cgd pcireg_t pirqreg;
102 1.40 matt uint8_t pirqline;
103 1.15 cgd
104 1.15 cgd #ifndef DIAGNOSTIC
105 1.15 cgd pirq = 0; /* XXX gcc -Wuninitialized */
106 1.15 cgd #endif
107 1.1 cgd
108 1.24 thorpej if (buspin == 0) {
109 1.24 thorpej /* No IRQ used. */
110 1.24 thorpej return 1;
111 1.24 thorpej }
112 1.42 thorpej if (buspin < 0 || buspin > 4) {
113 1.24 thorpej printf("dec_2100_a50_intr_map: bad interrupt pin %d\n",
114 1.12 cgd buspin);
115 1.24 thorpej return 1;
116 1.24 thorpej }
117 1.1 cgd
118 1.31 thorpej pci_decompose_tag(pc, bustag, NULL, &device, NULL);
119 1.1 cgd
120 1.1 cgd switch (device) {
121 1.1 cgd case 6: /* NCR SCSI */
122 1.1 cgd pirq = 3;
123 1.1 cgd break;
124 1.1 cgd
125 1.1 cgd case 11: /* slot 1 */
126 1.5 cgd case 14: /* slot 3 */
127 1.5 cgd switch (buspin) {
128 1.1 cgd case PCI_INTERRUPT_PIN_A:
129 1.1 cgd case PCI_INTERRUPT_PIN_D:
130 1.1 cgd pirq = 0;
131 1.1 cgd break;
132 1.1 cgd case PCI_INTERRUPT_PIN_B:
133 1.1 cgd pirq = 2;
134 1.1 cgd break;
135 1.1 cgd case PCI_INTERRUPT_PIN_C:
136 1.1 cgd pirq = 1;
137 1.1 cgd break;
138 1.12 cgd #ifdef DIAGNOSTIC
139 1.12 cgd default: /* XXX gcc -Wuninitialized */
140 1.32 provos panic("dec_2100_a50_intr_map bogus PCI pin %d",
141 1.12 cgd buspin);
142 1.12 cgd #endif
143 1.1 cgd };
144 1.1 cgd break;
145 1.1 cgd
146 1.1 cgd case 12: /* slot 2 */
147 1.5 cgd switch (buspin) {
148 1.1 cgd case PCI_INTERRUPT_PIN_A:
149 1.1 cgd case PCI_INTERRUPT_PIN_D:
150 1.1 cgd pirq = 1;
151 1.1 cgd break;
152 1.1 cgd case PCI_INTERRUPT_PIN_B:
153 1.1 cgd pirq = 0;
154 1.1 cgd break;
155 1.1 cgd case PCI_INTERRUPT_PIN_C:
156 1.1 cgd pirq = 2;
157 1.1 cgd break;
158 1.12 cgd #ifdef DIAGNOSTIC
159 1.12 cgd default: /* XXX gcc -Wuninitialized */
160 1.32 provos panic("dec_2100_a50_intr_map bogus PCI pin %d",
161 1.12 cgd buspin);
162 1.12 cgd #endif
163 1.1 cgd };
164 1.1 cgd break;
165 1.1 cgd
166 1.1 cgd case 13: /* slot 3 */
167 1.5 cgd switch (buspin) {
168 1.1 cgd case PCI_INTERRUPT_PIN_A:
169 1.1 cgd case PCI_INTERRUPT_PIN_D:
170 1.1 cgd pirq = 2;
171 1.1 cgd break;
172 1.1 cgd case PCI_INTERRUPT_PIN_B:
173 1.1 cgd pirq = 1;
174 1.1 cgd break;
175 1.1 cgd case PCI_INTERRUPT_PIN_C:
176 1.1 cgd pirq = 0;
177 1.1 cgd break;
178 1.12 cgd #ifdef DIAGNOSTIC
179 1.12 cgd default: /* XXX gcc -Wuninitialized */
180 1.32 provos panic("dec_2100_a50_intr_map bogus PCI pin %d",
181 1.12 cgd buspin);
182 1.12 cgd #endif
183 1.1 cgd };
184 1.1 cgd break;
185 1.12 cgd
186 1.12 cgd default:
187 1.40 matt printf("dec_2100_a50_intr_map: weird device number %d\n",
188 1.12 cgd device);
189 1.40 matt return 1;
190 1.1 cgd }
191 1.1 cgd
192 1.7 cgd pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0),
193 1.7 cgd SIO_PCIREG_PIRQ_RTCTRL);
194 1.1 cgd #if 0
195 1.21 thorpej printf("pci_2100_a50_intr_map: device %d pin %c: pirq %d, reg = %x\n",
196 1.5 cgd device, '@' + buspin, pirq, pirqreg);
197 1.1 cgd #endif
198 1.3 cgd pirqline = (pirqreg >> (pirq * 8)) & 0xff;
199 1.3 cgd if ((pirqline & 0x80) != 0)
200 1.5 cgd return 1;
201 1.3 cgd pirqline &= 0xf;
202 1.1 cgd
203 1.1 cgd #if 0
204 1.21 thorpej printf("pci_2100_a50_intr_map: device %d pin %c: mapped to line %d\n",
205 1.5 cgd device, '@' + buspin, pirqline);
206 1.1 cgd #endif
207 1.1 cgd
208 1.42 thorpej alpha_pci_intr_handle_init(ihp, pirqline, 0);
209 1.5 cgd return (0);
210 1.3 cgd }
211