pci_2100_a50.c revision 1.3
1 /* $NetBSD: pci_2100_a50.c,v 1.3 1995/11/23 02:37:49 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/types.h> 31 #include <sys/param.h> 32 #include <sys/time.h> 33 #include <sys/systm.h> 34 #include <sys/errno.h> 35 #include <sys/device.h> 36 #include <vm/vm.h> 37 38 #include <dev/isa/isavar.h> 39 #include <dev/pci/pcireg.h> 40 #include <dev/pci/pcivar.h> 41 42 #include <alpha/pci/apecsvar.h> 43 44 #include <alpha/pci/pci_2100_a50.h> 45 #include <alpha/pci/siovar.h> 46 47 #include "sio.h" 48 49 void *dec_2100_a50_pci_map_int __P((void *, pci_conftag_t, 50 pci_intr_pin_t, pci_intr_line_t, pci_intrlevel_t, 51 int (*func)(void *), void *)); 52 void dec_2100_a50_pci_unmap_int __P((void *, void *)); 53 54 __const struct pci_intr_fns dec_2100_a50_pci_intr_fns = { 55 dec_2100_a50_pci_map_int, 56 dec_2100_a50_pci_unmap_int, 57 }; 58 59 void * 60 dec_2100_a50_pci_map_int(acv, tag, pin, line, level, func, arg) 61 void *acv; 62 pci_conftag_t tag; 63 pci_intr_pin_t pin; 64 pci_intr_line_t line; 65 pci_intrlevel_t level; 66 int (*func) __P((void *)); 67 void *arg; 68 { 69 struct apecs_config *acp = acv; 70 int bus, device, pirq; 71 pci_confreg_t irreg, pirqreg; 72 u_int8_t pirqline; 73 74 if (pin == 0) { 75 /* No IRQ used. */ 76 return 0; 77 } 78 if (pin > 4) { 79 printf("pci_map_int: bad interrupt pin %d\n", pin); 80 return NULL; 81 } 82 83 device = PCI_TAG_DEVICE(tag); 84 85 switch (device) { 86 case 6: /* NCR SCSI */ 87 pirq = 3; 88 break; 89 90 case 11: /* slot 1 */ 91 switch (pin) { 92 case PCI_INTERRUPT_PIN_A: 93 case PCI_INTERRUPT_PIN_D: 94 pirq = 0; 95 break; 96 case PCI_INTERRUPT_PIN_B: 97 pirq = 2; 98 break; 99 case PCI_INTERRUPT_PIN_C: 100 pirq = 1; 101 break; 102 }; 103 break; 104 105 case 12: /* slot 2 */ 106 switch (pin) { 107 case PCI_INTERRUPT_PIN_A: 108 case PCI_INTERRUPT_PIN_D: 109 pirq = 1; 110 break; 111 case PCI_INTERRUPT_PIN_B: 112 pirq = 0; 113 break; 114 case PCI_INTERRUPT_PIN_C: 115 pirq = 2; 116 break; 117 }; 118 break; 119 120 case 13: /* slot 3 */ 121 switch (pin) { 122 case PCI_INTERRUPT_PIN_A: 123 case PCI_INTERRUPT_PIN_D: 124 pirq = 2; 125 break; 126 case PCI_INTERRUPT_PIN_B: 127 pirq = 1; 128 break; 129 case PCI_INTERRUPT_PIN_C: 130 pirq = 0; 131 break; 132 }; 133 break; 134 } 135 136 pirqreg = PCI_CONF_READ(acp->ac_conffns, acp->ac_confarg, 137 PCI_MAKE_TAG(0, 7, 0), 0x60); /* XXX */ 138 #if 0 139 printf("pci_2100_a50_map_int: device %d pin %c: pirq %d, reg = %x\n", 140 device, '@' + pin, pirq, pirqreg); 141 #endif 142 pirqline = (pirqreg >> (pirq * 8)) & 0xff; 143 if ((pirqline & 0x80) != 0) 144 return 0; /* not routed? */ 145 pirqline &= 0xf; 146 147 #if 0 148 printf("pci_2100_a50_map_int: device %d pin %c: mapped to line %d\n", 149 device, '@' + pin, pirqline); 150 #endif 151 152 #if NSIO 153 return ISA_INTR_ESTABLISH(&sio_isa_intr_fns, NULL, /* XXX */ 154 pirqline, ISA_IST_LEVEL, pci_intrlevel_to_isa(level), 155 func, arg); 156 #else 157 panic("dec_2100_a50_pci_map_int: no sio!"); 158 #endif 159 } 160 161 void 162 dec_2100_a50_pci_unmap_int(pifa, cookie) 163 void *pifa; 164 void *cookie; 165 { 166 167 panic("dec_2100_a50_pci_unmap_int not implemented"); /* XXX */ 168 } 169 170 void 171 pci_2100_a50_pickintr(pcf, pcfa, ppf, ppfa, pifp, pifap) 172 __const struct pci_conf_fns *pcf; 173 __const struct pci_pio_fns *ppf; 174 void *pcfa, *ppfa; 175 __const struct pci_intr_fns **pifp; 176 void **pifap; 177 { 178 pci_confreg_t sioclass; 179 int sioII; 180 181 /* XXX MAGIC NUMBER */ 182 sioclass = PCI_CONF_READ(pcf, pcfa, PCI_MAKE_TAG(0, 7, 0), 183 PCI_CLASS_REG); 184 sioII = (sioclass & 0xff) >= 3; 185 186 if (!sioII) 187 printf("WARNING: SIO NOT SIO II... NO BETS...\n"); 188 189 *pifp = &dec_2100_a50_pci_intr_fns; 190 *pifap = pcfa; /* XXX assumes apecs_config ptr */ 191 #if NSIO 192 sio_intr_setup(ppf, ppfa); 193 set_iointr(&sio_iointr); 194 #else 195 panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)"); 196 #endif 197 } 198
Indexes created Tue Sep 30 07:10:03 GMT 2025