pci_2100_a50.c revision 1.34
1 /* $NetBSD: pci_2100_a50.c,v 1.34 2009/03/14 15:35:59 dsl Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: pci_2100_a50.c,v 1.34 2009/03/14 15:35:59 dsl Exp $"); 33 34 #include <sys/types.h> 35 #include <sys/param.h> 36 #include <sys/time.h> 37 #include <sys/systm.h> 38 #include <sys/errno.h> 39 #include <sys/device.h> 40 41 #include <uvm/uvm_extern.h> 42 43 #include <machine/autoconf.h> 44 #include <machine/bus.h> 45 #include <machine/intr.h> 46 47 #include <dev/isa/isavar.h> 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 51 #include <alpha/pci/apecsvar.h> 52 53 #include <alpha/pci/pci_2100_a50.h> 54 #include <alpha/pci/siovar.h> 55 #include <alpha/pci/sioreg.h> 56 57 #include "sio.h" 58 59 int dec_2100_a50_intr_map(struct pci_attach_args *, pci_intr_handle_t *); 60 const char *dec_2100_a50_intr_string(void *, pci_intr_handle_t); 61 const struct evcnt *dec_2100_a50_intr_evcnt(void *, pci_intr_handle_t); 62 void *dec_2100_a50_intr_establish(void *, pci_intr_handle_t, 63 int, int (*func)(void *), void *); 64 void dec_2100_a50_intr_disestablish(void *, void *); 65 66 #define APECS_SIO_DEVICE 7 /* XXX */ 67 68 void 69 pci_2100_a50_pickintr(struct apecs_config *acp) 70 { 71 bus_space_tag_t iot = &acp->ac_iot; 72 pci_chipset_tag_t pc = &acp->ac_pc; 73 pcireg_t sioclass; 74 int sioII; 75 76 /* XXX MAGIC NUMBER */ 77 sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG); 78 sioII = (sioclass & 0xff) >= 3; 79 80 if (!sioII) 81 printf("WARNING: SIO NOT SIO II... NO BETS...\n"); 82 83 pc->pc_intr_v = acp; 84 pc->pc_intr_map = dec_2100_a50_intr_map; 85 pc->pc_intr_string = dec_2100_a50_intr_string; 86 pc->pc_intr_evcnt = dec_2100_a50_intr_evcnt; 87 pc->pc_intr_establish = dec_2100_a50_intr_establish; 88 pc->pc_intr_disestablish = dec_2100_a50_intr_disestablish; 89 90 /* Not supported on 2100 A50. */ 91 pc->pc_pciide_compat_intr_establish = NULL; 92 93 #if NSIO 94 sio_intr_setup(pc, iot); 95 #else 96 panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)"); 97 #endif 98 } 99 100 int 101 dec_2100_a50_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 102 { 103 pcitag_t bustag = pa->pa_intrtag; 104 int buspin = pa->pa_intrpin; 105 pci_chipset_tag_t pc = pa->pa_pc; 106 int device, pirq; 107 pcireg_t pirqreg; 108 u_int8_t pirqline; 109 110 #ifndef DIAGNOSTIC 111 pirq = 0; /* XXX gcc -Wuninitialized */ 112 #endif 113 114 if (buspin == 0) { 115 /* No IRQ used. */ 116 return 1; 117 } 118 if (buspin > 4) { 119 printf("dec_2100_a50_intr_map: bad interrupt pin %d\n", 120 buspin); 121 return 1; 122 } 123 124 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 125 126 switch (device) { 127 case 6: /* NCR SCSI */ 128 pirq = 3; 129 break; 130 131 case 11: /* slot 1 */ 132 case 14: /* slot 3 */ 133 switch (buspin) { 134 case PCI_INTERRUPT_PIN_A: 135 case PCI_INTERRUPT_PIN_D: 136 pirq = 0; 137 break; 138 case PCI_INTERRUPT_PIN_B: 139 pirq = 2; 140 break; 141 case PCI_INTERRUPT_PIN_C: 142 pirq = 1; 143 break; 144 #ifdef DIAGNOSTIC 145 default: /* XXX gcc -Wuninitialized */ 146 panic("dec_2100_a50_intr_map bogus PCI pin %d", 147 buspin); 148 #endif 149 }; 150 break; 151 152 case 12: /* slot 2 */ 153 switch (buspin) { 154 case PCI_INTERRUPT_PIN_A: 155 case PCI_INTERRUPT_PIN_D: 156 pirq = 1; 157 break; 158 case PCI_INTERRUPT_PIN_B: 159 pirq = 0; 160 break; 161 case PCI_INTERRUPT_PIN_C: 162 pirq = 2; 163 break; 164 #ifdef DIAGNOSTIC 165 default: /* XXX gcc -Wuninitialized */ 166 panic("dec_2100_a50_intr_map bogus PCI pin %d", 167 buspin); 168 #endif 169 }; 170 break; 171 172 case 13: /* slot 3 */ 173 switch (buspin) { 174 case PCI_INTERRUPT_PIN_A: 175 case PCI_INTERRUPT_PIN_D: 176 pirq = 2; 177 break; 178 case PCI_INTERRUPT_PIN_B: 179 pirq = 1; 180 break; 181 case PCI_INTERRUPT_PIN_C: 182 pirq = 0; 183 break; 184 #ifdef DIAGNOSTIC 185 default: /* XXX gcc -Wuninitialized */ 186 panic("dec_2100_a50_intr_map bogus PCI pin %d", 187 buspin); 188 #endif 189 }; 190 break; 191 192 default: 193 printf("dec_2100_a50_intr_map: weird device number %d\n", 194 device); 195 return 1; 196 } 197 198 pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0), 199 SIO_PCIREG_PIRQ_RTCTRL); 200 #if 0 201 printf("pci_2100_a50_intr_map: device %d pin %c: pirq %d, reg = %x\n", 202 device, '@' + buspin, pirq, pirqreg); 203 #endif 204 pirqline = (pirqreg >> (pirq * 8)) & 0xff; 205 if ((pirqline & 0x80) != 0) 206 return 1; 207 pirqline &= 0xf; 208 209 #if 0 210 printf("pci_2100_a50_intr_map: device %d pin %c: mapped to line %d\n", 211 device, '@' + buspin, pirqline); 212 #endif 213 214 *ihp = pirqline; 215 return (0); 216 } 217 218 const char * 219 dec_2100_a50_intr_string(void *acv, pci_intr_handle_t ih) 220 { 221 #if 0 222 struct apecs_config *acp = acv; 223 #endif 224 225 return sio_intr_string(NULL /*XXX*/, ih); 226 } 227 228 const struct evcnt * 229 dec_2100_a50_intr_evcnt(void *acv, pci_intr_handle_t ih) 230 { 231 #if 0 232 struct apecs_config *acp = acv; 233 #endif 234 235 return sio_intr_evcnt(NULL /*XXX*/, ih); 236 } 237 238 void * 239 dec_2100_a50_intr_establish(acv, ih, level, func, arg) 240 void *acv, *arg; 241 pci_intr_handle_t ih; 242 int level; 243 int (*func)(void *); 244 { 245 #if 0 246 struct apecs_config *acp = acv; 247 #endif 248 249 return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func, 250 arg); 251 } 252 253 void 254 dec_2100_a50_intr_disestablish(acv, cookie) 255 void *acv, *cookie; 256 { 257 #if 0 258 struct apecs_config *acp = acv; 259 #endif 260 261 sio_intr_disestablish(NULL /*XXX*/, cookie); 262 } 263
Indexes created Wed Oct 01 19:09:53 GMT 2025