pci_2100_a50.c revision 1.5
1 /* $NetBSD: pci_2100_a50.c,v 1.5 1996/04/12 04:33:06 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/types.h> 31 #include <sys/param.h> 32 #include <sys/time.h> 33 #include <sys/systm.h> 34 #include <sys/errno.h> 35 #include <sys/device.h> 36 #include <vm/vm.h> 37 38 #include <machine/bus.h> 39 #include <machine/intr.h> 40 41 #include <dev/isa/isavar.h> 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 45 #include <alpha/pci/apecsvar.h> 46 47 #include <alpha/pci/pci_2100_a50.h> 48 #include <alpha/pci/siovar.h> 49 50 #include "sio.h" 51 52 int dec_2100_a50_intr_map __P((void *, pcitag_t, int, int, 53 pci_intr_handle_t *)); 54 const char *dec_2100_a50_intr_string __P((void *, pci_intr_handle_t)); 55 void *dec_2100_a50_intr_establish __P((void *, pci_intr_handle_t, 56 int, int (*func)(void *), void *)); 57 void dec_2100_a50_intr_disestablish __P((void *, void *)); 58 59 void 60 pci_2100_a50_pickintr(acp) 61 struct apecs_config *acp; 62 { 63 bus_chipset_tag_t bc = &acp->ac_bc; 64 pci_chipset_tag_t pc = &acp->ac_pc; 65 pcireg_t sioclass; 66 int sioII; 67 68 /* XXX MAGIC NUMBER */ 69 sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG); 70 sioII = (sioclass & 0xff) >= 3; 71 72 if (!sioII) 73 printf("WARNING: SIO NOT SIO II... NO BETS...\n"); 74 75 pc->pc_intr_v = acp; 76 pc->pc_intr_map = dec_2100_a50_intr_map; 77 pc->pc_intr_string = dec_2100_a50_intr_string; 78 pc->pc_intr_establish = dec_2100_a50_intr_establish; 79 pc->pc_intr_disestablish = dec_2100_a50_intr_disestablish; 80 81 #if NSIO 82 sio_intr_setup(bc); 83 set_iointr(&sio_iointr); 84 #else 85 panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)"); 86 #endif 87 } 88 89 int 90 dec_2100_a50_intr_map(acv, bustag, buspin, line, ihp) 91 void *acv; 92 pcitag_t bustag; 93 int buspin, line; 94 pci_intr_handle_t *ihp; 95 { 96 struct apecs_config *acp = acv; 97 pci_chipset_tag_t pc = &acp->ac_pc; 98 int device, pirq; 99 pcireg_t pirqreg; 100 u_int8_t pirqline; 101 102 if (buspin == 0) { 103 /* No IRQ used. */ 104 return 1; 105 } 106 if (buspin > 4) { 107 printf("pci_map_int: bad interrupt pin %d\n", buspin); 108 return 1; 109 } 110 111 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 112 113 switch (device) { 114 case 6: /* NCR SCSI */ 115 pirq = 3; 116 break; 117 118 case 11: /* slot 1 */ 119 case 14: /* slot 3 */ 120 switch (buspin) { 121 case PCI_INTERRUPT_PIN_A: 122 case PCI_INTERRUPT_PIN_D: 123 pirq = 0; 124 break; 125 case PCI_INTERRUPT_PIN_B: 126 pirq = 2; 127 break; 128 case PCI_INTERRUPT_PIN_C: 129 pirq = 1; 130 break; 131 }; 132 break; 133 134 case 12: /* slot 2 */ 135 switch (buspin) { 136 case PCI_INTERRUPT_PIN_A: 137 case PCI_INTERRUPT_PIN_D: 138 pirq = 1; 139 break; 140 case PCI_INTERRUPT_PIN_B: 141 pirq = 0; 142 break; 143 case PCI_INTERRUPT_PIN_C: 144 pirq = 2; 145 break; 146 }; 147 break; 148 149 case 13: /* slot 3 */ 150 switch (buspin) { 151 case PCI_INTERRUPT_PIN_A: 152 case PCI_INTERRUPT_PIN_D: 153 pirq = 2; 154 break; 155 case PCI_INTERRUPT_PIN_B: 156 pirq = 1; 157 break; 158 case PCI_INTERRUPT_PIN_C: 159 pirq = 0; 160 break; 161 }; 162 break; 163 } 164 165 pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), 0x60); /*XXX*/ 166 #if 0 167 printf("pci_2100_a50_map_int: device %d pin %c: pirq %d, reg = %x\n", 168 device, '@' + buspin, pirq, pirqreg); 169 #endif 170 pirqline = (pirqreg >> (pirq * 8)) & 0xff; 171 if ((pirqline & 0x80) != 0) 172 return 1; 173 pirqline &= 0xf; 174 175 #if 0 176 printf("pci_2100_a50_map_int: device %d pin %c: mapped to line %d\n", 177 device, '@' + buspin, pirqline); 178 #endif 179 180 *ihp = pirqline; 181 return (0); 182 } 183 184 const char * 185 dec_2100_a50_intr_string(acv, ih) 186 void *acv; 187 pci_intr_handle_t ih; 188 { 189 struct apecs_config *acp = acv; 190 191 return sio_intr_string(NULL /*XXX*/, ih); 192 } 193 194 void * 195 dec_2100_a50_intr_establish(acv, ih, level, func, arg) 196 void *acv, *arg; 197 pci_intr_handle_t ih; 198 int level; 199 int (*func) __P((void *)); 200 { 201 struct apecs_config *acp = acv; 202 203 return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func, 204 arg); 205 } 206 207 void 208 dec_2100_a50_intr_disestablish(acv, cookie) 209 void *acv, *cookie; 210 { 211 struct apecs_config *acp = acv; 212 213 sio_intr_disestablish(NULL /*XXX*/, cookie); 214 } 215
Indexes created Tue Sep 30 17:09:57 GMT 2025