pci_2100_a50.c revision 1.7
1 /* $NetBSD: pci_2100_a50.c,v 1.7 1996/04/23 14:15:55 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/types.h> 31 #include <sys/param.h> 32 #include <sys/time.h> 33 #include <sys/systm.h> 34 #include <sys/errno.h> 35 #include <sys/device.h> 36 #include <vm/vm.h> 37 38 #include <machine/bus.h> 39 #include <machine/intr.h> 40 41 #include <dev/isa/isavar.h> 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 45 #include <alpha/pci/apecsvar.h> 46 47 #include <alpha/pci/pci_2100_a50.h> 48 #include <alpha/pci/siovar.h> 49 #include <alpha/pci/sioreg.h> 50 51 #include "sio.h" 52 53 int dec_2100_a50_intr_map __P((void *, pcitag_t, int, int, 54 pci_intr_handle_t *)); 55 const char *dec_2100_a50_intr_string __P((void *, pci_intr_handle_t)); 56 void *dec_2100_a50_intr_establish __P((void *, pci_intr_handle_t, 57 int, int (*func)(void *), void *)); 58 void dec_2100_a50_intr_disestablish __P((void *, void *)); 59 60 #define APECS_SIO_DEVICE 7 /* XXX */ 61 62 void 63 pci_2100_a50_pickintr(acp) 64 struct apecs_config *acp; 65 { 66 bus_chipset_tag_t bc = &acp->ac_bc; 67 pci_chipset_tag_t pc = &acp->ac_pc; 68 pcireg_t sioclass; 69 int sioII; 70 71 /* XXX MAGIC NUMBER */ 72 sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG); 73 sioII = (sioclass & 0xff) >= 3; 74 75 if (!sioII) 76 printf("WARNING: SIO NOT SIO II... NO BETS...\n"); 77 78 pc->pc_intr_v = acp; 79 pc->pc_intr_map = dec_2100_a50_intr_map; 80 pc->pc_intr_string = dec_2100_a50_intr_string; 81 pc->pc_intr_establish = dec_2100_a50_intr_establish; 82 pc->pc_intr_disestablish = dec_2100_a50_intr_disestablish; 83 84 #if NSIO 85 sio_intr_setup(bc); 86 set_iointr(&sio_iointr); 87 #else 88 panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)"); 89 #endif 90 } 91 92 int 93 dec_2100_a50_intr_map(acv, bustag, buspin, line, ihp) 94 void *acv; 95 pcitag_t bustag; 96 int buspin, line; 97 pci_intr_handle_t *ihp; 98 { 99 struct apecs_config *acp = acv; 100 pci_chipset_tag_t pc = &acp->ac_pc; 101 int device, pirq; 102 pcireg_t pirqreg; 103 u_int8_t pirqline; 104 105 if (buspin == 0) { 106 /* No IRQ used. */ 107 return 1; 108 } 109 if (buspin > 4) { 110 printf("pci_map_int: bad interrupt pin %d\n", buspin); 111 return 1; 112 } 113 114 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 115 116 switch (device) { 117 case 6: /* NCR SCSI */ 118 pirq = 3; 119 break; 120 121 case 11: /* slot 1 */ 122 case 14: /* slot 3 */ 123 switch (buspin) { 124 case PCI_INTERRUPT_PIN_A: 125 case PCI_INTERRUPT_PIN_D: 126 pirq = 0; 127 break; 128 case PCI_INTERRUPT_PIN_B: 129 pirq = 2; 130 break; 131 case PCI_INTERRUPT_PIN_C: 132 pirq = 1; 133 break; 134 }; 135 break; 136 137 case 12: /* slot 2 */ 138 switch (buspin) { 139 case PCI_INTERRUPT_PIN_A: 140 case PCI_INTERRUPT_PIN_D: 141 pirq = 1; 142 break; 143 case PCI_INTERRUPT_PIN_B: 144 pirq = 0; 145 break; 146 case PCI_INTERRUPT_PIN_C: 147 pirq = 2; 148 break; 149 }; 150 break; 151 152 case 13: /* slot 3 */ 153 switch (buspin) { 154 case PCI_INTERRUPT_PIN_A: 155 case PCI_INTERRUPT_PIN_D: 156 pirq = 2; 157 break; 158 case PCI_INTERRUPT_PIN_B: 159 pirq = 1; 160 break; 161 case PCI_INTERRUPT_PIN_C: 162 pirq = 0; 163 break; 164 }; 165 break; 166 } 167 168 pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0), 169 SIO_PCIREG_PIRQ_RTCTRL); 170 #if 0 171 printf("pci_2100_a50_map_int: device %d pin %c: pirq %d, reg = %x\n", 172 device, '@' + buspin, pirq, pirqreg); 173 #endif 174 pirqline = (pirqreg >> (pirq * 8)) & 0xff; 175 if ((pirqline & 0x80) != 0) 176 return 1; 177 pirqline &= 0xf; 178 179 #if 0 180 printf("pci_2100_a50_map_int: device %d pin %c: mapped to line %d\n", 181 device, '@' + buspin, pirqline); 182 #endif 183 184 *ihp = pirqline; 185 return (0); 186 } 187 188 const char * 189 dec_2100_a50_intr_string(acv, ih) 190 void *acv; 191 pci_intr_handle_t ih; 192 { 193 struct apecs_config *acp = acv; 194 195 return sio_intr_string(NULL /*XXX*/, ih); 196 } 197 198 void * 199 dec_2100_a50_intr_establish(acv, ih, level, func, arg) 200 void *acv, *arg; 201 pci_intr_handle_t ih; 202 int level; 203 int (*func) __P((void *)); 204 { 205 struct apecs_config *acp = acv; 206 207 return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func, 208 arg); 209 } 210 211 void 212 dec_2100_a50_intr_disestablish(acv, cookie) 213 void *acv, *cookie; 214 { 215 struct apecs_config *acp = acv; 216 217 sio_intr_disestablish(NULL /*XXX*/, cookie); 218 } 219
Indexes created Tue Sep 30 06:09:59 GMT 2025