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pci_6600.c revision 1.1 
      1 /* $NetBSD: pci_6600.c,v 1.1 1999/06/29 06:46:46 ross Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Ross Harvey.
     17  * 4. The name of Ross Harvey may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
     21  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     22  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
     23  * ARE DISCLAIMED.  IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
     24  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     30  * SUCH DAMAGE.
     31  *
     32  */
     33 
     34 #include <sys/cdefs.h>
     35 
     36 __KERNEL_RCSID(0, "$NetBSD: pci_6600.c,v 1.1 1999/06/29 06:46:46 ross Exp $");
     37 
     38 #include <sys/param.h>
     39 #include <sys/systm.h>
     40 #include <sys/kernel.h>
     41 #include <sys/device.h>
     42 #include <sys/malloc.h>
     43 #include <vm/vm.h>
     44 
     45 #include <machine/autoconf.h>
     46 #define _ALPHA_BUS_DMA_PRIVATE
     47 #include <machine/bus.h>
     48 #include <machine/rpb.h>
     49 #include <machine/intrcnt.h>
     50 #include <machine/alpha.h>
     51 
     52 #include <dev/pci/pcireg.h>
     53 #include <dev/pci/pcivar.h>
     54 #include <dev/pci/pciidereg.h>
     55 #include <dev/pci/pciidevar.h>
     56 
     57 #include <alpha/pci/tsreg.h>
     58 #include <alpha/pci/tsvar.h>
     59 #include <alpha/pci/pci_6600.h>
     60 
     61 #define pci_6600() { Generate ctags(1) key. }
     62 
     63 #include "sio.h"
     64 #if NSIO
     65 #include <alpha/pci/siovar.h>
     66 #endif
     67 
     68 #define	PCI_STRAY_MAX		5
     69 #define	DEC_6600_MAX_IRQ	INTRCNT_OTHER_LEN
     70 
     71 static char *irqtype = "6600 irq";
     72 static struct tsp_config *sioprimary;
     73 
     74 static void checkmaxirq __P((pci_intr_handle_t ih));
     75 void dec_6600_intr_disestablish __P((void *, void *));
     76 void *dec_6600_intr_establish __P((
     77     void *, pci_intr_handle_t, int, int (*func)(void *), void *));
     78 const char *dec_6600_intr_string __P((void *, pci_intr_handle_t));
     79 int dec_6600_intr_map __P((void *, pcitag_t, int, int, pci_intr_handle_t *));
     80 void *dec_6600_pciide_compat_intr_establish __P((void *, struct device *,
     81     struct pci_attach_args *, int, int (*)(void *), void *));
     82 
     83 struct alpha_shared_intr *dec_6600_pci_intr;
     84 
     85 void dec_6600_iointr __P((void *framep, unsigned long vec));
     86 extern void dec_6600_intr_enable __P((int irq));
     87 extern void dec_6600_intr_disable __P((int irq));
     88 
     89 void
     90 pci_6600_pickintr(pcp)
     91 	struct tsp_config *pcp;
     92 {
     93 	bus_space_tag_t iot = &pcp->pc_iot;
     94 	pci_chipset_tag_t pc = &pcp->pc_pc;
     95 	int i;
     96 
     97         pc->pc_intr_v = pcp;
     98         pc->pc_intr_map = dec_6600_intr_map;
     99         pc->pc_intr_string = dec_6600_intr_string;
    100         pc->pc_intr_establish = dec_6600_intr_establish;
    101         pc->pc_intr_disestablish = dec_6600_intr_disestablish;
    102 	pc->pc_pciide_compat_intr_establish = NULL;
    103 
    104 	/*
    105 	 * System-wide and Pchip-0-only logic...
    106 	 */
    107 	if (dec_6600_pci_intr == NULL) {
    108 		sioprimary = pcp;
    109 		pc->pc_pciide_compat_intr_establish =
    110 		    dec_6600_pciide_compat_intr_establish;
    111 		dec_6600_pci_intr = alpha_shared_intr_alloc(DEC_6600_MAX_IRQ);
    112 		for (i = 0; i < DEC_6600_MAX_IRQ; i++)
    113 			alpha_shared_intr_set_maxstrays(dec_6600_pci_intr, i,
    114 			    PCI_STRAY_MAX);
    115 #if NSIO
    116 		sio_intr_setup(pc, iot);
    117 		dec_6600_intr_enable(55);	/* irq line for sio */
    118 #endif
    119 		set_iointr(dec_6600_iointr);
    120 	}
    121 }
    122 
    123 int
    124 dec_6600_intr_map(acv, bustag, buspin, line, ihp)
    125         void *acv;
    126         pcitag_t bustag;
    127         int buspin, line;
    128         pci_intr_handle_t *ihp;
    129 {
    130 	struct tsp_config *pcp = acv;
    131 	pci_chipset_tag_t pc = &pcp->pc_pc;
    132 	int bus, device, function;
    133 
    134 	if (buspin == 0) {
    135 		/* No IRQ used. */
    136 		return 1;
    137 	}
    138 	if (buspin > 4) {
    139 		printf("intr_map: bad interrupt pin %d\n", buspin);
    140 		return 1;
    141 	}
    142 
    143 	/*
    144 	 * The console places the interrupt mapping in the "line" value.
    145 	 * A value of (char)-1 indicates there is no mapping.
    146 	 */
    147 	if (line >= 64) {	/* for usb host bridge, line == 0xea (?!) */
    148 		alpha_pci_decompose_tag(pc, bustag, &bus, &device, &function);
    149 		printf("intr_map: line=0x%x, no mapping for %d/%d/%d\n",
    150 		    line, bus, device, function);
    151 		return (1);
    152 	}
    153 
    154 	if (line >= INTRCNT_OTHER_LEN)
    155 		panic("intr_map: irq too large (%d)\n", line);
    156 
    157 	*ihp = line;
    158 	checkmaxirq(*ihp);
    159 	return (0);
    160 }
    161 
    162 static void
    163 checkmaxirq(ih)
    164 	pci_intr_handle_t ih;
    165 {
    166 	if (ih  > DEC_6600_MAX_IRQ)
    167 		panic("extreme irq %ld\n", ih);
    168 }
    169 
    170 const char *
    171 dec_6600_intr_string(acv, ih)
    172 	void *acv;
    173 	pci_intr_handle_t ih;
    174 {
    175 
    176 	static const char irqfmt[] = "dec_6600 irq %ld";
    177         static char irqstr[sizeof irqfmt];
    178 
    179 	checkmaxirq(ih);
    180         snprintf(irqstr, sizeof irqstr, irqfmt, ih);
    181         return (irqstr);
    182 }
    183 
    184 void *
    185 dec_6600_intr_establish(acv, ih, level, func, arg)
    186         void *acv, *arg;
    187         pci_intr_handle_t ih;
    188         int level;
    189         int (*func) __P((void *));
    190 {
    191 	void *cookie;
    192 
    193 	checkmaxirq(ih);
    194 	cookie = alpha_shared_intr_establish(dec_6600_pci_intr, ih, IST_LEVEL,
    195 	    level, func, arg, irqtype);
    196 
    197 	if (cookie != NULL && alpha_shared_intr_isactive(dec_6600_pci_intr, ih))
    198 		dec_6600_intr_enable(ih);
    199 	return (cookie);
    200 }
    201 
    202 void
    203 dec_6600_intr_disestablish(acv, cookie)
    204         void *acv, *cookie;
    205 {
    206 	struct alpha_shared_intrhand *ih = cookie;
    207 	unsigned int irq = ih->ih_num;
    208 	int s;
    209 
    210 	s = splhigh();
    211 
    212 	alpha_shared_intr_disestablish(dec_6600_pci_intr, cookie, irqtype);
    213 	if (alpha_shared_intr_isactive(dec_6600_pci_intr, irq) == 0) {
    214 		dec_6600_intr_disable(irq);
    215 		alpha_shared_intr_set_dfltsharetype(dec_6600_pci_intr, irq,
    216 		    IST_NONE);
    217 	}
    218 
    219 	splx(s);
    220 }
    221 
    222 void
    223 dec_6600_iointr(framep, vec)
    224 	void *framep;
    225 	unsigned long vec;
    226 {
    227 	int irq;
    228 
    229 	if (vec >= 0x900) {
    230 		irq = (vec - 0x900) >> 4;
    231 
    232 		if(irq >= INTRCNT_OTHER_LEN)
    233 			panic("iointr: irq %d is too high", irq);
    234 		++intrcnt[INTRCNT_OTHER_BASE + irq];
    235 
    236 		if (!alpha_shared_intr_dispatch(dec_6600_pci_intr, irq)) {
    237 			alpha_shared_intr_stray(dec_6600_pci_intr, irq,
    238 			    irqtype);
    239 			if (ALPHA_SHARED_INTR_DISABLE(dec_6600_pci_intr, irq))
    240 				dec_6600_intr_disable(irq);
    241 		}
    242 		return;
    243 	}
    244 #if NSIO
    245 	if (vec >= 0x800) {
    246 		sio_iointr(framep, vec);
    247 		return;
    248 	}
    249 #endif
    250 	panic("iointr: weird vec 0x%lx\n", vec);
    251 }
    252 
    253 void
    254 dec_6600_intr_enable(irq)
    255 	int irq;
    256 {
    257 	alpha_mb();
    258 	STQP(TS_C_DIM0) |= 1UL << irq;
    259 	alpha_mb();
    260 }
    261 
    262 void
    263 dec_6600_intr_disable(irq)
    264 	int irq;
    265 {
    266 	alpha_mb();
    267 	STQP(TS_C_DIM0) &= ~(1UL << irq);
    268 	alpha_mb();
    269 }
    270 
    271 void *
    272 dec_6600_pciide_compat_intr_establish(v, dev, pa, chan, func, arg)
    273 	void *v;
    274 	struct device *dev;
    275 	struct pci_attach_args *pa;
    276 	int chan;
    277 	int (*func) __P((void *));
    278 	void *arg;
    279 {
    280 	pci_chipset_tag_t pc = pa->pa_pc;
    281 	void *cookie = NULL;
    282 	int bus, irq;
    283 
    284 	alpha_pci_decompose_tag(pc, pa->pa_tag, &bus, NULL, NULL);
    285 
    286 	if (bus != 0 || pc->pc_intr_v != sioprimary)
    287 		printf("Warning: strange pciide\n");
    288 
    289 	irq = PCIIDE_COMPAT_IRQ(chan);
    290 #if NSIO
    291 	cookie = sio_intr_establish(NULL /*XXX*/, irq, IST_EDGE, IPL_BIO,
    292 	    func, arg);
    293 #endif
    294 	return (cookie);
    295 }
    296