pci_bwx_bus_mem_chipdep.c revision 1.14
1 /* $NetBSD: pci_bwx_bus_mem_chipdep.c,v 1.14 2000/11/29 06:21:12 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 /* 68 * Common PCI Chipset "bus I/O" functions, for chipsets which have to 69 * deal with only a single PCI interface chip in a machine. 70 * 71 * uses: 72 * CHIP name of the 'chip' it's being compiled for. 73 * CHIP_MEM_BASE Mem space base to use. 74 * CHIP_MEM_EX_STORE 75 * If defined, device-provided static storage area 76 * for the memory space extent. If this is 77 * defined, CHIP_MEM_EX_STORE_SIZE must also be 78 * defined. If this is not defined, a static area 79 * will be declared. 80 * CHIP_MEM_EX_STORE_SIZE 81 * Size of the device-provided static storage area 82 * for the memory space extent. 83 */ 84 85 #include <sys/extent.h> 86 87 #include <machine/bwx.h> 88 89 #define __C(A,B) __CONCAT(A,B) 90 #define __S(S) __STRING(S) 91 92 /* mapping/unmapping */ 93 int __C(CHIP,_mem_map) __P((void *, bus_addr_t, bus_size_t, int, 94 bus_space_handle_t *, int)); 95 void __C(CHIP,_mem_unmap) __P((void *, bus_space_handle_t, 96 bus_size_t, int)); 97 int __C(CHIP,_mem_subregion) __P((void *, bus_space_handle_t, 98 bus_size_t, bus_size_t, bus_space_handle_t *)); 99 100 int __C(CHIP,_mem_translate) __P((void *, bus_addr_t, bus_size_t, 101 int, struct alpha_bus_space_translation *)); 102 int __C(CHIP,_mem_get_window) __P((void *, int, 103 struct alpha_bus_space_translation *)); 104 105 /* allocation/deallocation */ 106 int __C(CHIP,_mem_alloc) __P((void *, bus_addr_t, bus_addr_t, 107 bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *, 108 bus_space_handle_t *)); 109 void __C(CHIP,_mem_free) __P((void *, bus_space_handle_t, 110 bus_size_t)); 111 112 /* get kernel virtual address */ 113 void * __C(CHIP,_mem_vaddr) __P((void *, bus_space_handle_t)); 114 115 /* barrier */ 116 inline void __C(CHIP,_mem_barrier) __P((void *, bus_space_handle_t, 117 bus_size_t, bus_size_t, int)); 118 119 /* read (single) */ 120 inline u_int8_t __C(CHIP,_mem_read_1) __P((void *, bus_space_handle_t, 121 bus_size_t)); 122 inline u_int16_t __C(CHIP,_mem_read_2) __P((void *, bus_space_handle_t, 123 bus_size_t)); 124 inline u_int32_t __C(CHIP,_mem_read_4) __P((void *, bus_space_handle_t, 125 bus_size_t)); 126 inline u_int64_t __C(CHIP,_mem_read_8) __P((void *, bus_space_handle_t, 127 bus_size_t)); 128 129 /* read multiple */ 130 void __C(CHIP,_mem_read_multi_1) __P((void *, bus_space_handle_t, 131 bus_size_t, u_int8_t *, bus_size_t)); 132 void __C(CHIP,_mem_read_multi_2) __P((void *, bus_space_handle_t, 133 bus_size_t, u_int16_t *, bus_size_t)); 134 void __C(CHIP,_mem_read_multi_4) __P((void *, bus_space_handle_t, 135 bus_size_t, u_int32_t *, bus_size_t)); 136 void __C(CHIP,_mem_read_multi_8) __P((void *, bus_space_handle_t, 137 bus_size_t, u_int64_t *, bus_size_t)); 138 139 /* read region */ 140 void __C(CHIP,_mem_read_region_1) __P((void *, bus_space_handle_t, 141 bus_size_t, u_int8_t *, bus_size_t)); 142 void __C(CHIP,_mem_read_region_2) __P((void *, bus_space_handle_t, 143 bus_size_t, u_int16_t *, bus_size_t)); 144 void __C(CHIP,_mem_read_region_4) __P((void *, bus_space_handle_t, 145 bus_size_t, u_int32_t *, bus_size_t)); 146 void __C(CHIP,_mem_read_region_8) __P((void *, bus_space_handle_t, 147 bus_size_t, u_int64_t *, bus_size_t)); 148 149 /* write (single) */ 150 inline void __C(CHIP,_mem_write_1) __P((void *, bus_space_handle_t, 151 bus_size_t, u_int8_t)); 152 inline void __C(CHIP,_mem_write_2) __P((void *, bus_space_handle_t, 153 bus_size_t, u_int16_t)); 154 inline void __C(CHIP,_mem_write_4) __P((void *, bus_space_handle_t, 155 bus_size_t, u_int32_t)); 156 inline void __C(CHIP,_mem_write_8) __P((void *, bus_space_handle_t, 157 bus_size_t, u_int64_t)); 158 159 /* write multiple */ 160 void __C(CHIP,_mem_write_multi_1) __P((void *, bus_space_handle_t, 161 bus_size_t, const u_int8_t *, bus_size_t)); 162 void __C(CHIP,_mem_write_multi_2) __P((void *, bus_space_handle_t, 163 bus_size_t, const u_int16_t *, bus_size_t)); 164 void __C(CHIP,_mem_write_multi_4) __P((void *, bus_space_handle_t, 165 bus_size_t, const u_int32_t *, bus_size_t)); 166 void __C(CHIP,_mem_write_multi_8) __P((void *, bus_space_handle_t, 167 bus_size_t, const u_int64_t *, bus_size_t)); 168 169 /* write region */ 170 void __C(CHIP,_mem_write_region_1) __P((void *, bus_space_handle_t, 171 bus_size_t, const u_int8_t *, bus_size_t)); 172 void __C(CHIP,_mem_write_region_2) __P((void *, bus_space_handle_t, 173 bus_size_t, const u_int16_t *, bus_size_t)); 174 void __C(CHIP,_mem_write_region_4) __P((void *, bus_space_handle_t, 175 bus_size_t, const u_int32_t *, bus_size_t)); 176 void __C(CHIP,_mem_write_region_8) __P((void *, bus_space_handle_t, 177 bus_size_t, const u_int64_t *, bus_size_t)); 178 179 /* set multiple */ 180 void __C(CHIP,_mem_set_multi_1) __P((void *, bus_space_handle_t, 181 bus_size_t, u_int8_t, bus_size_t)); 182 void __C(CHIP,_mem_set_multi_2) __P((void *, bus_space_handle_t, 183 bus_size_t, u_int16_t, bus_size_t)); 184 void __C(CHIP,_mem_set_multi_4) __P((void *, bus_space_handle_t, 185 bus_size_t, u_int32_t, bus_size_t)); 186 void __C(CHIP,_mem_set_multi_8) __P((void *, bus_space_handle_t, 187 bus_size_t, u_int64_t, bus_size_t)); 188 189 /* set region */ 190 void __C(CHIP,_mem_set_region_1) __P((void *, bus_space_handle_t, 191 bus_size_t, u_int8_t, bus_size_t)); 192 void __C(CHIP,_mem_set_region_2) __P((void *, bus_space_handle_t, 193 bus_size_t, u_int16_t, bus_size_t)); 194 void __C(CHIP,_mem_set_region_4) __P((void *, bus_space_handle_t, 195 bus_size_t, u_int32_t, bus_size_t)); 196 void __C(CHIP,_mem_set_region_8) __P((void *, bus_space_handle_t, 197 bus_size_t, u_int64_t, bus_size_t)); 198 199 /* copy */ 200 void __C(CHIP,_mem_copy_region_1) __P((void *, bus_space_handle_t, 201 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 202 void __C(CHIP,_mem_copy_region_2) __P((void *, bus_space_handle_t, 203 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 204 void __C(CHIP,_mem_copy_region_4) __P((void *, bus_space_handle_t, 205 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 206 void __C(CHIP,_mem_copy_region_8) __P((void *, bus_space_handle_t, 207 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 208 209 #ifndef CHIP_MEM_EX_STORE 210 static long 211 __C(CHIP,_mem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 212 #define CHIP_MEM_EX_STORE(v) (__C(CHIP,_mem_ex_storage)) 213 #define CHIP_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_mem_ex_storage)) 214 #endif 215 216 void 217 __C(CHIP,_bus_mem_init)(t, v) 218 bus_space_tag_t t; 219 void *v; 220 { 221 struct extent *ex; 222 223 /* 224 * Initialize the bus space tag. 225 */ 226 227 /* cookie */ 228 t->abs_cookie = v; 229 230 /* mapping/unmapping */ 231 t->abs_map = __C(CHIP,_mem_map); 232 t->abs_unmap = __C(CHIP,_mem_unmap); 233 t->abs_subregion = __C(CHIP,_mem_subregion); 234 235 t->abs_translate = __C(CHIP,_mem_translate); 236 t->abs_get_window = __C(CHIP,_mem_get_window); 237 238 /* allocation/deallocation */ 239 t->abs_alloc = __C(CHIP,_mem_alloc); 240 t->abs_free = __C(CHIP,_mem_free); 241 242 /* get kernel virtual address */ 243 t->abs_vaddr = __C(CHIP,_mem_vaddr); 244 245 /* barrier */ 246 t->abs_barrier = __C(CHIP,_mem_barrier); 247 248 /* read (single) */ 249 t->abs_r_1 = __C(CHIP,_mem_read_1); 250 t->abs_r_2 = __C(CHIP,_mem_read_2); 251 t->abs_r_4 = __C(CHIP,_mem_read_4); 252 t->abs_r_8 = __C(CHIP,_mem_read_8); 253 254 /* read multiple */ 255 t->abs_rm_1 = __C(CHIP,_mem_read_multi_1); 256 t->abs_rm_2 = __C(CHIP,_mem_read_multi_2); 257 t->abs_rm_4 = __C(CHIP,_mem_read_multi_4); 258 t->abs_rm_8 = __C(CHIP,_mem_read_multi_8); 259 260 /* read region */ 261 t->abs_rr_1 = __C(CHIP,_mem_read_region_1); 262 t->abs_rr_2 = __C(CHIP,_mem_read_region_2); 263 t->abs_rr_4 = __C(CHIP,_mem_read_region_4); 264 t->abs_rr_8 = __C(CHIP,_mem_read_region_8); 265 266 /* write (single) */ 267 t->abs_w_1 = __C(CHIP,_mem_write_1); 268 t->abs_w_2 = __C(CHIP,_mem_write_2); 269 t->abs_w_4 = __C(CHIP,_mem_write_4); 270 t->abs_w_8 = __C(CHIP,_mem_write_8); 271 272 /* write multiple */ 273 t->abs_wm_1 = __C(CHIP,_mem_write_multi_1); 274 t->abs_wm_2 = __C(CHIP,_mem_write_multi_2); 275 t->abs_wm_4 = __C(CHIP,_mem_write_multi_4); 276 t->abs_wm_8 = __C(CHIP,_mem_write_multi_8); 277 278 /* write region */ 279 t->abs_wr_1 = __C(CHIP,_mem_write_region_1); 280 t->abs_wr_2 = __C(CHIP,_mem_write_region_2); 281 t->abs_wr_4 = __C(CHIP,_mem_write_region_4); 282 t->abs_wr_8 = __C(CHIP,_mem_write_region_8); 283 284 /* set multiple */ 285 t->abs_sm_1 = __C(CHIP,_mem_set_multi_1); 286 t->abs_sm_2 = __C(CHIP,_mem_set_multi_2); 287 t->abs_sm_4 = __C(CHIP,_mem_set_multi_4); 288 t->abs_sm_8 = __C(CHIP,_mem_set_multi_8); 289 290 /* set region */ 291 t->abs_sr_1 = __C(CHIP,_mem_set_region_1); 292 t->abs_sr_2 = __C(CHIP,_mem_set_region_2); 293 t->abs_sr_4 = __C(CHIP,_mem_set_region_4); 294 t->abs_sr_8 = __C(CHIP,_mem_set_region_8); 295 296 /* copy */ 297 t->abs_c_1 = __C(CHIP,_mem_copy_region_1); 298 t->abs_c_2 = __C(CHIP,_mem_copy_region_2); 299 t->abs_c_4 = __C(CHIP,_mem_copy_region_4); 300 t->abs_c_8 = __C(CHIP,_mem_copy_region_8); 301 302 ex = extent_create(__S(__C(CHIP,_bus_mem)), 0x0UL, 0xffffffffUL, 303 M_DEVBUF, (caddr_t)CHIP_MEM_EX_STORE(v), CHIP_MEM_EX_STORE_SIZE(v), 304 EX_NOWAIT|EX_NOCOALESCE); 305 306 CHIP_MEM_EXTENT(v) = ex; 307 } 308 309 int 310 __C(CHIP,_mem_translate)(v, memaddr, memlen, flags, abst) 311 void *v; 312 bus_addr_t memaddr; 313 bus_size_t memlen; 314 int flags; 315 struct alpha_bus_space_translation *abst; 316 { 317 318 /* XXX */ 319 return (EOPNOTSUPP); 320 } 321 322 int 323 __C(CHIP,_mem_get_window)(v, window, abst) 324 void *v; 325 int window; 326 struct alpha_bus_space_translation *abst; 327 { 328 329 switch (window) { 330 case 0: 331 abst->abst_bus_start = 0; 332 abst->abst_bus_end = 0xffffffffUL; 333 abst->abst_sys_start = CHIP_MEM_SYS_START(v); 334 abst->abst_sys_end = CHIP_MEM_SYS_START(v) + abst->abst_bus_end; 335 abst->abst_addr_shift = 0; 336 abst->abst_size_shift = 0; 337 abst->abst_flags = ABST_DENSE|ABST_BWX; 338 break; 339 340 default: 341 panic(__S(__C(CHIP,_mem_get_window)) ": invalid window %d", 342 window); 343 } 344 345 return (0); 346 } 347 348 int 349 __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct) 350 void *v; 351 bus_addr_t memaddr; 352 bus_size_t memsize; 353 int flags; 354 bus_space_handle_t *memhp; 355 int acct; 356 { 357 int prefetchable = flags & BUS_SPACE_MAP_PREFETCHABLE; 358 int linear = flags & BUS_SPACE_MAP_LINEAR; 359 int error; 360 361 /* Requests for linear unprefetchable space can't be satisfied. */ 362 if (linear && !prefetchable) 363 return (EOPNOTSUPP); 364 365 if (acct == 0) 366 goto mapit; 367 368 #ifdef EXTENT_DEBUG 369 printf("mem: allocating 0x%lx to 0x%lx\n", memaddr, 370 memaddr + memsize - 1); 371 #endif 372 error = extent_alloc_region(CHIP_MEM_EXTENT(v), memaddr, memsize, 373 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 374 if (error) { 375 #ifdef EXTENT_DEBUG 376 printf("mem: allocation failed (%d)\n", error); 377 extent_print(CHIP_MEM_EXTENT(v)); 378 #endif 379 return (error); 380 } 381 382 mapit: 383 *memhp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr; 384 385 return (0); 386 } 387 388 void 389 __C(CHIP,_mem_unmap)(v, memh, memsize, acct) 390 void *v; 391 bus_space_handle_t memh; 392 bus_size_t memsize; 393 int acct; 394 { 395 bus_addr_t memaddr; 396 int error; 397 398 if (acct == 0) 399 return; 400 401 #ifdef EXTENT_DEBUG 402 printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize); 403 #endif 404 405 memaddr = memh - ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)); 406 407 #ifdef EXTENT_DEBUG 408 printf("mem: freeing 0x%lx to 0x%lx\n", memaddr, memaddr + memsize - 1); 409 #endif 410 411 error = extent_free(CHIP_MEM_EXTENT(v), memaddr, memsize, 412 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 413 if (error) { 414 printf("%s: WARNING: could not unmap 0x%lx-0x%lx (error %d)\n", 415 __S(__C(CHIP,_mem_unmap)), memaddr, memaddr + memsize - 1, 416 error); 417 #ifdef EXTENT_DEBUG 418 extent_print(CHIP_MEM_EXTENT(v)); 419 #endif 420 } 421 } 422 423 int 424 __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh) 425 void *v; 426 bus_space_handle_t memh, *nmemh; 427 bus_size_t offset, size; 428 { 429 430 *nmemh = memh + offset; 431 return (0); 432 } 433 434 int 435 __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags, 436 addrp, bshp) 437 void *v; 438 bus_addr_t rstart, rend, *addrp; 439 bus_size_t size, align, boundary; 440 int flags; 441 bus_space_handle_t *bshp; 442 { 443 int prefetchable = flags & BUS_SPACE_MAP_PREFETCHABLE; 444 int linear = flags & BUS_SPACE_MAP_LINEAR; 445 bus_addr_t memaddr; 446 int error; 447 448 /* Requests for linear unprefetchable space can't be satisfied. */ 449 if (linear && !prefetchable) 450 return (EOPNOTSUPP); 451 452 /* 453 * Do the requested allocation. 454 */ 455 #ifdef EXTENT_DEBUG 456 printf("mem: allocating from 0x%lx to 0x%lx\n", rstart, rend); 457 #endif 458 error = extent_alloc_subregion(CHIP_MEM_EXTENT(v), rstart, rend, 459 size, align, boundary, 460 EX_FAST | EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0), 461 &memaddr); 462 if (error) { 463 #ifdef EXTENT_DEBUG 464 printf("mem: allocation failed (%d)\n", error); 465 extent_print(CHIP_MEM_EXTENT(v)); 466 #endif 467 } 468 469 #ifdef EXTENT_DEBUG 470 printf("mem: allocated 0x%lx to 0x%lx\n", memaddr, memaddr + size - 1); 471 #endif 472 473 *addrp = memaddr; 474 *bshp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr; 475 476 return (0); 477 } 478 479 void 480 __C(CHIP,_mem_free)(v, bsh, size) 481 void *v; 482 bus_space_handle_t bsh; 483 bus_size_t size; 484 { 485 486 /* Unmap does all we need to do. */ 487 __C(CHIP,_mem_unmap)(v, bsh, size, 1); 488 } 489 490 void * 491 __C(CHIP,_mem_vaddr)(v, bsh) 492 void *v; 493 bus_space_handle_t bsh; 494 { 495 /* 496 * We get linear access only with BUS_SPACE_MAP_PREFETCHABLE, 497 * so it should be OK if the caller doesn't use BWX instructions. 498 */ 499 return ((void *)bsh); 500 } 501 502 inline void 503 __C(CHIP,_mem_barrier)(v, h, o, l, f) 504 void *v; 505 bus_space_handle_t h; 506 bus_size_t o, l; 507 int f; 508 { 509 510 if ((f & BUS_SPACE_BARRIER_READ) != 0) 511 alpha_mb(); 512 else if ((f & BUS_SPACE_BARRIER_WRITE) != 0) 513 alpha_wmb(); 514 } 515 516 inline u_int8_t 517 __C(CHIP,_mem_read_1)(v, memh, off) 518 void *v; 519 bus_space_handle_t memh; 520 bus_size_t off; 521 { 522 bus_addr_t addr; 523 524 addr = memh + off; 525 alpha_mb(); 526 return (alpha_ldbu((u_int8_t *)addr)); 527 } 528 529 inline u_int16_t 530 __C(CHIP,_mem_read_2)(v, memh, off) 531 void *v; 532 bus_space_handle_t memh; 533 bus_size_t off; 534 { 535 bus_addr_t addr; 536 537 addr = memh + off; 538 #ifdef DIAGNOSTIC 539 if (addr & 1) 540 panic(__S(__C(CHIP,_mem_read_2)) ": addr 0x%lx not aligned", 541 addr); 542 #endif 543 alpha_mb(); 544 return (alpha_ldwu((u_int16_t *)addr)); 545 } 546 547 inline u_int32_t 548 __C(CHIP,_mem_read_4)(v, memh, off) 549 void *v; 550 bus_space_handle_t memh; 551 bus_size_t off; 552 { 553 bus_addr_t addr; 554 555 addr = memh + off; 556 #ifdef DIAGNOSTIC 557 if (addr & 3) 558 panic(__S(__C(CHIP,_mem_read_4)) ": addr 0x%lx not aligned", 559 addr); 560 #endif 561 alpha_mb(); 562 return (*(u_int32_t *)addr); 563 } 564 565 inline u_int64_t 566 __C(CHIP,_mem_read_8)(v, memh, off) 567 void *v; 568 bus_space_handle_t memh; 569 bus_size_t off; 570 { 571 572 alpha_mb(); 573 574 /* XXX XXX XXX */ 575 panic("%s not implemented", __S(__C(CHIP,_mem_read_8))); 576 } 577 578 #define CHIP_mem_read_multi_N(BYTES,TYPE) \ 579 void \ 580 __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \ 581 void *v; \ 582 bus_space_handle_t h; \ 583 bus_size_t o, c; \ 584 TYPE *a; \ 585 { \ 586 \ 587 while (c-- > 0) { \ 588 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 589 BUS_SPACE_BARRIER_READ); \ 590 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 591 } \ 592 } 593 CHIP_mem_read_multi_N(1,u_int8_t) 594 CHIP_mem_read_multi_N(2,u_int16_t) 595 CHIP_mem_read_multi_N(4,u_int32_t) 596 CHIP_mem_read_multi_N(8,u_int64_t) 597 598 #define CHIP_mem_read_region_N(BYTES,TYPE) \ 599 void \ 600 __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \ 601 void *v; \ 602 bus_space_handle_t h; \ 603 bus_size_t o, c; \ 604 TYPE *a; \ 605 { \ 606 \ 607 while (c-- > 0) { \ 608 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 609 o += sizeof *a; \ 610 } \ 611 } 612 CHIP_mem_read_region_N(1,u_int8_t) 613 CHIP_mem_read_region_N(2,u_int16_t) 614 CHIP_mem_read_region_N(4,u_int32_t) 615 CHIP_mem_read_region_N(8,u_int64_t) 616 617 inline void 618 __C(CHIP,_mem_write_1)(v, memh, off, val) 619 void *v; 620 bus_space_handle_t memh; 621 bus_size_t off; 622 u_int8_t val; 623 { 624 bus_addr_t addr; 625 626 addr = memh + off; 627 alpha_stb((u_int8_t *)addr, val); 628 alpha_mb(); 629 } 630 631 inline void 632 __C(CHIP,_mem_write_2)(v, memh, off, val) 633 void *v; 634 bus_space_handle_t memh; 635 bus_size_t off; 636 u_int16_t val; 637 { 638 bus_addr_t addr; 639 640 addr = memh + off; 641 #ifdef DIAGNOSTIC 642 if (addr & 1) 643 panic(__S(__C(CHIP,_mem_write_2)) ": addr 0x%lx not aligned", 644 addr); 645 #endif 646 alpha_stw((u_int16_t *)addr, val); 647 alpha_mb(); 648 } 649 650 inline void 651 __C(CHIP,_mem_write_4)(v, memh, off, val) 652 void *v; 653 bus_space_handle_t memh; 654 bus_size_t off; 655 u_int32_t val; 656 { 657 bus_addr_t addr; 658 659 addr = memh + off; 660 #ifdef DIAGNOSTIC 661 if (addr & 3) 662 panic(__S(__C(CHIP,_mem_write_4)) ": addr 0x%lx not aligned", 663 addr); 664 #endif 665 *(u_int32_t *)addr = val; 666 alpha_mb(); 667 } 668 669 inline void 670 __C(CHIP,_mem_write_8)(v, memh, off, val) 671 void *v; 672 bus_space_handle_t memh; 673 bus_size_t off; 674 u_int64_t val; 675 { 676 677 /* XXX XXX XXX */ 678 panic("%s not implemented", __S(__C(CHIP,_mem_write_8))); 679 alpha_mb(); 680 } 681 682 #define CHIP_mem_write_multi_N(BYTES,TYPE) \ 683 void \ 684 __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \ 685 void *v; \ 686 bus_space_handle_t h; \ 687 bus_size_t o, c; \ 688 const TYPE *a; \ 689 { \ 690 \ 691 while (c-- > 0) { \ 692 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 693 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 694 BUS_SPACE_BARRIER_WRITE); \ 695 } \ 696 } 697 CHIP_mem_write_multi_N(1,u_int8_t) 698 CHIP_mem_write_multi_N(2,u_int16_t) 699 CHIP_mem_write_multi_N(4,u_int32_t) 700 CHIP_mem_write_multi_N(8,u_int64_t) 701 702 #define CHIP_mem_write_region_N(BYTES,TYPE) \ 703 void \ 704 __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \ 705 void *v; \ 706 bus_space_handle_t h; \ 707 bus_size_t o, c; \ 708 const TYPE *a; \ 709 { \ 710 \ 711 while (c-- > 0) { \ 712 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 713 o += sizeof *a; \ 714 } \ 715 } 716 CHIP_mem_write_region_N(1,u_int8_t) 717 CHIP_mem_write_region_N(2,u_int16_t) 718 CHIP_mem_write_region_N(4,u_int32_t) 719 CHIP_mem_write_region_N(8,u_int64_t) 720 721 #define CHIP_mem_set_multi_N(BYTES,TYPE) \ 722 void \ 723 __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \ 724 void *v; \ 725 bus_space_handle_t h; \ 726 bus_size_t o, c; \ 727 TYPE val; \ 728 { \ 729 \ 730 while (c-- > 0) { \ 731 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 732 __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \ 733 BUS_SPACE_BARRIER_WRITE); \ 734 } \ 735 } 736 CHIP_mem_set_multi_N(1,u_int8_t) 737 CHIP_mem_set_multi_N(2,u_int16_t) 738 CHIP_mem_set_multi_N(4,u_int32_t) 739 CHIP_mem_set_multi_N(8,u_int64_t) 740 741 #define CHIP_mem_set_region_N(BYTES,TYPE) \ 742 void \ 743 __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \ 744 void *v; \ 745 bus_space_handle_t h; \ 746 bus_size_t o, c; \ 747 TYPE val; \ 748 { \ 749 \ 750 while (c-- > 0) { \ 751 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 752 o += sizeof val; \ 753 } \ 754 } 755 CHIP_mem_set_region_N(1,u_int8_t) 756 CHIP_mem_set_region_N(2,u_int16_t) 757 CHIP_mem_set_region_N(4,u_int32_t) 758 CHIP_mem_set_region_N(8,u_int64_t) 759 760 #define CHIP_mem_copy_region_N(BYTES) \ 761 void \ 762 __C(__C(CHIP,_mem_copy_region_),BYTES)(v, h1, o1, h2, o2, c) \ 763 void *v; \ 764 bus_space_handle_t h1, h2; \ 765 bus_size_t o1, o2, c; \ 766 { \ 767 bus_size_t o; \ 768 \ 769 if ((h1 + o1) >= (h2 + o2)) { \ 770 /* src after dest: copy forward */ \ 771 for (o = 0; c != 0; c--, o += BYTES) { \ 772 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 773 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 774 } \ 775 } else { \ 776 /* dest after src: copy backwards */ \ 777 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) { \ 778 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 779 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 780 } \ 781 } \ 782 } 783 CHIP_mem_copy_region_N(1) 784 CHIP_mem_copy_region_N(2) 785 CHIP_mem_copy_region_N(4) 786 CHIP_mem_copy_region_N(8) 787
Indexes created Tue Oct 28 12:10:06 GMT 2025