pci_bwx_bus_mem_chipdep.c revision 1.14.2.1
1 /* $NetBSD: pci_bwx_bus_mem_chipdep.c,v 1.14.2.1 2001/09/21 22:34:58 nathanw Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 /* 68 * Common PCI Chipset "bus I/O" functions, for chipsets which have to 69 * deal with only a single PCI interface chip in a machine. 70 * 71 * uses: 72 * CHIP name of the 'chip' it's being compiled for. 73 * CHIP_MEM_BASE Mem space base to use. 74 * CHIP_MEM_EX_STORE 75 * If defined, device-provided static storage area 76 * for the memory space extent. If this is 77 * defined, CHIP_MEM_EX_STORE_SIZE must also be 78 * defined. If this is not defined, a static area 79 * will be declared. 80 * CHIP_MEM_EX_STORE_SIZE 81 * Size of the device-provided static storage area 82 * for the memory space extent. 83 */ 84 85 #include <sys/extent.h> 86 87 #include <machine/bwx.h> 88 89 #define __C(A,B) __CONCAT(A,B) 90 #define __S(S) __STRING(S) 91 92 /* mapping/unmapping */ 93 int __C(CHIP,_mem_map) __P((void *, bus_addr_t, bus_size_t, int, 94 bus_space_handle_t *, int)); 95 void __C(CHIP,_mem_unmap) __P((void *, bus_space_handle_t, 96 bus_size_t, int)); 97 int __C(CHIP,_mem_subregion) __P((void *, bus_space_handle_t, 98 bus_size_t, bus_size_t, bus_space_handle_t *)); 99 100 int __C(CHIP,_mem_translate) __P((void *, bus_addr_t, bus_size_t, 101 int, struct alpha_bus_space_translation *)); 102 int __C(CHIP,_mem_get_window) __P((void *, int, 103 struct alpha_bus_space_translation *)); 104 105 /* allocation/deallocation */ 106 int __C(CHIP,_mem_alloc) __P((void *, bus_addr_t, bus_addr_t, 107 bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *, 108 bus_space_handle_t *)); 109 void __C(CHIP,_mem_free) __P((void *, bus_space_handle_t, 110 bus_size_t)); 111 112 /* get kernel virtual address */ 113 void * __C(CHIP,_mem_vaddr) __P((void *, bus_space_handle_t)); 114 115 /* mmap for user */ 116 paddr_t __C(CHIP,_mem_mmap) __P((void *, bus_addr_t, off_t, int, int)); 117 118 /* barrier */ 119 inline void __C(CHIP,_mem_barrier) __P((void *, bus_space_handle_t, 120 bus_size_t, bus_size_t, int)); 121 122 /* read (single) */ 123 inline u_int8_t __C(CHIP,_mem_read_1) __P((void *, bus_space_handle_t, 124 bus_size_t)); 125 inline u_int16_t __C(CHIP,_mem_read_2) __P((void *, bus_space_handle_t, 126 bus_size_t)); 127 inline u_int32_t __C(CHIP,_mem_read_4) __P((void *, bus_space_handle_t, 128 bus_size_t)); 129 inline u_int64_t __C(CHIP,_mem_read_8) __P((void *, bus_space_handle_t, 130 bus_size_t)); 131 132 /* read multiple */ 133 void __C(CHIP,_mem_read_multi_1) __P((void *, bus_space_handle_t, 134 bus_size_t, u_int8_t *, bus_size_t)); 135 void __C(CHIP,_mem_read_multi_2) __P((void *, bus_space_handle_t, 136 bus_size_t, u_int16_t *, bus_size_t)); 137 void __C(CHIP,_mem_read_multi_4) __P((void *, bus_space_handle_t, 138 bus_size_t, u_int32_t *, bus_size_t)); 139 void __C(CHIP,_mem_read_multi_8) __P((void *, bus_space_handle_t, 140 bus_size_t, u_int64_t *, bus_size_t)); 141 142 /* read region */ 143 void __C(CHIP,_mem_read_region_1) __P((void *, bus_space_handle_t, 144 bus_size_t, u_int8_t *, bus_size_t)); 145 void __C(CHIP,_mem_read_region_2) __P((void *, bus_space_handle_t, 146 bus_size_t, u_int16_t *, bus_size_t)); 147 void __C(CHIP,_mem_read_region_4) __P((void *, bus_space_handle_t, 148 bus_size_t, u_int32_t *, bus_size_t)); 149 void __C(CHIP,_mem_read_region_8) __P((void *, bus_space_handle_t, 150 bus_size_t, u_int64_t *, bus_size_t)); 151 152 /* write (single) */ 153 inline void __C(CHIP,_mem_write_1) __P((void *, bus_space_handle_t, 154 bus_size_t, u_int8_t)); 155 inline void __C(CHIP,_mem_write_2) __P((void *, bus_space_handle_t, 156 bus_size_t, u_int16_t)); 157 inline void __C(CHIP,_mem_write_4) __P((void *, bus_space_handle_t, 158 bus_size_t, u_int32_t)); 159 inline void __C(CHIP,_mem_write_8) __P((void *, bus_space_handle_t, 160 bus_size_t, u_int64_t)); 161 162 /* write multiple */ 163 void __C(CHIP,_mem_write_multi_1) __P((void *, bus_space_handle_t, 164 bus_size_t, const u_int8_t *, bus_size_t)); 165 void __C(CHIP,_mem_write_multi_2) __P((void *, bus_space_handle_t, 166 bus_size_t, const u_int16_t *, bus_size_t)); 167 void __C(CHIP,_mem_write_multi_4) __P((void *, bus_space_handle_t, 168 bus_size_t, const u_int32_t *, bus_size_t)); 169 void __C(CHIP,_mem_write_multi_8) __P((void *, bus_space_handle_t, 170 bus_size_t, const u_int64_t *, bus_size_t)); 171 172 /* write region */ 173 void __C(CHIP,_mem_write_region_1) __P((void *, bus_space_handle_t, 174 bus_size_t, const u_int8_t *, bus_size_t)); 175 void __C(CHIP,_mem_write_region_2) __P((void *, bus_space_handle_t, 176 bus_size_t, const u_int16_t *, bus_size_t)); 177 void __C(CHIP,_mem_write_region_4) __P((void *, bus_space_handle_t, 178 bus_size_t, const u_int32_t *, bus_size_t)); 179 void __C(CHIP,_mem_write_region_8) __P((void *, bus_space_handle_t, 180 bus_size_t, const u_int64_t *, bus_size_t)); 181 182 /* set multiple */ 183 void __C(CHIP,_mem_set_multi_1) __P((void *, bus_space_handle_t, 184 bus_size_t, u_int8_t, bus_size_t)); 185 void __C(CHIP,_mem_set_multi_2) __P((void *, bus_space_handle_t, 186 bus_size_t, u_int16_t, bus_size_t)); 187 void __C(CHIP,_mem_set_multi_4) __P((void *, bus_space_handle_t, 188 bus_size_t, u_int32_t, bus_size_t)); 189 void __C(CHIP,_mem_set_multi_8) __P((void *, bus_space_handle_t, 190 bus_size_t, u_int64_t, bus_size_t)); 191 192 /* set region */ 193 void __C(CHIP,_mem_set_region_1) __P((void *, bus_space_handle_t, 194 bus_size_t, u_int8_t, bus_size_t)); 195 void __C(CHIP,_mem_set_region_2) __P((void *, bus_space_handle_t, 196 bus_size_t, u_int16_t, bus_size_t)); 197 void __C(CHIP,_mem_set_region_4) __P((void *, bus_space_handle_t, 198 bus_size_t, u_int32_t, bus_size_t)); 199 void __C(CHIP,_mem_set_region_8) __P((void *, bus_space_handle_t, 200 bus_size_t, u_int64_t, bus_size_t)); 201 202 /* copy */ 203 void __C(CHIP,_mem_copy_region_1) __P((void *, bus_space_handle_t, 204 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 205 void __C(CHIP,_mem_copy_region_2) __P((void *, bus_space_handle_t, 206 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 207 void __C(CHIP,_mem_copy_region_4) __P((void *, bus_space_handle_t, 208 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 209 void __C(CHIP,_mem_copy_region_8) __P((void *, bus_space_handle_t, 210 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 211 212 #ifndef CHIP_MEM_EX_STORE 213 static long 214 __C(CHIP,_mem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 215 #define CHIP_MEM_EX_STORE(v) (__C(CHIP,_mem_ex_storage)) 216 #define CHIP_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_mem_ex_storage)) 217 #endif 218 219 void 220 __C(CHIP,_bus_mem_init)(t, v) 221 bus_space_tag_t t; 222 void *v; 223 { 224 struct extent *ex; 225 226 /* 227 * Initialize the bus space tag. 228 */ 229 230 /* cookie */ 231 t->abs_cookie = v; 232 233 /* mapping/unmapping */ 234 t->abs_map = __C(CHIP,_mem_map); 235 t->abs_unmap = __C(CHIP,_mem_unmap); 236 t->abs_subregion = __C(CHIP,_mem_subregion); 237 238 t->abs_translate = __C(CHIP,_mem_translate); 239 t->abs_get_window = __C(CHIP,_mem_get_window); 240 241 /* allocation/deallocation */ 242 t->abs_alloc = __C(CHIP,_mem_alloc); 243 t->abs_free = __C(CHIP,_mem_free); 244 245 /* get kernel virtual address */ 246 t->abs_vaddr = __C(CHIP,_mem_vaddr); 247 248 /* mmap for user */ 249 t->abs_mmap = __C(CHIP,_mem_mmap); 250 251 /* barrier */ 252 t->abs_barrier = __C(CHIP,_mem_barrier); 253 254 /* read (single) */ 255 t->abs_r_1 = __C(CHIP,_mem_read_1); 256 t->abs_r_2 = __C(CHIP,_mem_read_2); 257 t->abs_r_4 = __C(CHIP,_mem_read_4); 258 t->abs_r_8 = __C(CHIP,_mem_read_8); 259 260 /* read multiple */ 261 t->abs_rm_1 = __C(CHIP,_mem_read_multi_1); 262 t->abs_rm_2 = __C(CHIP,_mem_read_multi_2); 263 t->abs_rm_4 = __C(CHIP,_mem_read_multi_4); 264 t->abs_rm_8 = __C(CHIP,_mem_read_multi_8); 265 266 /* read region */ 267 t->abs_rr_1 = __C(CHIP,_mem_read_region_1); 268 t->abs_rr_2 = __C(CHIP,_mem_read_region_2); 269 t->abs_rr_4 = __C(CHIP,_mem_read_region_4); 270 t->abs_rr_8 = __C(CHIP,_mem_read_region_8); 271 272 /* write (single) */ 273 t->abs_w_1 = __C(CHIP,_mem_write_1); 274 t->abs_w_2 = __C(CHIP,_mem_write_2); 275 t->abs_w_4 = __C(CHIP,_mem_write_4); 276 t->abs_w_8 = __C(CHIP,_mem_write_8); 277 278 /* write multiple */ 279 t->abs_wm_1 = __C(CHIP,_mem_write_multi_1); 280 t->abs_wm_2 = __C(CHIP,_mem_write_multi_2); 281 t->abs_wm_4 = __C(CHIP,_mem_write_multi_4); 282 t->abs_wm_8 = __C(CHIP,_mem_write_multi_8); 283 284 /* write region */ 285 t->abs_wr_1 = __C(CHIP,_mem_write_region_1); 286 t->abs_wr_2 = __C(CHIP,_mem_write_region_2); 287 t->abs_wr_4 = __C(CHIP,_mem_write_region_4); 288 t->abs_wr_8 = __C(CHIP,_mem_write_region_8); 289 290 /* set multiple */ 291 t->abs_sm_1 = __C(CHIP,_mem_set_multi_1); 292 t->abs_sm_2 = __C(CHIP,_mem_set_multi_2); 293 t->abs_sm_4 = __C(CHIP,_mem_set_multi_4); 294 t->abs_sm_8 = __C(CHIP,_mem_set_multi_8); 295 296 /* set region */ 297 t->abs_sr_1 = __C(CHIP,_mem_set_region_1); 298 t->abs_sr_2 = __C(CHIP,_mem_set_region_2); 299 t->abs_sr_4 = __C(CHIP,_mem_set_region_4); 300 t->abs_sr_8 = __C(CHIP,_mem_set_region_8); 301 302 /* copy */ 303 t->abs_c_1 = __C(CHIP,_mem_copy_region_1); 304 t->abs_c_2 = __C(CHIP,_mem_copy_region_2); 305 t->abs_c_4 = __C(CHIP,_mem_copy_region_4); 306 t->abs_c_8 = __C(CHIP,_mem_copy_region_8); 307 308 ex = extent_create(__S(__C(CHIP,_bus_mem)), 0x0UL, 0xffffffffUL, 309 M_DEVBUF, (caddr_t)CHIP_MEM_EX_STORE(v), CHIP_MEM_EX_STORE_SIZE(v), 310 EX_NOWAIT|EX_NOCOALESCE); 311 312 CHIP_MEM_EXTENT(v) = ex; 313 } 314 315 int 316 __C(CHIP,_mem_translate)(v, memaddr, memlen, flags, abst) 317 void *v; 318 bus_addr_t memaddr; 319 bus_size_t memlen; 320 int flags; 321 struct alpha_bus_space_translation *abst; 322 { 323 324 /* XXX */ 325 return (EOPNOTSUPP); 326 } 327 328 int 329 __C(CHIP,_mem_get_window)(v, window, abst) 330 void *v; 331 int window; 332 struct alpha_bus_space_translation *abst; 333 { 334 335 switch (window) { 336 case 0: 337 abst->abst_bus_start = 0; 338 abst->abst_bus_end = 0xffffffffUL; 339 abst->abst_sys_start = CHIP_MEM_SYS_START(v); 340 abst->abst_sys_end = CHIP_MEM_SYS_START(v) + abst->abst_bus_end; 341 abst->abst_addr_shift = 0; 342 abst->abst_size_shift = 0; 343 abst->abst_flags = ABST_DENSE|ABST_BWX; 344 break; 345 346 default: 347 panic(__S(__C(CHIP,_mem_get_window)) ": invalid window %d", 348 window); 349 } 350 351 return (0); 352 } 353 354 int 355 __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct) 356 void *v; 357 bus_addr_t memaddr; 358 bus_size_t memsize; 359 int flags; 360 bus_space_handle_t *memhp; 361 int acct; 362 { 363 int error; 364 365 if (acct == 0) 366 goto mapit; 367 368 #ifdef EXTENT_DEBUG 369 printf("mem: allocating 0x%lx to 0x%lx\n", memaddr, 370 memaddr + memsize - 1); 371 #endif 372 error = extent_alloc_region(CHIP_MEM_EXTENT(v), memaddr, memsize, 373 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 374 if (error) { 375 #ifdef EXTENT_DEBUG 376 printf("mem: allocation failed (%d)\n", error); 377 extent_print(CHIP_MEM_EXTENT(v)); 378 #endif 379 return (error); 380 } 381 382 mapit: 383 *memhp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr; 384 385 return (0); 386 } 387 388 void 389 __C(CHIP,_mem_unmap)(v, memh, memsize, acct) 390 void *v; 391 bus_space_handle_t memh; 392 bus_size_t memsize; 393 int acct; 394 { 395 bus_addr_t memaddr; 396 int error; 397 398 if (acct == 0) 399 return; 400 401 #ifdef EXTENT_DEBUG 402 printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize); 403 #endif 404 405 memaddr = memh - ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)); 406 407 #ifdef EXTENT_DEBUG 408 printf("mem: freeing 0x%lx to 0x%lx\n", memaddr, memaddr + memsize - 1); 409 #endif 410 411 error = extent_free(CHIP_MEM_EXTENT(v), memaddr, memsize, 412 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 413 if (error) { 414 printf("%s: WARNING: could not unmap 0x%lx-0x%lx (error %d)\n", 415 __S(__C(CHIP,_mem_unmap)), memaddr, memaddr + memsize - 1, 416 error); 417 #ifdef EXTENT_DEBUG 418 extent_print(CHIP_MEM_EXTENT(v)); 419 #endif 420 } 421 } 422 423 int 424 __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh) 425 void *v; 426 bus_space_handle_t memh, *nmemh; 427 bus_size_t offset, size; 428 { 429 430 *nmemh = memh + offset; 431 return (0); 432 } 433 434 int 435 __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags, 436 addrp, bshp) 437 void *v; 438 bus_addr_t rstart, rend, *addrp; 439 bus_size_t size, align, boundary; 440 int flags; 441 bus_space_handle_t *bshp; 442 { 443 bus_addr_t memaddr; 444 int error; 445 446 /* 447 * Do the requested allocation. 448 */ 449 #ifdef EXTENT_DEBUG 450 printf("mem: allocating from 0x%lx to 0x%lx\n", rstart, rend); 451 #endif 452 error = extent_alloc_subregion(CHIP_MEM_EXTENT(v), rstart, rend, 453 size, align, boundary, 454 EX_FAST | EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0), 455 &memaddr); 456 if (error) { 457 #ifdef EXTENT_DEBUG 458 printf("mem: allocation failed (%d)\n", error); 459 extent_print(CHIP_MEM_EXTENT(v)); 460 #endif 461 } 462 463 #ifdef EXTENT_DEBUG 464 printf("mem: allocated 0x%lx to 0x%lx\n", memaddr, memaddr + size - 1); 465 #endif 466 467 *addrp = memaddr; 468 *bshp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr; 469 470 return (0); 471 } 472 473 void 474 __C(CHIP,_mem_free)(v, bsh, size) 475 void *v; 476 bus_space_handle_t bsh; 477 bus_size_t size; 478 { 479 480 /* Unmap does all we need to do. */ 481 __C(CHIP,_mem_unmap)(v, bsh, size, 1); 482 } 483 484 void * 485 __C(CHIP,_mem_vaddr)(v, bsh) 486 void *v; 487 bus_space_handle_t bsh; 488 { 489 490 return ((void *)bsh); 491 } 492 493 paddr_t 494 __C(CHIP,_mem_mmap)(v, addr, off, prot, flags) 495 void *v; 496 bus_addr_t addr; 497 off_t off; 498 int prot; 499 int flags; 500 { 501 502 return (alpha_btop(CHIP_MEM_SYS_START(v) + addr + off)); 503 } 504 505 inline void 506 __C(CHIP,_mem_barrier)(v, h, o, l, f) 507 void *v; 508 bus_space_handle_t h; 509 bus_size_t o, l; 510 int f; 511 { 512 513 if ((f & BUS_SPACE_BARRIER_READ) != 0) 514 alpha_mb(); 515 else if ((f & BUS_SPACE_BARRIER_WRITE) != 0) 516 alpha_wmb(); 517 } 518 519 inline u_int8_t 520 __C(CHIP,_mem_read_1)(v, memh, off) 521 void *v; 522 bus_space_handle_t memh; 523 bus_size_t off; 524 { 525 bus_addr_t addr; 526 527 addr = memh + off; 528 alpha_mb(); 529 return (alpha_ldbu((u_int8_t *)addr)); 530 } 531 532 inline u_int16_t 533 __C(CHIP,_mem_read_2)(v, memh, off) 534 void *v; 535 bus_space_handle_t memh; 536 bus_size_t off; 537 { 538 bus_addr_t addr; 539 540 addr = memh + off; 541 #ifdef DIAGNOSTIC 542 if (addr & 1) 543 panic(__S(__C(CHIP,_mem_read_2)) ": addr 0x%lx not aligned", 544 addr); 545 #endif 546 alpha_mb(); 547 return (alpha_ldwu((u_int16_t *)addr)); 548 } 549 550 inline u_int32_t 551 __C(CHIP,_mem_read_4)(v, memh, off) 552 void *v; 553 bus_space_handle_t memh; 554 bus_size_t off; 555 { 556 bus_addr_t addr; 557 558 addr = memh + off; 559 #ifdef DIAGNOSTIC 560 if (addr & 3) 561 panic(__S(__C(CHIP,_mem_read_4)) ": addr 0x%lx not aligned", 562 addr); 563 #endif 564 alpha_mb(); 565 return (*(u_int32_t *)addr); 566 } 567 568 inline u_int64_t 569 __C(CHIP,_mem_read_8)(v, memh, off) 570 void *v; 571 bus_space_handle_t memh; 572 bus_size_t off; 573 { 574 575 alpha_mb(); 576 577 /* XXX XXX XXX */ 578 panic("%s not implemented", __S(__C(CHIP,_mem_read_8))); 579 } 580 581 #define CHIP_mem_read_multi_N(BYTES,TYPE) \ 582 void \ 583 __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \ 584 void *v; \ 585 bus_space_handle_t h; \ 586 bus_size_t o, c; \ 587 TYPE *a; \ 588 { \ 589 \ 590 while (c-- > 0) { \ 591 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 592 BUS_SPACE_BARRIER_READ); \ 593 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 594 } \ 595 } 596 CHIP_mem_read_multi_N(1,u_int8_t) 597 CHIP_mem_read_multi_N(2,u_int16_t) 598 CHIP_mem_read_multi_N(4,u_int32_t) 599 CHIP_mem_read_multi_N(8,u_int64_t) 600 601 #define CHIP_mem_read_region_N(BYTES,TYPE) \ 602 void \ 603 __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \ 604 void *v; \ 605 bus_space_handle_t h; \ 606 bus_size_t o, c; \ 607 TYPE *a; \ 608 { \ 609 \ 610 while (c-- > 0) { \ 611 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 612 o += sizeof *a; \ 613 } \ 614 } 615 CHIP_mem_read_region_N(1,u_int8_t) 616 CHIP_mem_read_region_N(2,u_int16_t) 617 CHIP_mem_read_region_N(4,u_int32_t) 618 CHIP_mem_read_region_N(8,u_int64_t) 619 620 inline void 621 __C(CHIP,_mem_write_1)(v, memh, off, val) 622 void *v; 623 bus_space_handle_t memh; 624 bus_size_t off; 625 u_int8_t val; 626 { 627 bus_addr_t addr; 628 629 addr = memh + off; 630 alpha_stb((u_int8_t *)addr, val); 631 alpha_mb(); 632 } 633 634 inline void 635 __C(CHIP,_mem_write_2)(v, memh, off, val) 636 void *v; 637 bus_space_handle_t memh; 638 bus_size_t off; 639 u_int16_t val; 640 { 641 bus_addr_t addr; 642 643 addr = memh + off; 644 #ifdef DIAGNOSTIC 645 if (addr & 1) 646 panic(__S(__C(CHIP,_mem_write_2)) ": addr 0x%lx not aligned", 647 addr); 648 #endif 649 alpha_stw((u_int16_t *)addr, val); 650 alpha_mb(); 651 } 652 653 inline void 654 __C(CHIP,_mem_write_4)(v, memh, off, val) 655 void *v; 656 bus_space_handle_t memh; 657 bus_size_t off; 658 u_int32_t val; 659 { 660 bus_addr_t addr; 661 662 addr = memh + off; 663 #ifdef DIAGNOSTIC 664 if (addr & 3) 665 panic(__S(__C(CHIP,_mem_write_4)) ": addr 0x%lx not aligned", 666 addr); 667 #endif 668 *(u_int32_t *)addr = val; 669 alpha_mb(); 670 } 671 672 inline void 673 __C(CHIP,_mem_write_8)(v, memh, off, val) 674 void *v; 675 bus_space_handle_t memh; 676 bus_size_t off; 677 u_int64_t val; 678 { 679 680 /* XXX XXX XXX */ 681 panic("%s not implemented", __S(__C(CHIP,_mem_write_8))); 682 alpha_mb(); 683 } 684 685 #define CHIP_mem_write_multi_N(BYTES,TYPE) \ 686 void \ 687 __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \ 688 void *v; \ 689 bus_space_handle_t h; \ 690 bus_size_t o, c; \ 691 const TYPE *a; \ 692 { \ 693 \ 694 while (c-- > 0) { \ 695 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 696 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 697 BUS_SPACE_BARRIER_WRITE); \ 698 } \ 699 } 700 CHIP_mem_write_multi_N(1,u_int8_t) 701 CHIP_mem_write_multi_N(2,u_int16_t) 702 CHIP_mem_write_multi_N(4,u_int32_t) 703 CHIP_mem_write_multi_N(8,u_int64_t) 704 705 #define CHIP_mem_write_region_N(BYTES,TYPE) \ 706 void \ 707 __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \ 708 void *v; \ 709 bus_space_handle_t h; \ 710 bus_size_t o, c; \ 711 const TYPE *a; \ 712 { \ 713 \ 714 while (c-- > 0) { \ 715 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 716 o += sizeof *a; \ 717 } \ 718 } 719 CHIP_mem_write_region_N(1,u_int8_t) 720 CHIP_mem_write_region_N(2,u_int16_t) 721 CHIP_mem_write_region_N(4,u_int32_t) 722 CHIP_mem_write_region_N(8,u_int64_t) 723 724 #define CHIP_mem_set_multi_N(BYTES,TYPE) \ 725 void \ 726 __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \ 727 void *v; \ 728 bus_space_handle_t h; \ 729 bus_size_t o, c; \ 730 TYPE val; \ 731 { \ 732 \ 733 while (c-- > 0) { \ 734 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 735 __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \ 736 BUS_SPACE_BARRIER_WRITE); \ 737 } \ 738 } 739 CHIP_mem_set_multi_N(1,u_int8_t) 740 CHIP_mem_set_multi_N(2,u_int16_t) 741 CHIP_mem_set_multi_N(4,u_int32_t) 742 CHIP_mem_set_multi_N(8,u_int64_t) 743 744 #define CHIP_mem_set_region_N(BYTES,TYPE) \ 745 void \ 746 __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \ 747 void *v; \ 748 bus_space_handle_t h; \ 749 bus_size_t o, c; \ 750 TYPE val; \ 751 { \ 752 \ 753 while (c-- > 0) { \ 754 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 755 o += sizeof val; \ 756 } \ 757 } 758 CHIP_mem_set_region_N(1,u_int8_t) 759 CHIP_mem_set_region_N(2,u_int16_t) 760 CHIP_mem_set_region_N(4,u_int32_t) 761 CHIP_mem_set_region_N(8,u_int64_t) 762 763 #define CHIP_mem_copy_region_N(BYTES) \ 764 void \ 765 __C(__C(CHIP,_mem_copy_region_),BYTES)(v, h1, o1, h2, o2, c) \ 766 void *v; \ 767 bus_space_handle_t h1, h2; \ 768 bus_size_t o1, o2, c; \ 769 { \ 770 bus_size_t o; \ 771 \ 772 if ((h1 + o1) >= (h2 + o2)) { \ 773 /* src after dest: copy forward */ \ 774 for (o = 0; c != 0; c--, o += BYTES) { \ 775 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 776 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 777 } \ 778 } else { \ 779 /* dest after src: copy backwards */ \ 780 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) { \ 781 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 782 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 783 } \ 784 } \ 785 } 786 CHIP_mem_copy_region_N(1) 787 CHIP_mem_copy_region_N(2) 788 CHIP_mem_copy_region_N(4) 789 CHIP_mem_copy_region_N(8) 790
Indexes created Tue Oct 28 12:10:06 GMT 2025