pci_bwx_bus_mem_chipdep.c revision 1.8
1 /* $NetBSD: pci_bwx_bus_mem_chipdep.c,v 1.8 2000/02/25 00:45:05 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 /* 68 * Common PCI Chipset "bus I/O" functions, for chipsets which have to 69 * deal with only a single PCI interface chip in a machine. 70 * 71 * uses: 72 * CHIP name of the 'chip' it's being compiled for. 73 * CHIP_MEM_BASE Mem space base to use. 74 * CHIP_MEM_EX_STORE 75 * If defined, device-provided static storage area 76 * for the memory space extent. If this is 77 * defined, CHIP_MEM_EX_STORE_SIZE must also be 78 * defined. If this is not defined, a static area 79 * will be declared. 80 * CHIP_MEM_EX_STORE_SIZE 81 * Size of the device-provided static storage area 82 * for the memory space extent. 83 */ 84 85 #include <sys/extent.h> 86 87 #include <machine/bwx.h> 88 89 #define __C(A,B) __CONCAT(A,B) 90 #define __S(S) __STRING(S) 91 92 /* mapping/unmapping */ 93 int __C(CHIP,_mem_map) __P((void *, bus_addr_t, bus_size_t, int, 94 bus_space_handle_t *, int)); 95 void __C(CHIP,_mem_unmap) __P((void *, bus_space_handle_t, 96 bus_size_t, int)); 97 int __C(CHIP,_mem_subregion) __P((void *, bus_space_handle_t, 98 bus_size_t, bus_size_t, bus_space_handle_t *)); 99 100 int __C(CHIP,_mem_translate) __P((void *, bus_addr_t, bus_size_t, 101 int, struct alpha_bus_space_translation *)); 102 103 /* allocation/deallocation */ 104 int __C(CHIP,_mem_alloc) __P((void *, bus_addr_t, bus_addr_t, 105 bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *, 106 bus_space_handle_t *)); 107 void __C(CHIP,_mem_free) __P((void *, bus_space_handle_t, 108 bus_size_t)); 109 110 /* barrier */ 111 inline void __C(CHIP,_mem_barrier) __P((void *, bus_space_handle_t, 112 bus_size_t, bus_size_t, int)); 113 114 /* read (single) */ 115 inline u_int8_t __C(CHIP,_mem_read_1) __P((void *, bus_space_handle_t, 116 bus_size_t)); 117 inline u_int16_t __C(CHIP,_mem_read_2) __P((void *, bus_space_handle_t, 118 bus_size_t)); 119 inline u_int32_t __C(CHIP,_mem_read_4) __P((void *, bus_space_handle_t, 120 bus_size_t)); 121 inline u_int64_t __C(CHIP,_mem_read_8) __P((void *, bus_space_handle_t, 122 bus_size_t)); 123 124 /* read multiple */ 125 void __C(CHIP,_mem_read_multi_1) __P((void *, bus_space_handle_t, 126 bus_size_t, u_int8_t *, bus_size_t)); 127 void __C(CHIP,_mem_read_multi_2) __P((void *, bus_space_handle_t, 128 bus_size_t, u_int16_t *, bus_size_t)); 129 void __C(CHIP,_mem_read_multi_4) __P((void *, bus_space_handle_t, 130 bus_size_t, u_int32_t *, bus_size_t)); 131 void __C(CHIP,_mem_read_multi_8) __P((void *, bus_space_handle_t, 132 bus_size_t, u_int64_t *, bus_size_t)); 133 134 /* read region */ 135 void __C(CHIP,_mem_read_region_1) __P((void *, bus_space_handle_t, 136 bus_size_t, u_int8_t *, bus_size_t)); 137 void __C(CHIP,_mem_read_region_2) __P((void *, bus_space_handle_t, 138 bus_size_t, u_int16_t *, bus_size_t)); 139 void __C(CHIP,_mem_read_region_4) __P((void *, bus_space_handle_t, 140 bus_size_t, u_int32_t *, bus_size_t)); 141 void __C(CHIP,_mem_read_region_8) __P((void *, bus_space_handle_t, 142 bus_size_t, u_int64_t *, bus_size_t)); 143 144 /* write (single) */ 145 inline void __C(CHIP,_mem_write_1) __P((void *, bus_space_handle_t, 146 bus_size_t, u_int8_t)); 147 inline void __C(CHIP,_mem_write_2) __P((void *, bus_space_handle_t, 148 bus_size_t, u_int16_t)); 149 inline void __C(CHIP,_mem_write_4) __P((void *, bus_space_handle_t, 150 bus_size_t, u_int32_t)); 151 inline void __C(CHIP,_mem_write_8) __P((void *, bus_space_handle_t, 152 bus_size_t, u_int64_t)); 153 154 /* write multiple */ 155 void __C(CHIP,_mem_write_multi_1) __P((void *, bus_space_handle_t, 156 bus_size_t, const u_int8_t *, bus_size_t)); 157 void __C(CHIP,_mem_write_multi_2) __P((void *, bus_space_handle_t, 158 bus_size_t, const u_int16_t *, bus_size_t)); 159 void __C(CHIP,_mem_write_multi_4) __P((void *, bus_space_handle_t, 160 bus_size_t, const u_int32_t *, bus_size_t)); 161 void __C(CHIP,_mem_write_multi_8) __P((void *, bus_space_handle_t, 162 bus_size_t, const u_int64_t *, bus_size_t)); 163 164 /* write region */ 165 void __C(CHIP,_mem_write_region_1) __P((void *, bus_space_handle_t, 166 bus_size_t, const u_int8_t *, bus_size_t)); 167 void __C(CHIP,_mem_write_region_2) __P((void *, bus_space_handle_t, 168 bus_size_t, const u_int16_t *, bus_size_t)); 169 void __C(CHIP,_mem_write_region_4) __P((void *, bus_space_handle_t, 170 bus_size_t, const u_int32_t *, bus_size_t)); 171 void __C(CHIP,_mem_write_region_8) __P((void *, bus_space_handle_t, 172 bus_size_t, const u_int64_t *, bus_size_t)); 173 174 /* set multiple */ 175 void __C(CHIP,_mem_set_multi_1) __P((void *, bus_space_handle_t, 176 bus_size_t, u_int8_t, bus_size_t)); 177 void __C(CHIP,_mem_set_multi_2) __P((void *, bus_space_handle_t, 178 bus_size_t, u_int16_t, bus_size_t)); 179 void __C(CHIP,_mem_set_multi_4) __P((void *, bus_space_handle_t, 180 bus_size_t, u_int32_t, bus_size_t)); 181 void __C(CHIP,_mem_set_multi_8) __P((void *, bus_space_handle_t, 182 bus_size_t, u_int64_t, bus_size_t)); 183 184 /* set region */ 185 void __C(CHIP,_mem_set_region_1) __P((void *, bus_space_handle_t, 186 bus_size_t, u_int8_t, bus_size_t)); 187 void __C(CHIP,_mem_set_region_2) __P((void *, bus_space_handle_t, 188 bus_size_t, u_int16_t, bus_size_t)); 189 void __C(CHIP,_mem_set_region_4) __P((void *, bus_space_handle_t, 190 bus_size_t, u_int32_t, bus_size_t)); 191 void __C(CHIP,_mem_set_region_8) __P((void *, bus_space_handle_t, 192 bus_size_t, u_int64_t, bus_size_t)); 193 194 /* copy */ 195 void __C(CHIP,_mem_copy_region_1) __P((void *, bus_space_handle_t, 196 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 197 void __C(CHIP,_mem_copy_region_2) __P((void *, bus_space_handle_t, 198 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 199 void __C(CHIP,_mem_copy_region_4) __P((void *, bus_space_handle_t, 200 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 201 void __C(CHIP,_mem_copy_region_8) __P((void *, bus_space_handle_t, 202 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 203 204 #ifndef CHIP_MEM_EX_STORE 205 static long 206 __C(CHIP,_mem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 207 #define CHIP_MEM_EX_STORE(v) (__C(CHIP,_mem_ex_storage)) 208 #define CHIP_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_mem_ex_storage)) 209 #endif 210 211 void 212 __C(CHIP,_bus_mem_init)(t, v) 213 bus_space_tag_t t; 214 void *v; 215 { 216 struct extent *ex; 217 218 /* 219 * Initialize the bus space tag. 220 */ 221 222 /* cookie */ 223 t->abs_cookie = v; 224 225 /* mapping/unmapping */ 226 t->abs_map = __C(CHIP,_mem_map); 227 t->abs_unmap = __C(CHIP,_mem_unmap); 228 t->abs_subregion = __C(CHIP,_mem_subregion); 229 230 t->abs_translate = __C(CHIP,_mem_translate); 231 232 /* allocation/deallocation */ 233 t->abs_alloc = __C(CHIP,_mem_alloc); 234 t->abs_free = __C(CHIP,_mem_free); 235 236 /* barrier */ 237 t->abs_barrier = __C(CHIP,_mem_barrier); 238 239 /* read (single) */ 240 t->abs_r_1 = __C(CHIP,_mem_read_1); 241 t->abs_r_2 = __C(CHIP,_mem_read_2); 242 t->abs_r_4 = __C(CHIP,_mem_read_4); 243 t->abs_r_8 = __C(CHIP,_mem_read_8); 244 245 /* read multiple */ 246 t->abs_rm_1 = __C(CHIP,_mem_read_multi_1); 247 t->abs_rm_2 = __C(CHIP,_mem_read_multi_2); 248 t->abs_rm_4 = __C(CHIP,_mem_read_multi_4); 249 t->abs_rm_8 = __C(CHIP,_mem_read_multi_8); 250 251 /* read region */ 252 t->abs_rr_1 = __C(CHIP,_mem_read_region_1); 253 t->abs_rr_2 = __C(CHIP,_mem_read_region_2); 254 t->abs_rr_4 = __C(CHIP,_mem_read_region_4); 255 t->abs_rr_8 = __C(CHIP,_mem_read_region_8); 256 257 /* write (single) */ 258 t->abs_w_1 = __C(CHIP,_mem_write_1); 259 t->abs_w_2 = __C(CHIP,_mem_write_2); 260 t->abs_w_4 = __C(CHIP,_mem_write_4); 261 t->abs_w_8 = __C(CHIP,_mem_write_8); 262 263 /* write multiple */ 264 t->abs_wm_1 = __C(CHIP,_mem_write_multi_1); 265 t->abs_wm_2 = __C(CHIP,_mem_write_multi_2); 266 t->abs_wm_4 = __C(CHIP,_mem_write_multi_4); 267 t->abs_wm_8 = __C(CHIP,_mem_write_multi_8); 268 269 /* write region */ 270 t->abs_wr_1 = __C(CHIP,_mem_write_region_1); 271 t->abs_wr_2 = __C(CHIP,_mem_write_region_2); 272 t->abs_wr_4 = __C(CHIP,_mem_write_region_4); 273 t->abs_wr_8 = __C(CHIP,_mem_write_region_8); 274 275 /* set multiple */ 276 t->abs_sm_1 = __C(CHIP,_mem_set_multi_1); 277 t->abs_sm_2 = __C(CHIP,_mem_set_multi_2); 278 t->abs_sm_4 = __C(CHIP,_mem_set_multi_4); 279 t->abs_sm_8 = __C(CHIP,_mem_set_multi_8); 280 281 /* set region */ 282 t->abs_sr_1 = __C(CHIP,_mem_set_region_1); 283 t->abs_sr_2 = __C(CHIP,_mem_set_region_2); 284 t->abs_sr_4 = __C(CHIP,_mem_set_region_4); 285 t->abs_sr_8 = __C(CHIP,_mem_set_region_8); 286 287 /* copy */ 288 t->abs_c_1 = __C(CHIP,_mem_copy_region_1); 289 t->abs_c_2 = __C(CHIP,_mem_copy_region_2); 290 t->abs_c_4 = __C(CHIP,_mem_copy_region_4); 291 t->abs_c_8 = __C(CHIP,_mem_copy_region_8); 292 293 ex = extent_create(__S(__C(CHIP,_bus_mem)), 0x0UL, 0xffffffffUL, 294 M_DEVBUF, (caddr_t)CHIP_MEM_EX_STORE(v), CHIP_MEM_EX_STORE_SIZE(v), 295 EX_NOWAIT|EX_NOCOALESCE); 296 297 CHIP_MEM_EXTENT(v) = ex; 298 } 299 300 int 301 __C(CHIP,_mem_translate)(v, memaddr, memlen, flags, abst) 302 void *v; 303 bus_addr_t memaddr; 304 bus_size_t memlen; 305 int flags; 306 struct alpha_bus_space_translation *abst; 307 { 308 309 /* XXX */ 310 return (EOPNOTSUPP); 311 } 312 313 int 314 __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct) 315 void *v; 316 bus_addr_t memaddr; 317 bus_size_t memsize; 318 int flags; 319 bus_space_handle_t *memhp; 320 int acct; 321 { 322 int prefetchable = flags & BUS_SPACE_MAP_PREFETCHABLE; 323 int linear = flags & BUS_SPACE_MAP_LINEAR; 324 int error; 325 326 /* Requests for linear unprefetchable space can't be satisfied. */ 327 if (linear && !prefetchable) 328 return (EOPNOTSUPP); 329 330 if (acct == 0) 331 goto mapit; 332 333 #ifdef EXTENT_DEBUG 334 printf("mem: allocating 0x%lx to 0x%lx\n", memaddr, 335 memaddr + memsize - 1); 336 #endif 337 error = extent_alloc_region(CHIP_MEM_EXTENT(v), memaddr, memsize, 338 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 339 if (error) { 340 #ifdef EXTENT_DEBUG 341 printf("mem: allocation failed (%d)\n", error); 342 extent_print(CHIP_MEM_EXTENT(v)); 343 #endif 344 return (error); 345 } 346 347 mapit: 348 *memhp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr; 349 350 return (0); 351 } 352 353 void 354 __C(CHIP,_mem_unmap)(v, memh, memsize, acct) 355 void *v; 356 bus_space_handle_t memh; 357 bus_size_t memsize; 358 int acct; 359 { 360 bus_addr_t memaddr; 361 int error; 362 363 if (acct == 0) 364 return; 365 366 #ifdef EXTENT_DEBUG 367 printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize); 368 #endif 369 370 memaddr = memh - ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)); 371 372 #ifdef EXTENT_DEBUG 373 printf("mem: freeing 0x%lx to 0x%lx\n", memaddr, memaddr + memsize - 1); 374 #endif 375 376 error = extent_free(CHIP_MEM_EXTENT(v), memaddr, memsize, 377 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 378 if (error) { 379 printf("%s: WARNING: could not unmap 0x%lx-0x%lx (error %d)\n", 380 __S(__C(CHIP,_mem_unmap)), memaddr, memaddr + memsize - 1, 381 error); 382 #ifdef EXTENT_DEBUG 383 extent_print(CHIP_MEM_EXTENT(v)); 384 #endif 385 } 386 } 387 388 int 389 __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh) 390 void *v; 391 bus_space_handle_t memh, *nmemh; 392 bus_size_t offset, size; 393 { 394 395 *nmemh = memh + offset; 396 return (0); 397 } 398 399 int 400 __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags, 401 addrp, bshp) 402 void *v; 403 bus_addr_t rstart, rend, *addrp; 404 bus_size_t size, align, boundary; 405 int flags; 406 bus_space_handle_t *bshp; 407 { 408 int prefetchable = flags & BUS_SPACE_MAP_PREFETCHABLE; 409 int linear = flags & BUS_SPACE_MAP_LINEAR; 410 bus_addr_t memaddr; 411 int error; 412 413 /* Requests for linear unprefetchable space can't be satisfied. */ 414 if (linear && !prefetchable) 415 return (EOPNOTSUPP); 416 417 /* 418 * Do the requested allocation. 419 */ 420 #ifdef EXTENT_DEBUG 421 printf("mem: allocating from 0x%lx to 0x%lx\n", rstart, rend); 422 #endif 423 error = extent_alloc_subregion(CHIP_MEM_EXTENT(v), rstart, rend, 424 size, align, boundary, 425 EX_FAST | EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0), 426 &memaddr); 427 if (error) { 428 #ifdef EXTENT_DEBUG 429 printf("mem: allocation failed (%d)\n", error); 430 extent_print(CHIP_MEM_EXTENT(v)); 431 #endif 432 } 433 434 #ifdef EXTENT_DEBUG 435 printf("mem: allocated 0x%lx to 0x%lx\n", memaddr, memaddr + size - 1); 436 #endif 437 438 *addrp = memaddr; 439 *bshp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr; 440 441 return (0); 442 } 443 444 void 445 __C(CHIP,_mem_free)(v, bsh, size) 446 void *v; 447 bus_space_handle_t bsh; 448 bus_size_t size; 449 { 450 451 /* Unmap does all we need to do. */ 452 __C(CHIP,_mem_unmap)(v, bsh, size, 1); 453 } 454 455 inline void 456 __C(CHIP,_mem_barrier)(v, h, o, l, f) 457 void *v; 458 bus_space_handle_t h; 459 bus_size_t o, l; 460 int f; 461 { 462 463 if ((f & BUS_SPACE_BARRIER_READ) != 0) 464 alpha_mb(); 465 else if ((f & BUS_SPACE_BARRIER_WRITE) != 0) 466 alpha_wmb(); 467 } 468 469 inline u_int8_t 470 __C(CHIP,_mem_read_1)(v, memh, off) 471 void *v; 472 bus_space_handle_t memh; 473 bus_size_t off; 474 { 475 bus_addr_t addr; 476 477 addr = memh + off; 478 alpha_mb(); 479 return (alpha_ldbu((u_int8_t *)addr)); 480 } 481 482 inline u_int16_t 483 __C(CHIP,_mem_read_2)(v, memh, off) 484 void *v; 485 bus_space_handle_t memh; 486 bus_size_t off; 487 { 488 bus_addr_t addr; 489 490 addr = memh + off; 491 #ifdef DIAGNOSTIC 492 if (addr & 1) 493 panic(__S(__C(CHIP,_mem_read_2)) ": addr 0x%lx not aligned", 494 addr); 495 #endif 496 alpha_mb(); 497 return (alpha_ldwu((u_int16_t *)addr)); 498 } 499 500 inline u_int32_t 501 __C(CHIP,_mem_read_4)(v, memh, off) 502 void *v; 503 bus_space_handle_t memh; 504 bus_size_t off; 505 { 506 bus_addr_t addr; 507 508 addr = memh + off; 509 #ifdef DIAGNOSTIC 510 if (addr & 3) 511 panic(__S(__C(CHIP,_mem_read_4)) ": addr 0x%lx not aligned", 512 addr); 513 #endif 514 alpha_mb(); 515 return (*(u_int32_t *)addr); 516 } 517 518 inline u_int64_t 519 __C(CHIP,_mem_read_8)(v, memh, off) 520 void *v; 521 bus_space_handle_t memh; 522 bus_size_t off; 523 { 524 525 alpha_mb(); 526 527 /* XXX XXX XXX */ 528 panic("%s not implemented", __S(__C(CHIP,_mem_read_8))); 529 } 530 531 #define CHIP_mem_read_multi_N(BYTES,TYPE) \ 532 void \ 533 __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \ 534 void *v; \ 535 bus_space_handle_t h; \ 536 bus_size_t o, c; \ 537 TYPE *a; \ 538 { \ 539 \ 540 while (c-- > 0) { \ 541 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 542 BUS_SPACE_BARRIER_READ); \ 543 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 544 } \ 545 } 546 CHIP_mem_read_multi_N(1,u_int8_t) 547 CHIP_mem_read_multi_N(2,u_int16_t) 548 CHIP_mem_read_multi_N(4,u_int32_t) 549 CHIP_mem_read_multi_N(8,u_int64_t) 550 551 #define CHIP_mem_read_region_N(BYTES,TYPE) \ 552 void \ 553 __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \ 554 void *v; \ 555 bus_space_handle_t h; \ 556 bus_size_t o, c; \ 557 TYPE *a; \ 558 { \ 559 \ 560 while (c-- > 0) { \ 561 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 562 o += sizeof *a; \ 563 } \ 564 } 565 CHIP_mem_read_region_N(1,u_int8_t) 566 CHIP_mem_read_region_N(2,u_int16_t) 567 CHIP_mem_read_region_N(4,u_int32_t) 568 CHIP_mem_read_region_N(8,u_int64_t) 569 570 inline void 571 __C(CHIP,_mem_write_1)(v, memh, off, val) 572 void *v; 573 bus_space_handle_t memh; 574 bus_size_t off; 575 u_int8_t val; 576 { 577 bus_addr_t addr; 578 579 addr = memh + off; 580 alpha_stb((u_int8_t *)addr, val); 581 alpha_mb(); 582 } 583 584 inline void 585 __C(CHIP,_mem_write_2)(v, memh, off, val) 586 void *v; 587 bus_space_handle_t memh; 588 bus_size_t off; 589 u_int16_t val; 590 { 591 bus_addr_t addr; 592 593 addr = memh + off; 594 #ifdef DIAGNOSTIC 595 if (addr & 1) 596 panic(__S(__C(CHIP,_mem_write_2)) ": addr 0x%lx not aligned", 597 addr); 598 #endif 599 alpha_stw((u_int16_t *)addr, val); 600 alpha_mb(); 601 } 602 603 inline void 604 __C(CHIP,_mem_write_4)(v, memh, off, val) 605 void *v; 606 bus_space_handle_t memh; 607 bus_size_t off; 608 u_int32_t val; 609 { 610 bus_addr_t addr; 611 612 addr = memh + off; 613 #ifdef DIAGNOSTIC 614 if (addr & 3) 615 panic(__S(__C(CHIP,_mem_write_4)) ": addr 0x%lx not aligned", 616 addr); 617 #endif 618 *(u_int32_t *)addr = val; 619 alpha_mb(); 620 } 621 622 inline void 623 __C(CHIP,_mem_write_8)(v, memh, off, val) 624 void *v; 625 bus_space_handle_t memh; 626 bus_size_t off; 627 u_int64_t val; 628 { 629 630 /* XXX XXX XXX */ 631 panic("%s not implemented", __S(__C(CHIP,_mem_write_8))); 632 alpha_mb(); 633 } 634 635 #define CHIP_mem_write_multi_N(BYTES,TYPE) \ 636 void \ 637 __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \ 638 void *v; \ 639 bus_space_handle_t h; \ 640 bus_size_t o, c; \ 641 const TYPE *a; \ 642 { \ 643 \ 644 while (c-- > 0) { \ 645 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 646 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 647 BUS_SPACE_BARRIER_WRITE); \ 648 } \ 649 } 650 CHIP_mem_write_multi_N(1,u_int8_t) 651 CHIP_mem_write_multi_N(2,u_int16_t) 652 CHIP_mem_write_multi_N(4,u_int32_t) 653 CHIP_mem_write_multi_N(8,u_int64_t) 654 655 #define CHIP_mem_write_region_N(BYTES,TYPE) \ 656 void \ 657 __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \ 658 void *v; \ 659 bus_space_handle_t h; \ 660 bus_size_t o, c; \ 661 const TYPE *a; \ 662 { \ 663 \ 664 while (c-- > 0) { \ 665 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 666 o += sizeof *a; \ 667 } \ 668 } 669 CHIP_mem_write_region_N(1,u_int8_t) 670 CHIP_mem_write_region_N(2,u_int16_t) 671 CHIP_mem_write_region_N(4,u_int32_t) 672 CHIP_mem_write_region_N(8,u_int64_t) 673 674 #define CHIP_mem_set_multi_N(BYTES,TYPE) \ 675 void \ 676 __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \ 677 void *v; \ 678 bus_space_handle_t h; \ 679 bus_size_t o, c; \ 680 TYPE val; \ 681 { \ 682 \ 683 while (c-- > 0) { \ 684 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 685 __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \ 686 BUS_SPACE_BARRIER_WRITE); \ 687 } \ 688 } 689 CHIP_mem_set_multi_N(1,u_int8_t) 690 CHIP_mem_set_multi_N(2,u_int16_t) 691 CHIP_mem_set_multi_N(4,u_int32_t) 692 CHIP_mem_set_multi_N(8,u_int64_t) 693 694 #define CHIP_mem_set_region_N(BYTES,TYPE) \ 695 void \ 696 __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \ 697 void *v; \ 698 bus_space_handle_t h; \ 699 bus_size_t o, c; \ 700 TYPE val; \ 701 { \ 702 \ 703 while (c-- > 0) { \ 704 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 705 o += sizeof val; \ 706 } \ 707 } 708 CHIP_mem_set_region_N(1,u_int8_t) 709 CHIP_mem_set_region_N(2,u_int16_t) 710 CHIP_mem_set_region_N(4,u_int32_t) 711 CHIP_mem_set_region_N(8,u_int64_t) 712 713 #define CHIP_mem_copy_region_N(BYTES) \ 714 void \ 715 __C(__C(CHIP,_mem_copy_region_),BYTES)(v, h1, o1, h2, o2, c) \ 716 void *v; \ 717 bus_space_handle_t h1, h2; \ 718 bus_size_t o1, o2, c; \ 719 { \ 720 bus_size_t o; \ 721 \ 722 if ((h1 + o1) >= (h2 + o2)) { \ 723 /* src after dest: copy forward */ \ 724 for (o = 0; c != 0; c--, o += BYTES) { \ 725 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 726 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 727 } \ 728 } else { \ 729 /* dest after src: copy backwards */ \ 730 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) { \ 731 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 732 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 733 } \ 734 } \ 735 } 736 CHIP_mem_copy_region_N(1) 737 CHIP_mem_copy_region_N(2) 738 CHIP_mem_copy_region_N(4) 739 CHIP_mem_copy_region_N(8) 740
Indexes created Tue Oct 28 12:10:06 GMT 2025