pci_bwx_bus_mem_chipdep.c revision 1.9
1 /* $NetBSD: pci_bwx_bus_mem_chipdep.c,v 1.9 2000/02/26 18:53:13 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 /* 68 * Common PCI Chipset "bus I/O" functions, for chipsets which have to 69 * deal with only a single PCI interface chip in a machine. 70 * 71 * uses: 72 * CHIP name of the 'chip' it's being compiled for. 73 * CHIP_MEM_BASE Mem space base to use. 74 * CHIP_MEM_EX_STORE 75 * If defined, device-provided static storage area 76 * for the memory space extent. If this is 77 * defined, CHIP_MEM_EX_STORE_SIZE must also be 78 * defined. If this is not defined, a static area 79 * will be declared. 80 * CHIP_MEM_EX_STORE_SIZE 81 * Size of the device-provided static storage area 82 * for the memory space extent. 83 */ 84 85 #include <sys/extent.h> 86 87 #include <machine/bwx.h> 88 89 #define __C(A,B) __CONCAT(A,B) 90 #define __S(S) __STRING(S) 91 92 /* mapping/unmapping */ 93 int __C(CHIP,_mem_map) __P((void *, bus_addr_t, bus_size_t, int, 94 bus_space_handle_t *, int)); 95 void __C(CHIP,_mem_unmap) __P((void *, bus_space_handle_t, 96 bus_size_t, int)); 97 int __C(CHIP,_mem_subregion) __P((void *, bus_space_handle_t, 98 bus_size_t, bus_size_t, bus_space_handle_t *)); 99 100 int __C(CHIP,_mem_translate) __P((void *, bus_addr_t, bus_size_t, 101 int, struct alpha_bus_space_translation *)); 102 int __C(CHIP,_mem_get_window) __P((void *, int, 103 struct alpha_bus_space_translation *)); 104 105 /* allocation/deallocation */ 106 int __C(CHIP,_mem_alloc) __P((void *, bus_addr_t, bus_addr_t, 107 bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *, 108 bus_space_handle_t *)); 109 void __C(CHIP,_mem_free) __P((void *, bus_space_handle_t, 110 bus_size_t)); 111 112 /* barrier */ 113 inline void __C(CHIP,_mem_barrier) __P((void *, bus_space_handle_t, 114 bus_size_t, bus_size_t, int)); 115 116 /* read (single) */ 117 inline u_int8_t __C(CHIP,_mem_read_1) __P((void *, bus_space_handle_t, 118 bus_size_t)); 119 inline u_int16_t __C(CHIP,_mem_read_2) __P((void *, bus_space_handle_t, 120 bus_size_t)); 121 inline u_int32_t __C(CHIP,_mem_read_4) __P((void *, bus_space_handle_t, 122 bus_size_t)); 123 inline u_int64_t __C(CHIP,_mem_read_8) __P((void *, bus_space_handle_t, 124 bus_size_t)); 125 126 /* read multiple */ 127 void __C(CHIP,_mem_read_multi_1) __P((void *, bus_space_handle_t, 128 bus_size_t, u_int8_t *, bus_size_t)); 129 void __C(CHIP,_mem_read_multi_2) __P((void *, bus_space_handle_t, 130 bus_size_t, u_int16_t *, bus_size_t)); 131 void __C(CHIP,_mem_read_multi_4) __P((void *, bus_space_handle_t, 132 bus_size_t, u_int32_t *, bus_size_t)); 133 void __C(CHIP,_mem_read_multi_8) __P((void *, bus_space_handle_t, 134 bus_size_t, u_int64_t *, bus_size_t)); 135 136 /* read region */ 137 void __C(CHIP,_mem_read_region_1) __P((void *, bus_space_handle_t, 138 bus_size_t, u_int8_t *, bus_size_t)); 139 void __C(CHIP,_mem_read_region_2) __P((void *, bus_space_handle_t, 140 bus_size_t, u_int16_t *, bus_size_t)); 141 void __C(CHIP,_mem_read_region_4) __P((void *, bus_space_handle_t, 142 bus_size_t, u_int32_t *, bus_size_t)); 143 void __C(CHIP,_mem_read_region_8) __P((void *, bus_space_handle_t, 144 bus_size_t, u_int64_t *, bus_size_t)); 145 146 /* write (single) */ 147 inline void __C(CHIP,_mem_write_1) __P((void *, bus_space_handle_t, 148 bus_size_t, u_int8_t)); 149 inline void __C(CHIP,_mem_write_2) __P((void *, bus_space_handle_t, 150 bus_size_t, u_int16_t)); 151 inline void __C(CHIP,_mem_write_4) __P((void *, bus_space_handle_t, 152 bus_size_t, u_int32_t)); 153 inline void __C(CHIP,_mem_write_8) __P((void *, bus_space_handle_t, 154 bus_size_t, u_int64_t)); 155 156 /* write multiple */ 157 void __C(CHIP,_mem_write_multi_1) __P((void *, bus_space_handle_t, 158 bus_size_t, const u_int8_t *, bus_size_t)); 159 void __C(CHIP,_mem_write_multi_2) __P((void *, bus_space_handle_t, 160 bus_size_t, const u_int16_t *, bus_size_t)); 161 void __C(CHIP,_mem_write_multi_4) __P((void *, bus_space_handle_t, 162 bus_size_t, const u_int32_t *, bus_size_t)); 163 void __C(CHIP,_mem_write_multi_8) __P((void *, bus_space_handle_t, 164 bus_size_t, const u_int64_t *, bus_size_t)); 165 166 /* write region */ 167 void __C(CHIP,_mem_write_region_1) __P((void *, bus_space_handle_t, 168 bus_size_t, const u_int8_t *, bus_size_t)); 169 void __C(CHIP,_mem_write_region_2) __P((void *, bus_space_handle_t, 170 bus_size_t, const u_int16_t *, bus_size_t)); 171 void __C(CHIP,_mem_write_region_4) __P((void *, bus_space_handle_t, 172 bus_size_t, const u_int32_t *, bus_size_t)); 173 void __C(CHIP,_mem_write_region_8) __P((void *, bus_space_handle_t, 174 bus_size_t, const u_int64_t *, bus_size_t)); 175 176 /* set multiple */ 177 void __C(CHIP,_mem_set_multi_1) __P((void *, bus_space_handle_t, 178 bus_size_t, u_int8_t, bus_size_t)); 179 void __C(CHIP,_mem_set_multi_2) __P((void *, bus_space_handle_t, 180 bus_size_t, u_int16_t, bus_size_t)); 181 void __C(CHIP,_mem_set_multi_4) __P((void *, bus_space_handle_t, 182 bus_size_t, u_int32_t, bus_size_t)); 183 void __C(CHIP,_mem_set_multi_8) __P((void *, bus_space_handle_t, 184 bus_size_t, u_int64_t, bus_size_t)); 185 186 /* set region */ 187 void __C(CHIP,_mem_set_region_1) __P((void *, bus_space_handle_t, 188 bus_size_t, u_int8_t, bus_size_t)); 189 void __C(CHIP,_mem_set_region_2) __P((void *, bus_space_handle_t, 190 bus_size_t, u_int16_t, bus_size_t)); 191 void __C(CHIP,_mem_set_region_4) __P((void *, bus_space_handle_t, 192 bus_size_t, u_int32_t, bus_size_t)); 193 void __C(CHIP,_mem_set_region_8) __P((void *, bus_space_handle_t, 194 bus_size_t, u_int64_t, bus_size_t)); 195 196 /* copy */ 197 void __C(CHIP,_mem_copy_region_1) __P((void *, bus_space_handle_t, 198 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 199 void __C(CHIP,_mem_copy_region_2) __P((void *, bus_space_handle_t, 200 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 201 void __C(CHIP,_mem_copy_region_4) __P((void *, bus_space_handle_t, 202 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 203 void __C(CHIP,_mem_copy_region_8) __P((void *, bus_space_handle_t, 204 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t)); 205 206 #ifndef CHIP_MEM_EX_STORE 207 static long 208 __C(CHIP,_mem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 209 #define CHIP_MEM_EX_STORE(v) (__C(CHIP,_mem_ex_storage)) 210 #define CHIP_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_mem_ex_storage)) 211 #endif 212 213 void 214 __C(CHIP,_bus_mem_init)(t, v) 215 bus_space_tag_t t; 216 void *v; 217 { 218 struct extent *ex; 219 220 /* 221 * Initialize the bus space tag. 222 */ 223 224 /* cookie */ 225 t->abs_cookie = v; 226 227 /* mapping/unmapping */ 228 t->abs_map = __C(CHIP,_mem_map); 229 t->abs_unmap = __C(CHIP,_mem_unmap); 230 t->abs_subregion = __C(CHIP,_mem_subregion); 231 232 t->abs_translate = __C(CHIP,_mem_translate); 233 t->abs_get_window = __C(CHIP,_mem_get_window); 234 235 /* allocation/deallocation */ 236 t->abs_alloc = __C(CHIP,_mem_alloc); 237 t->abs_free = __C(CHIP,_mem_free); 238 239 /* barrier */ 240 t->abs_barrier = __C(CHIP,_mem_barrier); 241 242 /* read (single) */ 243 t->abs_r_1 = __C(CHIP,_mem_read_1); 244 t->abs_r_2 = __C(CHIP,_mem_read_2); 245 t->abs_r_4 = __C(CHIP,_mem_read_4); 246 t->abs_r_8 = __C(CHIP,_mem_read_8); 247 248 /* read multiple */ 249 t->abs_rm_1 = __C(CHIP,_mem_read_multi_1); 250 t->abs_rm_2 = __C(CHIP,_mem_read_multi_2); 251 t->abs_rm_4 = __C(CHIP,_mem_read_multi_4); 252 t->abs_rm_8 = __C(CHIP,_mem_read_multi_8); 253 254 /* read region */ 255 t->abs_rr_1 = __C(CHIP,_mem_read_region_1); 256 t->abs_rr_2 = __C(CHIP,_mem_read_region_2); 257 t->abs_rr_4 = __C(CHIP,_mem_read_region_4); 258 t->abs_rr_8 = __C(CHIP,_mem_read_region_8); 259 260 /* write (single) */ 261 t->abs_w_1 = __C(CHIP,_mem_write_1); 262 t->abs_w_2 = __C(CHIP,_mem_write_2); 263 t->abs_w_4 = __C(CHIP,_mem_write_4); 264 t->abs_w_8 = __C(CHIP,_mem_write_8); 265 266 /* write multiple */ 267 t->abs_wm_1 = __C(CHIP,_mem_write_multi_1); 268 t->abs_wm_2 = __C(CHIP,_mem_write_multi_2); 269 t->abs_wm_4 = __C(CHIP,_mem_write_multi_4); 270 t->abs_wm_8 = __C(CHIP,_mem_write_multi_8); 271 272 /* write region */ 273 t->abs_wr_1 = __C(CHIP,_mem_write_region_1); 274 t->abs_wr_2 = __C(CHIP,_mem_write_region_2); 275 t->abs_wr_4 = __C(CHIP,_mem_write_region_4); 276 t->abs_wr_8 = __C(CHIP,_mem_write_region_8); 277 278 /* set multiple */ 279 t->abs_sm_1 = __C(CHIP,_mem_set_multi_1); 280 t->abs_sm_2 = __C(CHIP,_mem_set_multi_2); 281 t->abs_sm_4 = __C(CHIP,_mem_set_multi_4); 282 t->abs_sm_8 = __C(CHIP,_mem_set_multi_8); 283 284 /* set region */ 285 t->abs_sr_1 = __C(CHIP,_mem_set_region_1); 286 t->abs_sr_2 = __C(CHIP,_mem_set_region_2); 287 t->abs_sr_4 = __C(CHIP,_mem_set_region_4); 288 t->abs_sr_8 = __C(CHIP,_mem_set_region_8); 289 290 /* copy */ 291 t->abs_c_1 = __C(CHIP,_mem_copy_region_1); 292 t->abs_c_2 = __C(CHIP,_mem_copy_region_2); 293 t->abs_c_4 = __C(CHIP,_mem_copy_region_4); 294 t->abs_c_8 = __C(CHIP,_mem_copy_region_8); 295 296 ex = extent_create(__S(__C(CHIP,_bus_mem)), 0x0UL, 0xffffffffUL, 297 M_DEVBUF, (caddr_t)CHIP_MEM_EX_STORE(v), CHIP_MEM_EX_STORE_SIZE(v), 298 EX_NOWAIT|EX_NOCOALESCE); 299 300 CHIP_MEM_EXTENT(v) = ex; 301 } 302 303 int 304 __C(CHIP,_mem_translate)(v, memaddr, memlen, flags, abst) 305 void *v; 306 bus_addr_t memaddr; 307 bus_size_t memlen; 308 int flags; 309 struct alpha_bus_space_translation *abst; 310 { 311 312 /* XXX */ 313 return (EOPNOTSUPP); 314 } 315 316 int 317 __C(CHIP,_mem_get_window)(v, window, abst) 318 void *v; 319 int window; 320 struct alpha_bus_space_translation *abst; 321 { 322 323 switch (window) { 324 case 0: 325 abst->abst_bus_start = 0; 326 abst->abst_bus_end = 0xffffffffUL; 327 abst->abst_sys_start = CHIP_MEM_SYS_START(v); 328 abst->abst_sys_end = CHIP_MEM_SYS_START(v) + abst->abst_bus_end; 329 abst->abst_addr_shift = 0; 330 abst->abst_size_shift = 0; 331 abst->abst_flags = ABST_DENSE|ABST_BWX; 332 break; 333 334 default: 335 panic(__S(__C(CHIP,_mem_get_window)) ": invalid window %d", 336 window); 337 } 338 339 return (0); 340 } 341 342 int 343 __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct) 344 void *v; 345 bus_addr_t memaddr; 346 bus_size_t memsize; 347 int flags; 348 bus_space_handle_t *memhp; 349 int acct; 350 { 351 int prefetchable = flags & BUS_SPACE_MAP_PREFETCHABLE; 352 int linear = flags & BUS_SPACE_MAP_LINEAR; 353 int error; 354 355 /* Requests for linear unprefetchable space can't be satisfied. */ 356 if (linear && !prefetchable) 357 return (EOPNOTSUPP); 358 359 if (acct == 0) 360 goto mapit; 361 362 #ifdef EXTENT_DEBUG 363 printf("mem: allocating 0x%lx to 0x%lx\n", memaddr, 364 memaddr + memsize - 1); 365 #endif 366 error = extent_alloc_region(CHIP_MEM_EXTENT(v), memaddr, memsize, 367 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 368 if (error) { 369 #ifdef EXTENT_DEBUG 370 printf("mem: allocation failed (%d)\n", error); 371 extent_print(CHIP_MEM_EXTENT(v)); 372 #endif 373 return (error); 374 } 375 376 mapit: 377 *memhp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr; 378 379 return (0); 380 } 381 382 void 383 __C(CHIP,_mem_unmap)(v, memh, memsize, acct) 384 void *v; 385 bus_space_handle_t memh; 386 bus_size_t memsize; 387 int acct; 388 { 389 bus_addr_t memaddr; 390 int error; 391 392 if (acct == 0) 393 return; 394 395 #ifdef EXTENT_DEBUG 396 printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize); 397 #endif 398 399 memaddr = memh - ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)); 400 401 #ifdef EXTENT_DEBUG 402 printf("mem: freeing 0x%lx to 0x%lx\n", memaddr, memaddr + memsize - 1); 403 #endif 404 405 error = extent_free(CHIP_MEM_EXTENT(v), memaddr, memsize, 406 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 407 if (error) { 408 printf("%s: WARNING: could not unmap 0x%lx-0x%lx (error %d)\n", 409 __S(__C(CHIP,_mem_unmap)), memaddr, memaddr + memsize - 1, 410 error); 411 #ifdef EXTENT_DEBUG 412 extent_print(CHIP_MEM_EXTENT(v)); 413 #endif 414 } 415 } 416 417 int 418 __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh) 419 void *v; 420 bus_space_handle_t memh, *nmemh; 421 bus_size_t offset, size; 422 { 423 424 *nmemh = memh + offset; 425 return (0); 426 } 427 428 int 429 __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags, 430 addrp, bshp) 431 void *v; 432 bus_addr_t rstart, rend, *addrp; 433 bus_size_t size, align, boundary; 434 int flags; 435 bus_space_handle_t *bshp; 436 { 437 int prefetchable = flags & BUS_SPACE_MAP_PREFETCHABLE; 438 int linear = flags & BUS_SPACE_MAP_LINEAR; 439 bus_addr_t memaddr; 440 int error; 441 442 /* Requests for linear unprefetchable space can't be satisfied. */ 443 if (linear && !prefetchable) 444 return (EOPNOTSUPP); 445 446 /* 447 * Do the requested allocation. 448 */ 449 #ifdef EXTENT_DEBUG 450 printf("mem: allocating from 0x%lx to 0x%lx\n", rstart, rend); 451 #endif 452 error = extent_alloc_subregion(CHIP_MEM_EXTENT(v), rstart, rend, 453 size, align, boundary, 454 EX_FAST | EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0), 455 &memaddr); 456 if (error) { 457 #ifdef EXTENT_DEBUG 458 printf("mem: allocation failed (%d)\n", error); 459 extent_print(CHIP_MEM_EXTENT(v)); 460 #endif 461 } 462 463 #ifdef EXTENT_DEBUG 464 printf("mem: allocated 0x%lx to 0x%lx\n", memaddr, memaddr + size - 1); 465 #endif 466 467 *addrp = memaddr; 468 *bshp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr; 469 470 return (0); 471 } 472 473 void 474 __C(CHIP,_mem_free)(v, bsh, size) 475 void *v; 476 bus_space_handle_t bsh; 477 bus_size_t size; 478 { 479 480 /* Unmap does all we need to do. */ 481 __C(CHIP,_mem_unmap)(v, bsh, size, 1); 482 } 483 484 inline void 485 __C(CHIP,_mem_barrier)(v, h, o, l, f) 486 void *v; 487 bus_space_handle_t h; 488 bus_size_t o, l; 489 int f; 490 { 491 492 if ((f & BUS_SPACE_BARRIER_READ) != 0) 493 alpha_mb(); 494 else if ((f & BUS_SPACE_BARRIER_WRITE) != 0) 495 alpha_wmb(); 496 } 497 498 inline u_int8_t 499 __C(CHIP,_mem_read_1)(v, memh, off) 500 void *v; 501 bus_space_handle_t memh; 502 bus_size_t off; 503 { 504 bus_addr_t addr; 505 506 addr = memh + off; 507 alpha_mb(); 508 return (alpha_ldbu((u_int8_t *)addr)); 509 } 510 511 inline u_int16_t 512 __C(CHIP,_mem_read_2)(v, memh, off) 513 void *v; 514 bus_space_handle_t memh; 515 bus_size_t off; 516 { 517 bus_addr_t addr; 518 519 addr = memh + off; 520 #ifdef DIAGNOSTIC 521 if (addr & 1) 522 panic(__S(__C(CHIP,_mem_read_2)) ": addr 0x%lx not aligned", 523 addr); 524 #endif 525 alpha_mb(); 526 return (alpha_ldwu((u_int16_t *)addr)); 527 } 528 529 inline u_int32_t 530 __C(CHIP,_mem_read_4)(v, memh, off) 531 void *v; 532 bus_space_handle_t memh; 533 bus_size_t off; 534 { 535 bus_addr_t addr; 536 537 addr = memh + off; 538 #ifdef DIAGNOSTIC 539 if (addr & 3) 540 panic(__S(__C(CHIP,_mem_read_4)) ": addr 0x%lx not aligned", 541 addr); 542 #endif 543 alpha_mb(); 544 return (*(u_int32_t *)addr); 545 } 546 547 inline u_int64_t 548 __C(CHIP,_mem_read_8)(v, memh, off) 549 void *v; 550 bus_space_handle_t memh; 551 bus_size_t off; 552 { 553 554 alpha_mb(); 555 556 /* XXX XXX XXX */ 557 panic("%s not implemented", __S(__C(CHIP,_mem_read_8))); 558 } 559 560 #define CHIP_mem_read_multi_N(BYTES,TYPE) \ 561 void \ 562 __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \ 563 void *v; \ 564 bus_space_handle_t h; \ 565 bus_size_t o, c; \ 566 TYPE *a; \ 567 { \ 568 \ 569 while (c-- > 0) { \ 570 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 571 BUS_SPACE_BARRIER_READ); \ 572 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 573 } \ 574 } 575 CHIP_mem_read_multi_N(1,u_int8_t) 576 CHIP_mem_read_multi_N(2,u_int16_t) 577 CHIP_mem_read_multi_N(4,u_int32_t) 578 CHIP_mem_read_multi_N(8,u_int64_t) 579 580 #define CHIP_mem_read_region_N(BYTES,TYPE) \ 581 void \ 582 __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \ 583 void *v; \ 584 bus_space_handle_t h; \ 585 bus_size_t o, c; \ 586 TYPE *a; \ 587 { \ 588 \ 589 while (c-- > 0) { \ 590 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 591 o += sizeof *a; \ 592 } \ 593 } 594 CHIP_mem_read_region_N(1,u_int8_t) 595 CHIP_mem_read_region_N(2,u_int16_t) 596 CHIP_mem_read_region_N(4,u_int32_t) 597 CHIP_mem_read_region_N(8,u_int64_t) 598 599 inline void 600 __C(CHIP,_mem_write_1)(v, memh, off, val) 601 void *v; 602 bus_space_handle_t memh; 603 bus_size_t off; 604 u_int8_t val; 605 { 606 bus_addr_t addr; 607 608 addr = memh + off; 609 alpha_stb((u_int8_t *)addr, val); 610 alpha_mb(); 611 } 612 613 inline void 614 __C(CHIP,_mem_write_2)(v, memh, off, val) 615 void *v; 616 bus_space_handle_t memh; 617 bus_size_t off; 618 u_int16_t val; 619 { 620 bus_addr_t addr; 621 622 addr = memh + off; 623 #ifdef DIAGNOSTIC 624 if (addr & 1) 625 panic(__S(__C(CHIP,_mem_write_2)) ": addr 0x%lx not aligned", 626 addr); 627 #endif 628 alpha_stw((u_int16_t *)addr, val); 629 alpha_mb(); 630 } 631 632 inline void 633 __C(CHIP,_mem_write_4)(v, memh, off, val) 634 void *v; 635 bus_space_handle_t memh; 636 bus_size_t off; 637 u_int32_t val; 638 { 639 bus_addr_t addr; 640 641 addr = memh + off; 642 #ifdef DIAGNOSTIC 643 if (addr & 3) 644 panic(__S(__C(CHIP,_mem_write_4)) ": addr 0x%lx not aligned", 645 addr); 646 #endif 647 *(u_int32_t *)addr = val; 648 alpha_mb(); 649 } 650 651 inline void 652 __C(CHIP,_mem_write_8)(v, memh, off, val) 653 void *v; 654 bus_space_handle_t memh; 655 bus_size_t off; 656 u_int64_t val; 657 { 658 659 /* XXX XXX XXX */ 660 panic("%s not implemented", __S(__C(CHIP,_mem_write_8))); 661 alpha_mb(); 662 } 663 664 #define CHIP_mem_write_multi_N(BYTES,TYPE) \ 665 void \ 666 __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \ 667 void *v; \ 668 bus_space_handle_t h; \ 669 bus_size_t o, c; \ 670 const TYPE *a; \ 671 { \ 672 \ 673 while (c-- > 0) { \ 674 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 675 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 676 BUS_SPACE_BARRIER_WRITE); \ 677 } \ 678 } 679 CHIP_mem_write_multi_N(1,u_int8_t) 680 CHIP_mem_write_multi_N(2,u_int16_t) 681 CHIP_mem_write_multi_N(4,u_int32_t) 682 CHIP_mem_write_multi_N(8,u_int64_t) 683 684 #define CHIP_mem_write_region_N(BYTES,TYPE) \ 685 void \ 686 __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \ 687 void *v; \ 688 bus_space_handle_t h; \ 689 bus_size_t o, c; \ 690 const TYPE *a; \ 691 { \ 692 \ 693 while (c-- > 0) { \ 694 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 695 o += sizeof *a; \ 696 } \ 697 } 698 CHIP_mem_write_region_N(1,u_int8_t) 699 CHIP_mem_write_region_N(2,u_int16_t) 700 CHIP_mem_write_region_N(4,u_int32_t) 701 CHIP_mem_write_region_N(8,u_int64_t) 702 703 #define CHIP_mem_set_multi_N(BYTES,TYPE) \ 704 void \ 705 __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \ 706 void *v; \ 707 bus_space_handle_t h; \ 708 bus_size_t o, c; \ 709 TYPE val; \ 710 { \ 711 \ 712 while (c-- > 0) { \ 713 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 714 __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \ 715 BUS_SPACE_BARRIER_WRITE); \ 716 } \ 717 } 718 CHIP_mem_set_multi_N(1,u_int8_t) 719 CHIP_mem_set_multi_N(2,u_int16_t) 720 CHIP_mem_set_multi_N(4,u_int32_t) 721 CHIP_mem_set_multi_N(8,u_int64_t) 722 723 #define CHIP_mem_set_region_N(BYTES,TYPE) \ 724 void \ 725 __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \ 726 void *v; \ 727 bus_space_handle_t h; \ 728 bus_size_t o, c; \ 729 TYPE val; \ 730 { \ 731 \ 732 while (c-- > 0) { \ 733 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 734 o += sizeof val; \ 735 } \ 736 } 737 CHIP_mem_set_region_N(1,u_int8_t) 738 CHIP_mem_set_region_N(2,u_int16_t) 739 CHIP_mem_set_region_N(4,u_int32_t) 740 CHIP_mem_set_region_N(8,u_int64_t) 741 742 #define CHIP_mem_copy_region_N(BYTES) \ 743 void \ 744 __C(__C(CHIP,_mem_copy_region_),BYTES)(v, h1, o1, h2, o2, c) \ 745 void *v; \ 746 bus_space_handle_t h1, h2; \ 747 bus_size_t o1, o2, c; \ 748 { \ 749 bus_size_t o; \ 750 \ 751 if ((h1 + o1) >= (h2 + o2)) { \ 752 /* src after dest: copy forward */ \ 753 for (o = 0; c != 0; c--, o += BYTES) { \ 754 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 755 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 756 } \ 757 } else { \ 758 /* dest after src: copy backwards */ \ 759 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) { \ 760 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 761 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \ 762 } \ 763 } \ 764 } 765 CHIP_mem_copy_region_N(1) 766 CHIP_mem_copy_region_N(2) 767 CHIP_mem_copy_region_N(4) 768 CHIP_mem_copy_region_N(8) 769
Indexes created Tue Oct 28 12:10:06 GMT 2025