pci_eb66.c revision 1.17 1 /* $NetBSD: pci_eb66.c,v 1.17 2009/03/14 14:45:53 dsl Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
35 * All rights reserved.
36 *
37 * Author: Chris G. Demetriou
38 *
39 * Permission to use, copy, modify and distribute this software and
40 * its documentation is hereby granted, provided that both the copyright
41 * notice and this permission notice appear in all copies of the
42 * software, derivative works or modified versions, and any portions
43 * thereof, and that both notices appear in supporting documentation.
44 *
45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
48 *
49 * Carnegie Mellon requests users of this software to return to
50 *
51 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
52 * School of Computer Science
53 * Carnegie Mellon University
54 * Pittsburgh PA 15213-3890
55 *
56 * any improvements or extensions that they make and grant Carnegie the
57 * rights to redistribute these changes.
58 */
59
60 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
61
62 __KERNEL_RCSID(0, "$NetBSD: pci_eb66.c,v 1.17 2009/03/14 14:45:53 dsl Exp $");
63
64 #include <sys/types.h>
65 #include <sys/param.h>
66 #include <sys/time.h>
67 #include <sys/systm.h>
68 #include <sys/errno.h>
69 #include <sys/malloc.h>
70 #include <sys/device.h>
71 #include <sys/syslog.h>
72
73 #include <uvm/uvm_extern.h>
74
75 #include <machine/autoconf.h>
76
77 #include <dev/pci/pcireg.h>
78 #include <dev/pci/pcivar.h>
79
80 #include <alpha/pci/lcareg.h>
81 #include <alpha/pci/lcavar.h>
82
83 #include <alpha/pci/pci_eb66.h>
84
85 #include "sio.h"
86 #if NSIO
87 #include <alpha/pci/siovar.h>
88 #endif
89
90 int dec_eb66_intr_map(struct pci_attach_args *,
91 pci_intr_handle_t *);
92 const char *dec_eb66_intr_string(void *, pci_intr_handle_t);
93 const struct evcnt *dec_eb66_intr_evcnt(void *, pci_intr_handle_t);
94 void *dec_eb66_intr_establish(void *, pci_intr_handle_t,
95 int, int (*func)(void *), void *);
96 void dec_eb66_intr_disestablish(void *, void *);
97
98 #define EB66_MAX_IRQ 32
99 #define PCI_STRAY_MAX 5
100
101 struct alpha_shared_intr *eb66_pci_intr;
102
103 bus_space_tag_t eb66_intrgate_iot;
104 bus_space_handle_t eb66_intrgate_ioh;
105
106 void eb66_iointr(void *arg, unsigned long vec);
107 extern void eb66_intr_enable(int irq); /* pci_eb66_intr.S */
108 extern void eb66_intr_disable(int irq); /* pci_eb66_intr.S */
109
110 void
111 pci_eb66_pickintr(lcp)
112 struct lca_config *lcp;
113 {
114 bus_space_tag_t iot = &lcp->lc_iot;
115 pci_chipset_tag_t pc = &lcp->lc_pc;
116 char *cp;
117 int i;
118
119 pc->pc_intr_v = lcp;
120 pc->pc_intr_map = dec_eb66_intr_map;
121 pc->pc_intr_string = dec_eb66_intr_string;
122 pc->pc_intr_evcnt = dec_eb66_intr_evcnt;
123 pc->pc_intr_establish = dec_eb66_intr_establish;
124 pc->pc_intr_disestablish = dec_eb66_intr_disestablish;
125
126 /* Not supported on the EB66. */
127 pc->pc_pciide_compat_intr_establish = NULL;
128
129 eb66_intrgate_iot = iot;
130 if (bus_space_map(eb66_intrgate_iot, 0x804, 3, 0,
131 &eb66_intrgate_ioh) != 0)
132 panic("pci_eb66_pickintr: couldn't map interrupt PLD");
133 for (i = 0; i < EB66_MAX_IRQ; i++)
134 eb66_intr_disable(i);
135
136 eb66_pci_intr = alpha_shared_intr_alloc(EB66_MAX_IRQ, 8);
137 for (i = 0; i < EB66_MAX_IRQ; i++) {
138 alpha_shared_intr_set_maxstrays(eb66_pci_intr, i,
139 PCI_STRAY_MAX);
140
141 cp = alpha_shared_intr_string(eb66_pci_intr, i);
142 sprintf(cp, "irq %d", i);
143 evcnt_attach_dynamic(alpha_shared_intr_evcnt(
144 eb66_pci_intr, i), EVCNT_TYPE_INTR, NULL,
145 "eb66", cp);
146 }
147
148 #if NSIO
149 sio_intr_setup(pc, iot);
150 #endif
151 }
152
153 int
154 dec_eb66_intr_map(pa, ihp)
155 struct pci_attach_args *pa;
156 pci_intr_handle_t *ihp;
157 {
158 pcitag_t bustag = pa->pa_intrtag;
159 int buspin = pa->pa_intrpin, line = pa->pa_intrline;
160 pci_chipset_tag_t pc = pa->pa_pc;
161 int bus, device, function;
162
163 if (buspin == 0) {
164 /* No IRQ used. */
165 return 1;
166 }
167 if (buspin > 4) {
168 printf("dec_eb66_intr_map: bad interrupt pin %d\n", buspin);
169 return 1;
170 }
171
172 pci_decompose_tag(pc, bustag, &bus, &device, &function);
173
174 /*
175 * The console places the interrupt mapping in the "line" value.
176 * A value of (char)-1 indicates there is no mapping.
177 */
178 if (line == 0xff) {
179 printf("dec_eb66_intr_map: no mapping for %d/%d/%d\n",
180 bus, device, function);
181 return (1);
182 }
183
184 if (line >= EB66_MAX_IRQ)
185 panic("dec_eb66_intr_map: eb66 irq too large (%d)",
186 line);
187
188 *ihp = line;
189 return (0);
190 }
191
192 const char *
193 dec_eb66_intr_string(lcv, ih)
194 void *lcv;
195 pci_intr_handle_t ih;
196 {
197 static char irqstr[15]; /* 11 + 2 + NULL + sanity */
198
199 if (ih >= EB66_MAX_IRQ)
200 panic("dec_eb66_intr_string: bogus eb66 IRQ 0x%lx", ih);
201 sprintf(irqstr, "eb66 irq %ld", ih);
202 return (irqstr);
203 }
204
205 const struct evcnt *
206 dec_eb66_intr_evcnt(lcv, ih)
207 void *lcv;
208 pci_intr_handle_t ih;
209 {
210
211 if (ih >= EB66_MAX_IRQ)
212 panic("dec_eb66_intr_string: bogus eb66 IRQ 0x%lx", ih);
213 return (alpha_shared_intr_evcnt(eb66_pci_intr, ih));
214 }
215
216 void *
217 dec_eb66_intr_establish(lcv, ih, level, func, arg)
218 void *lcv, *arg;
219 pci_intr_handle_t ih;
220 int level;
221 int (*func)(void *);
222 {
223 void *cookie;
224
225 if (ih >= EB66_MAX_IRQ)
226 panic("dec_eb66_intr_establish: bogus eb66 IRQ 0x%lx", ih);
227
228 cookie = alpha_shared_intr_establish(eb66_pci_intr, ih, IST_LEVEL,
229 level, func, arg, "eb66 irq");
230
231 if (cookie != NULL &&
232 alpha_shared_intr_firstactive(eb66_pci_intr, ih)) {
233 scb_set(0x900 + SCB_IDXTOVEC(ih), eb66_iointr, NULL,
234 level);
235 eb66_intr_enable(ih);
236 }
237 return (cookie);
238 }
239
240 void
241 dec_eb66_intr_disestablish(lcv, cookie)
242 void *lcv, *cookie;
243 {
244 struct alpha_shared_intrhand *ih = cookie;
245 unsigned int irq = ih->ih_num;
246 int s;
247
248 s = splhigh();
249
250 alpha_shared_intr_disestablish(eb66_pci_intr, cookie,
251 "eb66 irq");
252 if (alpha_shared_intr_isactive(eb66_pci_intr, irq) == 0) {
253 eb66_intr_disable(irq);
254 alpha_shared_intr_set_dfltsharetype(eb66_pci_intr, irq,
255 IST_NONE);
256 scb_free(0x900 + SCB_IDXTOVEC(irq));
257 }
258
259 splx(s);
260 }
261
262 void
263 eb66_iointr(arg, vec)
264 void *arg;
265 unsigned long vec;
266 {
267 int irq;
268
269 irq = SCB_VECTOIDX(vec - 0x900);
270
271 if (!alpha_shared_intr_dispatch(eb66_pci_intr, irq)) {
272 alpha_shared_intr_stray(eb66_pci_intr, irq,
273 "eb66 irq");
274 if (ALPHA_SHARED_INTR_DISABLE(eb66_pci_intr, irq))
275 eb66_intr_disable(irq);
276 } else
277 alpha_shared_intr_reset_strays(eb66_pci_intr, irq);
278 }
279
280 #if 0 /* THIS DOES NOT WORK! see pci_eb66_intr.S. */
281 u_int8_t eb66_intr_mask[3] = { 0xff, 0xff, 0xff };
282
283 void
284 eb66_intr_enable(irq)
285 int irq;
286 {
287 int byte = (irq / 8), bit = (irq % 8);
288
289 #if 1
290 printf("eb66_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit);
291 #endif
292 eb66_intr_mask[byte] &= ~(1 << bit);
293
294 bus_space_write_1(eb66_intrgate_iot, eb66_intrgate_ioh, byte,
295 eb66_intr_mask[byte]);
296 }
297
298 void
299 eb66_intr_disable(irq)
300 int irq;
301 {
302 int byte = (irq / 8), bit = (irq % 8);
303
304 #if 1
305 printf("eb66_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit);
306 #endif
307 eb66_intr_mask[byte] |= (1 << bit);
308
309 bus_space_write_1(eb66_intrgate_iot, eb66_intrgate_ioh, byte,
310 eb66_intr_mask[byte]);
311 }
312 #endif
313