pci_eb66.c revision 1.23 1 /* $NetBSD: pci_eb66.c,v 1.23 2012/02/06 02:14:15 matt Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
35 * All rights reserved.
36 *
37 * Author: Chris G. Demetriou
38 *
39 * Permission to use, copy, modify and distribute this software and
40 * its documentation is hereby granted, provided that both the copyright
41 * notice and this permission notice appear in all copies of the
42 * software, derivative works or modified versions, and any portions
43 * thereof, and that both notices appear in supporting documentation.
44 *
45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
48 *
49 * Carnegie Mellon requests users of this software to return to
50 *
51 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
52 * School of Computer Science
53 * Carnegie Mellon University
54 * Pittsburgh PA 15213-3890
55 *
56 * any improvements or extensions that they make and grant Carnegie the
57 * rights to redistribute these changes.
58 */
59
60 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
61
62 __KERNEL_RCSID(0, "$NetBSD: pci_eb66.c,v 1.23 2012/02/06 02:14:15 matt Exp $");
63
64 #include <sys/types.h>
65 #include <sys/param.h>
66 #include <sys/time.h>
67 #include <sys/systm.h>
68 #include <sys/errno.h>
69 #include <sys/malloc.h>
70 #include <sys/device.h>
71 #include <sys/syslog.h>
72
73 #include <machine/autoconf.h>
74
75 #include <dev/pci/pcireg.h>
76 #include <dev/pci/pcivar.h>
77
78 #include <alpha/pci/lcareg.h>
79 #include <alpha/pci/lcavar.h>
80
81 #include <alpha/pci/pci_eb66.h>
82
83 #include "sio.h"
84 #if NSIO
85 #include <alpha/pci/siovar.h>
86 #endif
87
88 int dec_eb66_intr_map(const struct pci_attach_args *,
89 pci_intr_handle_t *);
90 const char *dec_eb66_intr_string(void *, pci_intr_handle_t);
91 const struct evcnt *dec_eb66_intr_evcnt(void *, pci_intr_handle_t);
92 void *dec_eb66_intr_establish(void *, pci_intr_handle_t,
93 int, int (*func)(void *), void *);
94 void dec_eb66_intr_disestablish(void *, void *);
95
96 #define EB66_MAX_IRQ 32
97 #define PCI_STRAY_MAX 5
98
99 struct alpha_shared_intr *eb66_pci_intr;
100
101 bus_space_tag_t eb66_intrgate_iot;
102 bus_space_handle_t eb66_intrgate_ioh;
103
104 void eb66_iointr(void *arg, unsigned long vec);
105 extern void eb66_intr_enable(int irq); /* pci_eb66_intr.S */
106 extern void eb66_intr_disable(int irq); /* pci_eb66_intr.S */
107
108 void
109 pci_eb66_pickintr(struct lca_config *lcp)
110 {
111 bus_space_tag_t iot = &lcp->lc_iot;
112 pci_chipset_tag_t pc = &lcp->lc_pc;
113 char *cp;
114 int i;
115
116 pc->pc_intr_v = lcp;
117 pc->pc_intr_map = dec_eb66_intr_map;
118 pc->pc_intr_string = dec_eb66_intr_string;
119 pc->pc_intr_evcnt = dec_eb66_intr_evcnt;
120 pc->pc_intr_establish = dec_eb66_intr_establish;
121 pc->pc_intr_disestablish = dec_eb66_intr_disestablish;
122
123 /* Not supported on the EB66. */
124 pc->pc_pciide_compat_intr_establish = NULL;
125
126 eb66_intrgate_iot = iot;
127 if (bus_space_map(eb66_intrgate_iot, 0x804, 3, 0,
128 &eb66_intrgate_ioh) != 0)
129 panic("pci_eb66_pickintr: couldn't map interrupt PLD");
130 for (i = 0; i < EB66_MAX_IRQ; i++)
131 eb66_intr_disable(i);
132
133 eb66_pci_intr = alpha_shared_intr_alloc(EB66_MAX_IRQ, 8);
134 for (i = 0; i < EB66_MAX_IRQ; i++) {
135 alpha_shared_intr_set_maxstrays(eb66_pci_intr, i,
136 PCI_STRAY_MAX);
137
138 cp = alpha_shared_intr_string(eb66_pci_intr, i);
139 sprintf(cp, "irq %d", i);
140 evcnt_attach_dynamic(alpha_shared_intr_evcnt(
141 eb66_pci_intr, i), EVCNT_TYPE_INTR, NULL,
142 "eb66", cp);
143 }
144
145 #if NSIO
146 sio_intr_setup(pc, iot);
147 #endif
148 }
149
150 int
151 dec_eb66_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
152 {
153 pcitag_t bustag = pa->pa_intrtag;
154 int buspin = pa->pa_intrpin, line = pa->pa_intrline;
155 pci_chipset_tag_t pc = pa->pa_pc;
156 int bus, device, function;
157
158 if (buspin == 0) {
159 /* No IRQ used. */
160 return 1;
161 }
162 if (buspin > 4) {
163 printf("dec_eb66_intr_map: bad interrupt pin %d\n", buspin);
164 return 1;
165 }
166
167 pci_decompose_tag(pc, bustag, &bus, &device, &function);
168
169 /*
170 * The console places the interrupt mapping in the "line" value.
171 * A value of (char)-1 indicates there is no mapping.
172 */
173 if (line == 0xff) {
174 printf("dec_eb66_intr_map: no mapping for %d/%d/%d\n",
175 bus, device, function);
176 return (1);
177 }
178
179 if (line >= EB66_MAX_IRQ)
180 panic("dec_eb66_intr_map: eb66 irq too large (%d)",
181 line);
182
183 *ihp = line;
184 return (0);
185 }
186
187 const char *
188 dec_eb66_intr_string(void *lcv, pci_intr_handle_t ih)
189 {
190 static char irqstr[15]; /* 11 + 2 + NULL + sanity */
191
192 if (ih >= EB66_MAX_IRQ)
193 panic("dec_eb66_intr_string: bogus eb66 IRQ 0x%lx", ih);
194 sprintf(irqstr, "eb66 irq %ld", ih);
195 return (irqstr);
196 }
197
198 const struct evcnt *
199 dec_eb66_intr_evcnt(void *lcv, pci_intr_handle_t ih)
200 {
201
202 if (ih >= EB66_MAX_IRQ)
203 panic("dec_eb66_intr_string: bogus eb66 IRQ 0x%lx", ih);
204 return (alpha_shared_intr_evcnt(eb66_pci_intr, ih));
205 }
206
207 void *
208 dec_eb66_intr_establish(void *lcv, pci_intr_handle_t ih, int level, int (*func)(void *), void *arg)
209 {
210 void *cookie;
211
212 if (ih >= EB66_MAX_IRQ)
213 panic("dec_eb66_intr_establish: bogus eb66 IRQ 0x%lx", ih);
214
215 cookie = alpha_shared_intr_establish(eb66_pci_intr, ih, IST_LEVEL,
216 level, func, arg, "eb66 irq");
217
218 if (cookie != NULL &&
219 alpha_shared_intr_firstactive(eb66_pci_intr, ih)) {
220 scb_set(0x900 + SCB_IDXTOVEC(ih), eb66_iointr, NULL,
221 level);
222 eb66_intr_enable(ih);
223 }
224 return (cookie);
225 }
226
227 void
228 dec_eb66_intr_disestablish(void *lcv, void *cookie)
229 {
230 struct alpha_shared_intrhand *ih = cookie;
231 unsigned int irq = ih->ih_num;
232 int s;
233
234 s = splhigh();
235
236 alpha_shared_intr_disestablish(eb66_pci_intr, cookie,
237 "eb66 irq");
238 if (alpha_shared_intr_isactive(eb66_pci_intr, irq) == 0) {
239 eb66_intr_disable(irq);
240 alpha_shared_intr_set_dfltsharetype(eb66_pci_intr, irq,
241 IST_NONE);
242 scb_free(0x900 + SCB_IDXTOVEC(irq));
243 }
244
245 splx(s);
246 }
247
248 void
249 eb66_iointr(void *arg, unsigned long vec)
250 {
251 int irq;
252
253 irq = SCB_VECTOIDX(vec - 0x900);
254
255 if (!alpha_shared_intr_dispatch(eb66_pci_intr, irq)) {
256 alpha_shared_intr_stray(eb66_pci_intr, irq,
257 "eb66 irq");
258 if (ALPHA_SHARED_INTR_DISABLE(eb66_pci_intr, irq))
259 eb66_intr_disable(irq);
260 } else
261 alpha_shared_intr_reset_strays(eb66_pci_intr, irq);
262 }
263
264 #if 0 /* THIS DOES NOT WORK! see pci_eb66_intr.S. */
265 uint8_t eb66_intr_mask[3] = { 0xff, 0xff, 0xff };
266
267 void
268 eb66_intr_enable(int irq)
269 {
270 int byte = (irq / 8), bit = (irq % 8);
271
272 #if 1
273 printf("eb66_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit);
274 #endif
275 eb66_intr_mask[byte] &= ~(1 << bit);
276
277 bus_space_write_1(eb66_intrgate_iot, eb66_intrgate_ioh, byte,
278 eb66_intr_mask[byte]);
279 }
280
281 void
282 eb66_intr_disable(int irq)
283 {
284 int byte = (irq / 8), bit = (irq % 8);
285
286 #if 1
287 printf("eb66_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit);
288 #endif
289 eb66_intr_mask[byte] |= (1 << bit);
290
291 bus_space_write_1(eb66_intrgate_iot, eb66_intrgate_ioh, byte,
292 eb66_intr_mask[byte]);
293 }
294 #endif
295