pci_eb66.c revision 1.3
1 /* $NetBSD: pci_eb66.c,v 1.3 1998/07/07 22:24:39 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 68 69 __KERNEL_RCSID(0, "$NetBSD: pci_eb66.c,v 1.3 1998/07/07 22:24:39 thorpej Exp $"); 70 71 #include <sys/types.h> 72 #include <sys/param.h> 73 #include <sys/time.h> 74 #include <sys/systm.h> 75 #include <sys/errno.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/syslog.h> 79 80 #include <vm/vm.h> 81 82 #include <machine/autoconf.h> 83 84 #include <dev/pci/pcireg.h> 85 #include <dev/pci/pcivar.h> 86 87 #include <alpha/pci/lcareg.h> 88 #include <alpha/pci/lcavar.h> 89 90 #include <alpha/pci/pci_eb66.h> 91 92 #include <machine/intrcnt.h> 93 94 #include "sio.h" 95 #if NSIO 96 #include <alpha/pci/siovar.h> 97 #endif 98 99 int dec_eb66_intr_map __P((void *, pcitag_t, int, int, 100 pci_intr_handle_t *)); 101 const char *dec_eb66_intr_string __P((void *, pci_intr_handle_t)); 102 void *dec_eb66_intr_establish __P((void *, pci_intr_handle_t, 103 int, int (*func)(void *), void *)); 104 void dec_eb66_intr_disestablish __P((void *, void *)); 105 106 #define EB66_MAX_IRQ 32 107 #define PCI_STRAY_MAX 5 108 109 struct alpha_shared_intr *eb66_pci_intr; 110 111 bus_space_tag_t eb66_intrgate_iot; 112 bus_space_handle_t eb66_intrgate_ioh; 113 114 void eb66_iointr __P((void *framep, unsigned long vec)); 115 extern void eb66_intr_enable __P((int irq)); /* pci_eb66_intr.S */ 116 extern void eb66_intr_disable __P((int irq)); /* pci_eb66_intr.S */ 117 118 void 119 pci_eb66_pickintr(lcp) 120 struct lca_config *lcp; 121 { 122 bus_space_tag_t iot = &lcp->lc_iot; 123 pci_chipset_tag_t pc = &lcp->lc_pc; 124 int i; 125 126 pc->pc_intr_v = lcp; 127 pc->pc_intr_map = dec_eb66_intr_map; 128 pc->pc_intr_string = dec_eb66_intr_string; 129 pc->pc_intr_establish = dec_eb66_intr_establish; 130 pc->pc_intr_disestablish = dec_eb66_intr_disestablish; 131 132 /* Not supported on the EB66. */ 133 pc->pc_pciide_compat_intr_establish = NULL; 134 135 eb66_intrgate_iot = iot; 136 if (bus_space_map(eb66_intrgate_iot, 0x804, 3, 0, 137 &eb66_intrgate_ioh) != 0) 138 panic("pci_eb66_pickintr: couldn't map interrupt PLD"); 139 for (i = 0; i < EB66_MAX_IRQ; i++) 140 eb66_intr_disable(i); 141 142 eb66_pci_intr = alpha_shared_intr_alloc(EB66_MAX_IRQ); 143 for (i = 0; i < EB66_MAX_IRQ; i++) 144 alpha_shared_intr_set_maxstrays(eb66_pci_intr, i, 145 PCI_STRAY_MAX); 146 147 #if NSIO 148 sio_intr_setup(pc, iot); 149 #endif 150 151 set_iointr(eb66_iointr); 152 } 153 154 int 155 dec_eb66_intr_map(lcv, bustag, buspin, line, ihp) 156 void *lcv; 157 pcitag_t bustag; 158 int buspin, line; 159 pci_intr_handle_t *ihp; 160 { 161 struct lca_config *lcp = lcv; 162 pci_chipset_tag_t pc = &lcp->lc_pc; 163 int bus, device, function; 164 165 if (buspin == 0) { 166 /* No IRQ used. */ 167 return 1; 168 } 169 if (buspin > 4) { 170 printf("dec_eb66_intr_map: bad interrupt pin %d\n", buspin); 171 return 1; 172 } 173 174 alpha_pci_decompose_tag(pc, bustag, &bus, &device, &function); 175 176 /* 177 * The console places the interrupt mapping in the "line" value. 178 * A value of (char)-1 indicates there is no mapping. 179 */ 180 if (line == 0xff) { 181 printf("dec_eb66_intr_map: no mapping for %d/%d/%d\n", 182 bus, device, function); 183 return (1); 184 } 185 186 if (line >= EB66_MAX_IRQ) 187 panic("dec_eb66_intr_map: eb66 irq too large (%d)\n", 188 line); 189 190 *ihp = line; 191 return (0); 192 } 193 194 const char * 195 dec_eb66_intr_string(lcv, ih) 196 void *lcv; 197 pci_intr_handle_t ih; 198 { 199 static char irqstr[15]; /* 11 + 2 + NULL + sanity */ 200 201 if (ih >= EB66_MAX_IRQ) 202 panic("dec_eb66_intr_string: bogus eb66 IRQ 0x%x\n", ih); 203 sprintf(irqstr, "eb66 irq %d", ih); 204 return (irqstr); 205 } 206 207 void * 208 dec_eb66_intr_establish(lcv, ih, level, func, arg) 209 void *lcv, *arg; 210 pci_intr_handle_t ih; 211 int level; 212 int (*func) __P((void *)); 213 { 214 void *cookie; 215 216 if (ih >= EB66_MAX_IRQ) 217 panic("dec_eb66_intr_establish: bogus eb66 IRQ 0x%x\n", ih); 218 219 cookie = alpha_shared_intr_establish(eb66_pci_intr, ih, IST_LEVEL, 220 level, func, arg, "eb66 irq"); 221 222 if (cookie != NULL && alpha_shared_intr_isactive(eb66_pci_intr, ih)) 223 eb66_intr_enable(ih); 224 return (cookie); 225 } 226 227 void 228 dec_eb66_intr_disestablish(lcv, cookie) 229 void *lcv, *cookie; 230 { 231 232 panic("dec_eb66_intr_disestablish not implemented"); /* XXX */ 233 } 234 235 void 236 eb66_iointr(framep, vec) 237 void *framep; 238 unsigned long vec; 239 { 240 int irq; 241 242 if (vec >= 0x900) { 243 if (vec >= 0x900 + (EB66_MAX_IRQ << 4)) 244 panic("eb66_iointr: vec 0x%x out of range\n", vec); 245 irq = (vec - 0x900) >> 4; 246 247 if (EB66_MAX_IRQ != INTRCNT_EB66_IRQ_LEN) 248 panic("eb66 interrupt counter sizes inconsistent"); 249 intrcnt[INTRCNT_EB66_IRQ + irq]++; 250 251 if (!alpha_shared_intr_dispatch(eb66_pci_intr, irq)) { 252 alpha_shared_intr_stray(eb66_pci_intr, irq, 253 "eb66 irq"); 254 if (ALPHA_SHARED_INTR_DISABLE(eb66_pci_intr, irq)) 255 eb66_intr_disable(irq); 256 } 257 return; 258 } 259 #if NSIO 260 if (vec >= 0x800) { 261 sio_iointr(framep, vec); 262 return; 263 } 264 #endif 265 panic("eb66_iointr: weird vec 0x%x\n", vec); 266 } 267 268 #if 0 /* THIS DOES NOT WORK! see pci_eb66_intr.S. */ 269 u_int8_t eb66_intr_mask[3] = { 0xff, 0xff, 0xff }; 270 271 void 272 eb66_intr_enable(irq) 273 int irq; 274 { 275 int byte = (irq / 8), bit = (irq % 8); 276 277 #if 1 278 printf("eb66_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit); 279 #endif 280 eb66_intr_mask[byte] &= ~(1 << bit); 281 282 bus_space_write_1(eb66_intrgate_iot, eb66_intrgate_ioh, byte, 283 eb66_intr_mask[byte]); 284 } 285 286 void 287 eb66_intr_disable(irq) 288 int irq; 289 { 290 int byte = (irq / 8), bit = (irq % 8); 291 292 #if 1 293 printf("eb66_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit); 294 #endif 295 eb66_intr_mask[byte] |= (1 << bit); 296 297 bus_space_write_1(eb66_intrgate_iot, eb66_intrgate_ioh, byte, 298 eb66_intr_mask[byte]); 299 } 300 #endif 301
Indexes created Mon Sep 29 13:09:55 GMT 2025