pci_kn20aa.c revision 1.18 1 1.18 christos /* $NetBSD: pci_kn20aa.c,v 1.18 1996/10/13 03:00:12 christos Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.5 cgd * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.1 cgd
30 1.1 cgd #include <sys/types.h>
31 1.1 cgd #include <sys/param.h>
32 1.1 cgd #include <sys/time.h>
33 1.1 cgd #include <sys/systm.h>
34 1.1 cgd #include <sys/errno.h>
35 1.1 cgd #include <sys/malloc.h>
36 1.1 cgd #include <sys/device.h>
37 1.1 cgd #include <sys/syslog.h>
38 1.1 cgd
39 1.1 cgd #include <vm/vm.h>
40 1.1 cgd
41 1.7 cgd #include <machine/autoconf.h>
42 1.7 cgd
43 1.1 cgd #include <dev/pci/pcireg.h>
44 1.1 cgd #include <dev/pci/pcivar.h>
45 1.1 cgd
46 1.1 cgd #include <alpha/pci/ciareg.h>
47 1.1 cgd #include <alpha/pci/ciavar.h>
48 1.1 cgd
49 1.1 cgd #include <alpha/pci/pci_kn20aa.h>
50 1.1 cgd
51 1.1 cgd #ifndef EVCNT_COUNTERS
52 1.1 cgd #include <machine/intrcnt.h>
53 1.1 cgd #endif
54 1.1 cgd
55 1.1 cgd #include "sio.h"
56 1.1 cgd #if NSIO
57 1.1 cgd #include <alpha/pci/siovar.h>
58 1.1 cgd #endif
59 1.1 cgd
60 1.3 cgd int dec_kn20aa_intr_map __P((void *, pcitag_t, int, int,
61 1.3 cgd pci_intr_handle_t *));
62 1.3 cgd const char *dec_kn20aa_intr_string __P((void *, pci_intr_handle_t));
63 1.3 cgd void *dec_kn20aa_intr_establish __P((void *, pci_intr_handle_t,
64 1.3 cgd int, int (*func)(void *), void *));
65 1.3 cgd void dec_kn20aa_intr_disestablish __P((void *, void *));
66 1.1 cgd
67 1.1 cgd #define KN20AA_PCEB_IRQ 31
68 1.1 cgd #define KN20AA_MAX_IRQ 32
69 1.1 cgd #define PCI_STRAY_MAX 5
70 1.1 cgd
71 1.1 cgd struct kn20aa_intrhand {
72 1.1 cgd TAILQ_ENTRY(kn20aa_intrhand) ih_q;
73 1.1 cgd int (*ih_fun)();
74 1.1 cgd void *ih_arg;
75 1.1 cgd u_long ih_count;
76 1.1 cgd int ih_level;
77 1.1 cgd };
78 1.1 cgd TAILQ_HEAD(kn20aa_intrchain, kn20aa_intrhand);
79 1.1 cgd
80 1.1 cgd struct kn20aa_intrchain kn20aa_pci_intrs[KN20AA_MAX_IRQ];
81 1.1 cgd int kn20aa_pci_strayintrcnt[KN20AA_MAX_IRQ];
82 1.1 cgd #ifdef EVCNT_COUNTERS
83 1.1 cgd struct evcnt kn20aa_intr_evcnt;
84 1.1 cgd #endif
85 1.1 cgd
86 1.1 cgd void kn20aa_pci_strayintr __P((int irq));
87 1.7 cgd void kn20aa_iointr __P((void *framep, unsigned long vec));
88 1.1 cgd void kn20aa_enable_intr __P((int irq));
89 1.13 cgd void kn20aa_disable_intr __P((int irq));
90 1.1 cgd struct kn20aa_intrhand *kn20aa_attach_intr __P((struct kn20aa_intrchain *,
91 1.2 mycroft int, int (*) (void *), void *));
92 1.1 cgd
93 1.1 cgd void
94 1.3 cgd pci_kn20aa_pickintr(ccp)
95 1.3 cgd struct cia_config *ccp;
96 1.1 cgd {
97 1.1 cgd int i;
98 1.1 cgd struct kn20aa_intrhand *nintrhand;
99 1.3 cgd bus_chipset_tag_t bc = &ccp->cc_bc;
100 1.3 cgd pci_chipset_tag_t pc = &ccp->cc_pc;
101 1.1 cgd
102 1.1 cgd for (i = 0; i < KN20AA_MAX_IRQ; i++)
103 1.1 cgd TAILQ_INIT(&kn20aa_pci_intrs[i]);
104 1.1 cgd
105 1.3 cgd pc->pc_intr_v = ccp;
106 1.3 cgd pc->pc_intr_map = dec_kn20aa_intr_map;
107 1.3 cgd pc->pc_intr_string = dec_kn20aa_intr_string;
108 1.3 cgd pc->pc_intr_establish = dec_kn20aa_intr_establish;
109 1.3 cgd pc->pc_intr_disestablish = dec_kn20aa_intr_disestablish;
110 1.1 cgd
111 1.1 cgd #if NSIO
112 1.3 cgd sio_intr_setup(bc);
113 1.1 cgd #endif
114 1.1 cgd
115 1.1 cgd set_iointr(kn20aa_iointr);
116 1.1 cgd
117 1.1 cgd #if NSIO
118 1.1 cgd kn20aa_enable_intr(KN20AA_PCEB_IRQ);
119 1.1 cgd #if 0 /* XXX init PCEB interrupt handler? */
120 1.1 cgd kn20aa_attach_intr(&kn20aa_pci_intrs[KN20AA_PCEB_IRQ], ???, ???, ???);
121 1.1 cgd #endif
122 1.1 cgd #endif
123 1.1 cgd }
124 1.1 cgd
125 1.3 cgd int
126 1.3 cgd dec_kn20aa_intr_map(ccv, bustag, buspin, line, ihp)
127 1.3 cgd void *ccv;
128 1.3 cgd pcitag_t bustag;
129 1.3 cgd int buspin, line;
130 1.3 cgd pci_intr_handle_t *ihp;
131 1.1 cgd {
132 1.3 cgd struct cia_config *ccp = ccv;
133 1.3 cgd pci_chipset_tag_t pc = &ccp->cc_pc;
134 1.1 cgd int device;
135 1.9 cgd int kn20aa_irq;
136 1.1 cgd void *ih;
137 1.1 cgd
138 1.3 cgd if (buspin == 0) {
139 1.1 cgd /* No IRQ used. */
140 1.9 cgd return 1;
141 1.1 cgd }
142 1.3 cgd if (buspin > 4) {
143 1.18 christos printf("pci_map_int: bad interrupt pin %d\n", buspin);
144 1.9 cgd return 1;
145 1.1 cgd }
146 1.1 cgd
147 1.1 cgd /*
148 1.1 cgd * Slot->interrupt translation. Appears to work, though it
149 1.1 cgd * may not hold up forever.
150 1.1 cgd *
151 1.1 cgd * The DEC engineers who did this hardware obviously engaged
152 1.1 cgd * in random drug testing.
153 1.1 cgd */
154 1.3 cgd pci_decompose_tag(pc, bustag, NULL, &device, NULL);
155 1.3 cgd switch (device) {
156 1.1 cgd case 11:
157 1.1 cgd case 12:
158 1.9 cgd kn20aa_irq = ((device - 11) + 0) * 4;
159 1.1 cgd break;
160 1.1 cgd
161 1.1 cgd case 7:
162 1.9 cgd kn20aa_irq = 8;
163 1.1 cgd break;
164 1.1 cgd
165 1.10 cgd case 9:
166 1.10 cgd kn20aa_irq = 12;
167 1.14 cgd break;
168 1.14 cgd
169 1.15 cgd case 6: /* 21040 on AlphaStation 500 */
170 1.14 cgd kn20aa_irq = 13;
171 1.10 cgd break;
172 1.10 cgd
173 1.1 cgd case 8:
174 1.9 cgd kn20aa_irq = 16;
175 1.1 cgd break;
176 1.1 cgd
177 1.1 cgd default:
178 1.16 cgd #ifdef KN20AA_BOGUS_IRQ_FROB
179 1.16 cgd *ihp = 0xdeadbeef;
180 1.18 christos printf("\n\n BOGUS INTERRUPT MAPPING: dev %d, pin %d\n",
181 1.16 cgd device, buspin);
182 1.16 cgd return (0);
183 1.16 cgd #endif
184 1.1 cgd panic("pci_kn20aa_map_int: invalid device number %d\n",
185 1.1 cgd device);
186 1.1 cgd }
187 1.1 cgd
188 1.9 cgd kn20aa_irq += buspin - 1;
189 1.1 cgd if (kn20aa_irq > KN20AA_MAX_IRQ)
190 1.1 cgd panic("pci_kn20aa_map_int: kn20aa_irq too large (%d)\n",
191 1.1 cgd kn20aa_irq);
192 1.1 cgd
193 1.3 cgd *ihp = kn20aa_irq;
194 1.9 cgd return (0);
195 1.3 cgd }
196 1.3 cgd
197 1.3 cgd const char *
198 1.3 cgd dec_kn20aa_intr_string(ccv, ih)
199 1.3 cgd void *ccv;
200 1.3 cgd pci_intr_handle_t ih;
201 1.3 cgd {
202 1.3 cgd struct cia_config *ccp = ccv;
203 1.3 cgd static char irqstr[15]; /* 11 + 2 + NULL + sanity */
204 1.3 cgd
205 1.16 cgd #ifdef KN20AA_BOGUS_IRQ_FROB
206 1.16 cgd if (ih == 0xdeadbeef) {
207 1.18 christos sprintf(irqstr, "BOGUS");
208 1.16 cgd return (irqstr);
209 1.16 cgd }
210 1.16 cgd #endif
211 1.3 cgd if (ih > KN20AA_MAX_IRQ)
212 1.3 cgd panic("dec_kn20aa_a50_intr_string: bogus kn20aa IRQ 0x%x\n",
213 1.3 cgd ih);
214 1.1 cgd
215 1.18 christos sprintf(irqstr, "kn20aa irq %d", ih);
216 1.3 cgd return (irqstr);
217 1.1 cgd }
218 1.1 cgd
219 1.3 cgd void *
220 1.3 cgd dec_kn20aa_intr_establish(ccv, ih, level, func, arg)
221 1.3 cgd void *ccv, *arg;
222 1.3 cgd pci_intr_handle_t ih;
223 1.3 cgd int level;
224 1.3 cgd int (*func) __P((void *));
225 1.3 cgd {
226 1.3 cgd struct cia_config *ccp = ccv;
227 1.1 cgd void *cookie;
228 1.3 cgd
229 1.16 cgd #ifdef KN20AA_BOGUS_IRQ_FROB
230 1.16 cgd if (ih == 0xdeadbeef) {
231 1.16 cgd int i;
232 1.16 cgd char chars[10];
233 1.16 cgd
234 1.18 christos printf("dec_kn20aa_intr_establish: BOGUS IRQ\n");
235 1.16 cgd do {
236 1.18 christos printf("IRQ to enable? ");
237 1.16 cgd getstr(chars, 10);
238 1.16 cgd i = atoi(chars);
239 1.16 cgd } while (i < 0 || i > 32);
240 1.18 christos printf("ENABLING IRQ %d\n", i);
241 1.16 cgd kn20aa_enable_intr(i);
242 1.16 cgd return ((void *)0xbabefacedeadbeef);
243 1.16 cgd }
244 1.16 cgd #endif
245 1.3 cgd if (ih > KN20AA_MAX_IRQ)
246 1.3 cgd panic("dec_kn20aa_intr_establish: bogus kn20aa IRQ 0x%x\n",
247 1.3 cgd ih);
248 1.3 cgd
249 1.3 cgd cookie = kn20aa_attach_intr(&kn20aa_pci_intrs[ih], level, func, arg);
250 1.3 cgd kn20aa_enable_intr(ih);
251 1.3 cgd return (cookie);
252 1.3 cgd }
253 1.3 cgd
254 1.3 cgd void
255 1.3 cgd dec_kn20aa_intr_disestablish(ccv, cookie)
256 1.3 cgd void *ccv, *cookie;
257 1.1 cgd {
258 1.3 cgd struct cia_config *ccp = ccv;
259 1.1 cgd
260 1.3 cgd panic("dec_kn20aa_intr_disestablish not implemented"); /* XXX */
261 1.1 cgd }
262 1.1 cgd
263 1.1 cgd /*
264 1.1 cgd * caught a stray interrupt; notify if not too many seen already.
265 1.1 cgd */
266 1.1 cgd void
267 1.1 cgd kn20aa_pci_strayintr(irq)
268 1.1 cgd int irq;
269 1.1 cgd {
270 1.1 cgd
271 1.13 cgd kn20aa_pci_strayintrcnt[irq]++;
272 1.13 cgd if (kn20aa_pci_strayintrcnt[irq] == PCI_STRAY_MAX)
273 1.13 cgd kn20aa_disable_intr(irq);
274 1.13 cgd
275 1.13 cgd log(LOG_ERR, "stray kn20aa irq %d\n", irq);
276 1.13 cgd if (kn20aa_pci_strayintrcnt[irq] == PCI_STRAY_MAX)
277 1.13 cgd log(LOG_ERR, "disabling interrupts on kn20aa irq %d\n", irq);
278 1.1 cgd }
279 1.1 cgd
280 1.1 cgd void
281 1.1 cgd kn20aa_iointr(framep, vec)
282 1.1 cgd void *framep;
283 1.7 cgd unsigned long vec;
284 1.1 cgd {
285 1.1 cgd struct kn20aa_intrhand *ih;
286 1.1 cgd int irq, handled;
287 1.1 cgd
288 1.1 cgd if (vec >= 0x900) {
289 1.1 cgd if (vec >= 0x900 + (KN20AA_MAX_IRQ << 4))
290 1.1 cgd panic("kn20aa_iointr: vec 0x%x out of range\n", vec);
291 1.1 cgd irq = (vec - 0x900) >> 4;
292 1.1 cgd
293 1.1 cgd #ifdef EVCNT_COUNTERS
294 1.1 cgd kn20aa_intr_evcnt.ev_count++;
295 1.1 cgd #else
296 1.1 cgd if (KN20AA_MAX_IRQ != INTRCNT_KN20AA_IRQ_LEN)
297 1.1 cgd panic("kn20aa interrupt counter sizes inconsistent");
298 1.1 cgd intrcnt[INTRCNT_KN20AA_IRQ + irq]++;
299 1.1 cgd #endif
300 1.1 cgd
301 1.1 cgd for (ih = kn20aa_pci_intrs[irq].tqh_first, handled = 0;
302 1.1 cgd ih != NULL; ih = ih->ih_q.tqe_next) {
303 1.1 cgd int rv;
304 1.1 cgd
305 1.1 cgd rv = (*ih->ih_fun)(ih->ih_arg);
306 1.1 cgd
307 1.1 cgd ih->ih_count++;
308 1.1 cgd handled = handled || (rv != 0);
309 1.1 cgd }
310 1.1 cgd if (!handled)
311 1.1 cgd kn20aa_pci_strayintr(irq);
312 1.1 cgd return;
313 1.1 cgd }
314 1.1 cgd if (vec >= 0x800) {
315 1.1 cgd #if NSIO
316 1.1 cgd sio_iointr(framep, vec);
317 1.1 cgd #endif
318 1.1 cgd return;
319 1.1 cgd }
320 1.1 cgd panic("kn20aa_iointr: weird vec 0x%x\n", vec);
321 1.1 cgd }
322 1.1 cgd
323 1.1 cgd void
324 1.1 cgd kn20aa_enable_intr(irq)
325 1.1 cgd int irq;
326 1.1 cgd {
327 1.1 cgd
328 1.1 cgd /*
329 1.8 cgd * From disassembling small bits of the OSF/1 kernel:
330 1.1 cgd * the following appears to enable a given interrupt request.
331 1.1 cgd * "blech." I'd give valuable body parts for better docs or
332 1.1 cgd * for a good decompiler.
333 1.1 cgd */
334 1.6 cgd alpha_mb();
335 1.1 cgd REGVAL(0x8780000000L + 0x40L) |= (1 << irq); /* XXX */
336 1.8 cgd alpha_mb();
337 1.8 cgd }
338 1.8 cgd
339 1.8 cgd void
340 1.8 cgd kn20aa_disable_intr(irq)
341 1.8 cgd int irq;
342 1.8 cgd {
343 1.8 cgd
344 1.8 cgd alpha_mb();
345 1.8 cgd REGVAL(0x8780000000L + 0x40L) &= ~(1 << irq); /* XXX */
346 1.6 cgd alpha_mb();
347 1.1 cgd }
348 1.1 cgd
349 1.1 cgd struct kn20aa_intrhand *
350 1.1 cgd kn20aa_attach_intr(chain, level, func, arg)
351 1.1 cgd struct kn20aa_intrchain *chain;
352 1.2 mycroft int level;
353 1.1 cgd int (*func) __P((void *));
354 1.1 cgd void *arg;
355 1.1 cgd {
356 1.1 cgd struct kn20aa_intrhand *nintrhand;
357 1.1 cgd
358 1.1 cgd nintrhand = (struct kn20aa_intrhand *)
359 1.1 cgd malloc(sizeof *nintrhand, M_DEVBUF, M_WAITOK);
360 1.1 cgd
361 1.1 cgd nintrhand->ih_fun = func;
362 1.1 cgd nintrhand->ih_arg = arg;
363 1.1 cgd nintrhand->ih_count = 0;
364 1.1 cgd nintrhand->ih_level = level;
365 1.1 cgd TAILQ_INSERT_TAIL(chain, nintrhand, ih_q);
366 1.1 cgd
367 1.1 cgd return (nintrhand);
368 1.1 cgd }
369