pci_kn20aa.c revision 1.22 1 1.22 cgd /* $NetBSD: pci_kn20aa.c,v 1.22 1997/04/07 02:01:25 cgd Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.5 cgd * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.22 cgd
30 1.22 cgd #include <machine/options.h> /* Pull in config options headers */
31 1.1 cgd
32 1.1 cgd #include <sys/types.h>
33 1.1 cgd #include <sys/param.h>
34 1.1 cgd #include <sys/time.h>
35 1.1 cgd #include <sys/systm.h>
36 1.1 cgd #include <sys/errno.h>
37 1.1 cgd #include <sys/malloc.h>
38 1.1 cgd #include <sys/device.h>
39 1.1 cgd #include <sys/syslog.h>
40 1.1 cgd
41 1.1 cgd #include <vm/vm.h>
42 1.1 cgd
43 1.7 cgd #include <machine/autoconf.h>
44 1.7 cgd
45 1.1 cgd #include <dev/pci/pcireg.h>
46 1.1 cgd #include <dev/pci/pcivar.h>
47 1.1 cgd
48 1.1 cgd #include <alpha/pci/ciareg.h>
49 1.1 cgd #include <alpha/pci/ciavar.h>
50 1.1 cgd
51 1.1 cgd #include <alpha/pci/pci_kn20aa.h>
52 1.1 cgd
53 1.1 cgd #ifndef EVCNT_COUNTERS
54 1.1 cgd #include <machine/intrcnt.h>
55 1.1 cgd #endif
56 1.1 cgd
57 1.1 cgd #include "sio.h"
58 1.1 cgd #if NSIO
59 1.1 cgd #include <alpha/pci/siovar.h>
60 1.1 cgd #endif
61 1.1 cgd
62 1.3 cgd int dec_kn20aa_intr_map __P((void *, pcitag_t, int, int,
63 1.3 cgd pci_intr_handle_t *));
64 1.3 cgd const char *dec_kn20aa_intr_string __P((void *, pci_intr_handle_t));
65 1.3 cgd void *dec_kn20aa_intr_establish __P((void *, pci_intr_handle_t,
66 1.3 cgd int, int (*func)(void *), void *));
67 1.3 cgd void dec_kn20aa_intr_disestablish __P((void *, void *));
68 1.1 cgd
69 1.1 cgd #define KN20AA_PCEB_IRQ 31
70 1.1 cgd #define KN20AA_MAX_IRQ 32
71 1.1 cgd #define PCI_STRAY_MAX 5
72 1.1 cgd
73 1.21 cgd struct alpha_shared_intr *kn20aa_pci_intr;
74 1.1 cgd #ifdef EVCNT_COUNTERS
75 1.1 cgd struct evcnt kn20aa_intr_evcnt;
76 1.1 cgd #endif
77 1.1 cgd
78 1.7 cgd void kn20aa_iointr __P((void *framep, unsigned long vec));
79 1.1 cgd void kn20aa_enable_intr __P((int irq));
80 1.13 cgd void kn20aa_disable_intr __P((int irq));
81 1.1 cgd
82 1.1 cgd void
83 1.3 cgd pci_kn20aa_pickintr(ccp)
84 1.3 cgd struct cia_config *ccp;
85 1.1 cgd {
86 1.1 cgd int i;
87 1.19 cgd bus_space_tag_t iot = ccp->cc_iot;
88 1.3 cgd pci_chipset_tag_t pc = &ccp->cc_pc;
89 1.1 cgd
90 1.3 cgd pc->pc_intr_v = ccp;
91 1.3 cgd pc->pc_intr_map = dec_kn20aa_intr_map;
92 1.3 cgd pc->pc_intr_string = dec_kn20aa_intr_string;
93 1.3 cgd pc->pc_intr_establish = dec_kn20aa_intr_establish;
94 1.3 cgd pc->pc_intr_disestablish = dec_kn20aa_intr_disestablish;
95 1.1 cgd
96 1.21 cgd kn20aa_pci_intr = alpha_shared_intr_alloc(KN20AA_MAX_IRQ);
97 1.21 cgd for (i = 0; i < KN20AA_MAX_IRQ; i++)
98 1.21 cgd alpha_shared_intr_set_maxstrays(kn20aa_pci_intr, i,
99 1.21 cgd PCI_STRAY_MAX);
100 1.21 cgd
101 1.1 cgd #if NSIO
102 1.19 cgd sio_intr_setup(iot);
103 1.21 cgd kn20aa_enable_intr(KN20AA_PCEB_IRQ);
104 1.1 cgd #endif
105 1.1 cgd
106 1.1 cgd set_iointr(kn20aa_iointr);
107 1.1 cgd }
108 1.1 cgd
109 1.3 cgd int
110 1.3 cgd dec_kn20aa_intr_map(ccv, bustag, buspin, line, ihp)
111 1.3 cgd void *ccv;
112 1.3 cgd pcitag_t bustag;
113 1.3 cgd int buspin, line;
114 1.3 cgd pci_intr_handle_t *ihp;
115 1.1 cgd {
116 1.3 cgd struct cia_config *ccp = ccv;
117 1.3 cgd pci_chipset_tag_t pc = &ccp->cc_pc;
118 1.1 cgd int device;
119 1.9 cgd int kn20aa_irq;
120 1.1 cgd
121 1.3 cgd if (buspin == 0) {
122 1.1 cgd /* No IRQ used. */
123 1.9 cgd return 1;
124 1.1 cgd }
125 1.3 cgd if (buspin > 4) {
126 1.18 christos printf("pci_map_int: bad interrupt pin %d\n", buspin);
127 1.9 cgd return 1;
128 1.1 cgd }
129 1.1 cgd
130 1.1 cgd /*
131 1.1 cgd * Slot->interrupt translation. Appears to work, though it
132 1.1 cgd * may not hold up forever.
133 1.1 cgd *
134 1.1 cgd * The DEC engineers who did this hardware obviously engaged
135 1.1 cgd * in random drug testing.
136 1.1 cgd */
137 1.3 cgd pci_decompose_tag(pc, bustag, NULL, &device, NULL);
138 1.3 cgd switch (device) {
139 1.1 cgd case 11:
140 1.1 cgd case 12:
141 1.9 cgd kn20aa_irq = ((device - 11) + 0) * 4;
142 1.1 cgd break;
143 1.1 cgd
144 1.1 cgd case 7:
145 1.9 cgd kn20aa_irq = 8;
146 1.1 cgd break;
147 1.1 cgd
148 1.10 cgd case 9:
149 1.10 cgd kn20aa_irq = 12;
150 1.14 cgd break;
151 1.14 cgd
152 1.15 cgd case 6: /* 21040 on AlphaStation 500 */
153 1.14 cgd kn20aa_irq = 13;
154 1.10 cgd break;
155 1.10 cgd
156 1.1 cgd case 8:
157 1.9 cgd kn20aa_irq = 16;
158 1.1 cgd break;
159 1.1 cgd
160 1.1 cgd default:
161 1.20 cgd printf("dec_kn20aa_intr_map: weird device number %d\n",
162 1.1 cgd device);
163 1.20 cgd return 1;
164 1.1 cgd }
165 1.1 cgd
166 1.9 cgd kn20aa_irq += buspin - 1;
167 1.1 cgd if (kn20aa_irq > KN20AA_MAX_IRQ)
168 1.1 cgd panic("pci_kn20aa_map_int: kn20aa_irq too large (%d)\n",
169 1.1 cgd kn20aa_irq);
170 1.1 cgd
171 1.3 cgd *ihp = kn20aa_irq;
172 1.9 cgd return (0);
173 1.3 cgd }
174 1.3 cgd
175 1.3 cgd const char *
176 1.3 cgd dec_kn20aa_intr_string(ccv, ih)
177 1.3 cgd void *ccv;
178 1.3 cgd pci_intr_handle_t ih;
179 1.3 cgd {
180 1.20 cgd #if 0
181 1.3 cgd struct cia_config *ccp = ccv;
182 1.20 cgd #endif
183 1.3 cgd static char irqstr[15]; /* 11 + 2 + NULL + sanity */
184 1.3 cgd
185 1.3 cgd if (ih > KN20AA_MAX_IRQ)
186 1.21 cgd panic("dec_kn20aa_intr_string: bogus kn20aa IRQ 0x%x\n",
187 1.3 cgd ih);
188 1.1 cgd
189 1.20 cgd sprintf(irqstr, "kn20aa irq %ld", ih);
190 1.3 cgd return (irqstr);
191 1.1 cgd }
192 1.1 cgd
193 1.3 cgd void *
194 1.3 cgd dec_kn20aa_intr_establish(ccv, ih, level, func, arg)
195 1.3 cgd void *ccv, *arg;
196 1.3 cgd pci_intr_handle_t ih;
197 1.3 cgd int level;
198 1.3 cgd int (*func) __P((void *));
199 1.3 cgd {
200 1.20 cgd #if 0
201 1.3 cgd struct cia_config *ccp = ccv;
202 1.20 cgd #endif
203 1.1 cgd void *cookie;
204 1.3 cgd
205 1.3 cgd if (ih > KN20AA_MAX_IRQ)
206 1.3 cgd panic("dec_kn20aa_intr_establish: bogus kn20aa IRQ 0x%x\n",
207 1.3 cgd ih);
208 1.3 cgd
209 1.21 cgd cookie = alpha_shared_intr_establish(kn20aa_pci_intr, ih, IST_LEVEL,
210 1.21 cgd level, func, arg, "kn20aa irq");
211 1.21 cgd
212 1.21 cgd if (cookie != NULL &&
213 1.21 cgd alpha_shared_intr_isactive(kn20aa_pci_intr, ih))
214 1.21 cgd kn20aa_enable_intr(ih);
215 1.3 cgd return (cookie);
216 1.3 cgd }
217 1.3 cgd
218 1.3 cgd void
219 1.3 cgd dec_kn20aa_intr_disestablish(ccv, cookie)
220 1.3 cgd void *ccv, *cookie;
221 1.1 cgd {
222 1.20 cgd #if 0
223 1.3 cgd struct cia_config *ccp = ccv;
224 1.20 cgd #endif
225 1.1 cgd
226 1.3 cgd panic("dec_kn20aa_intr_disestablish not implemented"); /* XXX */
227 1.1 cgd }
228 1.1 cgd
229 1.1 cgd void
230 1.1 cgd kn20aa_iointr(framep, vec)
231 1.1 cgd void *framep;
232 1.7 cgd unsigned long vec;
233 1.1 cgd {
234 1.21 cgd int irq;
235 1.1 cgd
236 1.1 cgd if (vec >= 0x900) {
237 1.1 cgd if (vec >= 0x900 + (KN20AA_MAX_IRQ << 4))
238 1.1 cgd panic("kn20aa_iointr: vec 0x%x out of range\n", vec);
239 1.1 cgd irq = (vec - 0x900) >> 4;
240 1.1 cgd
241 1.1 cgd #ifdef EVCNT_COUNTERS
242 1.1 cgd kn20aa_intr_evcnt.ev_count++;
243 1.1 cgd #else
244 1.1 cgd if (KN20AA_MAX_IRQ != INTRCNT_KN20AA_IRQ_LEN)
245 1.1 cgd panic("kn20aa interrupt counter sizes inconsistent");
246 1.1 cgd intrcnt[INTRCNT_KN20AA_IRQ + irq]++;
247 1.1 cgd #endif
248 1.1 cgd
249 1.21 cgd if (!alpha_shared_intr_dispatch(kn20aa_pci_intr, irq)) {
250 1.21 cgd alpha_shared_intr_stray(kn20aa_pci_intr, irq,
251 1.21 cgd "kn20aa irq");
252 1.21 cgd if (kn20aa_pci_intr[irq].intr_nstrays ==
253 1.21 cgd kn20aa_pci_intr[irq].intr_maxstrays)
254 1.21 cgd kn20aa_disable_intr(irq);
255 1.1 cgd }
256 1.1 cgd return;
257 1.1 cgd }
258 1.21 cgd #if NSIO
259 1.1 cgd if (vec >= 0x800) {
260 1.1 cgd sio_iointr(framep, vec);
261 1.1 cgd return;
262 1.1 cgd }
263 1.21 cgd #endif
264 1.1 cgd panic("kn20aa_iointr: weird vec 0x%x\n", vec);
265 1.1 cgd }
266 1.1 cgd
267 1.1 cgd void
268 1.1 cgd kn20aa_enable_intr(irq)
269 1.1 cgd int irq;
270 1.1 cgd {
271 1.1 cgd
272 1.1 cgd /*
273 1.8 cgd * From disassembling small bits of the OSF/1 kernel:
274 1.1 cgd * the following appears to enable a given interrupt request.
275 1.1 cgd * "blech." I'd give valuable body parts for better docs or
276 1.1 cgd * for a good decompiler.
277 1.1 cgd */
278 1.6 cgd alpha_mb();
279 1.1 cgd REGVAL(0x8780000000L + 0x40L) |= (1 << irq); /* XXX */
280 1.8 cgd alpha_mb();
281 1.8 cgd }
282 1.8 cgd
283 1.8 cgd void
284 1.8 cgd kn20aa_disable_intr(irq)
285 1.8 cgd int irq;
286 1.8 cgd {
287 1.8 cgd
288 1.8 cgd alpha_mb();
289 1.8 cgd REGVAL(0x8780000000L + 0x40L) &= ~(1 << irq); /* XXX */
290 1.6 cgd alpha_mb();
291 1.1 cgd }
292