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pci_kn8ae.c revision 1.2
      1  1.2  cgd /*	$NetBSD: pci_kn8ae.c,v 1.2 1997/03/12 21:10:19 cgd Exp $	*/
      2  1.1  cgd 
      3  1.1  cgd /*
      4  1.2  cgd  * Copyright (c) 1997 by Matthew Jacob
      5  1.1  cgd  * NASA AMES Research Center.
      6  1.1  cgd  * All rights reserved.
      7  1.1  cgd  *
      8  1.1  cgd  * Redistribution and use in source and binary forms, with or without
      9  1.1  cgd  * modification, are permitted provided that the following conditions
     10  1.1  cgd  * are met:
     11  1.1  cgd  * 1. Redistributions of source code must retain the above copyright
     12  1.1  cgd  *    notice immediately at the beginning of the file, without modification,
     13  1.1  cgd  *    this list of conditions, and the following disclaimer.
     14  1.1  cgd  * 2. Redistributions in binary form must reproduce the above copyright
     15  1.1  cgd  *    notice, this list of conditions and the following disclaimer in the
     16  1.1  cgd  *    documentation and/or other materials provided with the distribution.
     17  1.1  cgd  * 3. The name of the author may not be used to endorse or promote products
     18  1.1  cgd  *    derived from this software without specific prior written permission.
     19  1.1  cgd  *
     20  1.1  cgd  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     21  1.1  cgd  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     22  1.1  cgd  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     23  1.1  cgd  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     24  1.1  cgd  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     25  1.1  cgd  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     26  1.1  cgd  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     27  1.1  cgd  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     28  1.1  cgd  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29  1.1  cgd  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     30  1.1  cgd  * SUCH DAMAGE.
     31  1.1  cgd  */
     32  1.1  cgd 
     33  1.1  cgd #include <sys/types.h>
     34  1.1  cgd #include <sys/param.h>
     35  1.1  cgd #include <sys/time.h>
     36  1.1  cgd #include <sys/systm.h>
     37  1.1  cgd #include <sys/errno.h>
     38  1.1  cgd #include <sys/malloc.h>
     39  1.1  cgd #include <sys/device.h>
     40  1.1  cgd #include <sys/syslog.h>
     41  1.1  cgd 
     42  1.1  cgd #include <vm/vm.h>
     43  1.1  cgd 
     44  1.1  cgd #include <machine/autoconf.h>
     45  1.1  cgd 
     46  1.1  cgd #include <dev/pci/pcireg.h>
     47  1.1  cgd #include <dev/pci/pcivar.h>
     48  1.1  cgd 
     49  1.1  cgd #include <alpha/pci/dwlpxreg.h>
     50  1.1  cgd #include <alpha/pci/dwlpxvar.h>
     51  1.1  cgd #include <alpha/pci/pci_kn8ae.h>
     52  1.1  cgd 
     53  1.1  cgd #ifndef EVCNT_COUNTERS
     54  1.1  cgd #include <machine/intrcnt.h>
     55  1.1  cgd #endif
     56  1.1  cgd 
     57  1.1  cgd int	dec_kn8ae_intr_map __P((void *, pcitag_t, int, int,
     58  1.1  cgd 	    pci_intr_handle_t *));
     59  1.1  cgd const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t));
     60  1.1  cgd void	*dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t,
     61  1.1  cgd 	    int, int (*func)(void *), void *));
     62  1.1  cgd void	dec_kn8ae_intr_disestablish __P((void *, void *));
     63  1.1  cgd 
     64  1.1  cgd #define	NIONODE	5
     65  1.1  cgd #define	NHOSE	4
     66  1.1  cgd struct vectab {
     67  1.1  cgd 	int (*func) __P((void *));
     68  1.1  cgd 	void *arg;
     69  1.1  cgd } vectab[NIONODE][NHOSE][DWLPX_MAXDEV];
     70  1.1  cgd static u_int32_t imaskcache[NIONODE][NHOSE][NHPC];
     71  1.1  cgd 
     72  1.1  cgd #ifdef EVCNT_COUNTERS
     73  1.1  cgd struct evcnt kn8ae_intr_evcnt;
     74  1.1  cgd #endif
     75  1.1  cgd 
     76  1.1  cgd int	kn8ae_spurious __P((void *));
     77  1.1  cgd void	kn8ae_iointr __P((void *framep, unsigned long vec));
     78  1.1  cgd void	kn8ae_enadis_intr __P((pci_intr_handle_t, int));
     79  1.1  cgd void	kn8ae_enable_intr __P((pci_intr_handle_t irq));
     80  1.1  cgd void	kn8ae_disable_intr __P((pci_intr_handle_t irq));
     81  1.1  cgd 
     82  1.1  cgd void
     83  1.1  cgd pci_kn8ae_pickintr(ccp, first)
     84  1.1  cgd 	struct dwlpx_config *ccp;
     85  1.1  cgd 	int first;
     86  1.1  cgd {
     87  1.1  cgd 	int io, hose, dev;
     88  1.1  cgd 	pci_chipset_tag_t pc = &ccp->cc_pc;
     89  1.1  cgd 
     90  1.1  cgd         pc->pc_intr_v = ccp;
     91  1.1  cgd         pc->pc_intr_map = dec_kn8ae_intr_map;
     92  1.1  cgd         pc->pc_intr_string = dec_kn8ae_intr_string;
     93  1.1  cgd         pc->pc_intr_establish = dec_kn8ae_intr_establish;
     94  1.1  cgd         pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish;
     95  1.1  cgd 
     96  1.1  cgd 	if (!first) {
     97  1.1  cgd 		return;
     98  1.1  cgd 	}
     99  1.1  cgd 
    100  1.1  cgd 	for (io = 0; io < NIONODE; io++) {
    101  1.1  cgd 		for (hose = 0; hose < NHOSE; hose++) {
    102  1.1  cgd 			for (dev = 0; dev < DWLPX_MAXDEV; dev++) {
    103  1.1  cgd 				vectab[io][hose][dev].func = kn8ae_spurious;
    104  1.1  cgd 				vectab[io][hose][dev].arg = (void *)
    105  1.1  cgd 				    (u_int64_t) DWLPX_MVEC(io, hose, dev);
    106  1.1  cgd 			}
    107  1.1  cgd 		}
    108  1.1  cgd 	}
    109  1.1  cgd 	for (io = 0; io < NIONODE; io++) {
    110  1.1  cgd 		for (hose = 0; hose < NHOSE; hose++) {
    111  1.1  cgd 			for (dev = 0; dev < NHPC; dev++) {
    112  1.1  cgd 				imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT;
    113  1.1  cgd 			}
    114  1.1  cgd 		}
    115  1.1  cgd 	}
    116  1.1  cgd 	set_iointr(kn8ae_iointr);
    117  1.1  cgd }
    118  1.1  cgd 
    119  1.1  cgd int
    120  1.1  cgd dec_kn8ae_intr_map(ccv, bustag, buspin, line, ihp)
    121  1.1  cgd         void *ccv;
    122  1.1  cgd         pcitag_t bustag;
    123  1.1  cgd         int buspin, line;
    124  1.1  cgd         pci_intr_handle_t *ihp;
    125  1.1  cgd {
    126  1.1  cgd 	int device, ionode, hose;
    127  1.1  cgd 	struct dwlpx_config *ccp = ccv;
    128  1.1  cgd 	pci_chipset_tag_t pc = &ccp->cc_pc;
    129  1.1  cgd 
    130  1.1  cgd         if (buspin == 0) {
    131  1.1  cgd                 /* No IRQ used. */
    132  1.1  cgd                 return 1;
    133  1.1  cgd         }
    134  1.1  cgd         if (buspin > 4) {
    135  1.1  cgd                 printf("pci_map_int: bad interrupt pin %d\n", buspin);
    136  1.1  cgd                 return 1;
    137  1.1  cgd         }
    138  1.1  cgd 	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
    139  1.1  cgd 	ionode = ccp->cc_sc->dwlpx_node - 4;
    140  1.1  cgd 	hose = ccp->cc_sc->dwlpx_hosenum;
    141  1.1  cgd 
    142  1.1  cgd 	/*
    143  1.1  cgd 	 * handle layout:
    144  1.1  cgd 	 *	bits 0..15	DWLPX_MVEC(ionode, hose, device)
    145  1.1  cgd 	 *	bits 16-24	buspin (1..N)
    146  1.1  cgd 	 *	bits 24-31	IPL
    147  1.1  cgd 	 */
    148  1.1  cgd 	*ihp = DWLPX_MVEC(ionode, hose, device) | (buspin << 16) | (14 << 24);
    149  1.1  cgd 	return (0);
    150  1.1  cgd }
    151  1.1  cgd 
    152  1.1  cgd const char *
    153  1.1  cgd dec_kn8ae_intr_string(ccv, ih)
    154  1.1  cgd 	void *ccv;
    155  1.1  cgd 	pci_intr_handle_t ih;
    156  1.1  cgd {
    157  1.1  cgd 	static char irqstr[64];
    158  1.1  cgd         sprintf(irqstr, "kn8ae irq %d vector 0x%x PCI Interrupt Pin %c",
    159  1.1  cgd 	    (ih >> 24), ih & 0xffff, (((ih >> 16) & 0x7) - 1) + 'A');
    160  1.1  cgd         return (irqstr);
    161  1.1  cgd }
    162  1.1  cgd 
    163  1.1  cgd void *
    164  1.1  cgd dec_kn8ae_intr_establish(ccv, ih, level, func, arg)
    165  1.1  cgd         void *ccv;
    166  1.1  cgd         pci_intr_handle_t ih;
    167  1.1  cgd         int level;
    168  1.1  cgd         int (*func) __P((void *));
    169  1.1  cgd 	void *arg;
    170  1.1  cgd {
    171  1.1  cgd 	struct dwlpx_config *ccp = ccv;
    172  1.1  cgd 	void *cookie = NULL;
    173  1.1  cgd 	int ionode, hose, device, s;
    174  1.1  cgd 	struct vectab *vp;
    175  1.1  cgd 
    176  1.1  cgd 	ionode	= ccp->cc_sc->dwlpx_node - 4;
    177  1.1  cgd 	hose	= ccp->cc_sc->dwlpx_hosenum;
    178  1.1  cgd 	device	= DWLPX_MVEC_PCISLOT(ih);
    179  1.1  cgd 
    180  1.1  cgd 	if (ionode < 0 || ionode >= NIONODE) {
    181  1.1  cgd 		panic("dec_kn8ae_intr_establish: bad ionode %d\n", ionode);
    182  1.1  cgd 	}
    183  1.1  cgd 	if (hose < 0 || hose >= NHOSE) {
    184  1.1  cgd 		panic("dec_kn8ae_intr_establish: bad hose %d\n", hose);
    185  1.1  cgd 	}
    186  1.1  cgd 	if (device < 0 || device >= DWLPX_MAXDEV) {
    187  1.1  cgd 		panic("dec_kn8ae_intr_establish: bad device %d\n", device);
    188  1.1  cgd 	}
    189  1.1  cgd 
    190  1.1  cgd 	vp = &vectab[ionode][hose][device];
    191  1.1  cgd 	if (vp->func != kn8ae_spurious) {
    192  1.1  cgd 		printf("dec_kn8ae_intr_establish: vector 0x%x already used\n",
    193  1.1  cgd 		    ih & 0xffff);
    194  1.1  cgd 		return (cookie);
    195  1.1  cgd 	}
    196  1.1  cgd 
    197  1.1  cgd 	s = splhigh();
    198  1.1  cgd 	vp->func = func;
    199  1.1  cgd 	vp->arg = arg;
    200  1.1  cgd 	(void) splx(s);
    201  1.1  cgd 	kn8ae_enable_intr(ih);
    202  1.1  cgd 	cookie = (void *) (u_int64_t) DWLPX_MVEC(ionode, hose, device);
    203  1.1  cgd 	return (cookie);
    204  1.1  cgd }
    205  1.1  cgd 
    206  1.1  cgd void
    207  1.1  cgd dec_kn8ae_intr_disestablish(ccv, cookie)
    208  1.1  cgd         void *ccv, *cookie;
    209  1.1  cgd {
    210  1.1  cgd 	int ionode, hose, device, s;
    211  1.1  cgd 	struct vectab *vp;
    212  1.1  cgd 
    213  1.1  cgd 	ionode = DWLPX_MVEC_IONODE(cookie);
    214  1.1  cgd 	hose = DWLPX_MVEC_HOSE(cookie);
    215  1.1  cgd 	device = DWLPX_MVEC_PCISLOT(cookie);
    216  1.1  cgd 	if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE ||
    217  1.1  cgd 	    device < 0 || device >= DWLPX_MAXDEV) {
    218  1.1  cgd 		return;
    219  1.1  cgd 	}
    220  1.1  cgd 	vp = &vectab[ionode][hose][device];
    221  1.1  cgd 	s = splhigh();
    222  1.1  cgd 	vp->func = kn8ae_spurious;
    223  1.1  cgd 	vp->arg = cookie;
    224  1.1  cgd 	(void) splx(s);
    225  1.1  cgd }
    226  1.1  cgd 
    227  1.1  cgd void
    228  1.1  cgd kn8ae_iointr(framep, vec)
    229  1.1  cgd 	void *framep;
    230  1.1  cgd 	unsigned long vec;
    231  1.1  cgd {
    232  1.1  cgd 	struct vectab *vp;
    233  1.1  cgd 	int ionode, hose, device;
    234  1.1  cgd 	if ((vec & DWLPX_VEC_MARK) == 0) {
    235  1.1  cgd 		panic("kn8ae_iointr: vec 0x%x\n", vec);
    236  1.1  cgd 	}
    237  1.1  cgd #ifdef	EVCNT_COUNTERS
    238  1.1  cgd 	kn8ae_intr_evcnt.ev_count++;
    239  1.1  cgd #else
    240  1.1  cgd 	;	/* XXX */
    241  1.1  cgd #endif
    242  1.1  cgd 	ionode = DWLPX_MVEC_IONODE(vec);
    243  1.1  cgd 	hose = DWLPX_MVEC_HOSE(vec);
    244  1.1  cgd 	device = DWLPX_MVEC_PCISLOT(vec);
    245  1.1  cgd 
    246  1.1  cgd 	if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE ||
    247  1.1  cgd 	    device < 0 || device >= DWLPX_MAXDEV) {
    248  1.1  cgd 		panic("kn8ae_iointr: malformed vector 0x%x\n", vec);
    249  1.1  cgd 	}
    250  1.1  cgd 	vp = &vectab[ionode][hose][device];
    251  1.1  cgd 	if ((*vp->func)(vp->arg) == 0) {
    252  1.1  cgd 		printf("kn8ae_iointr: TLSB Node %d Hose %d Slot %d - "
    253  1.1  cgd 		    " unclaimed interrupt\n", ionode + 4, hose, device);
    254  1.1  cgd 	}
    255  1.1  cgd }
    256  1.1  cgd 
    257  1.1  cgd int
    258  1.1  cgd kn8ae_spurious(arg)
    259  1.1  cgd 	void *arg;
    260  1.1  cgd {
    261  1.1  cgd 	int ionode, hose, device;
    262  1.1  cgd 	ionode = DWLPX_MVEC_IONODE(arg);
    263  1.1  cgd 	hose = DWLPX_MVEC_HOSE(arg);
    264  1.1  cgd 	device = DWLPX_MVEC_PCISLOT(arg);
    265  1.1  cgd 	printf("Spurious Interrupt from TLSB Node %d Hose %d Slot %d\n",
    266  1.1  cgd 	    ionode + 4, hose, device);
    267  1.1  cgd 	return (-1);
    268  1.1  cgd }
    269  1.1  cgd 
    270  1.1  cgd 
    271  1.1  cgd void
    272  1.1  cgd kn8ae_enadis_intr(irq, onoff)
    273  1.1  cgd 	pci_intr_handle_t irq;
    274  1.1  cgd 	int onoff;
    275  1.1  cgd {
    276  1.1  cgd 	unsigned long paddr;
    277  1.1  cgd 	u_int32_t val;
    278  1.1  cgd 	int ionode, hose, device, hpc, busp, s;
    279  1.1  cgd 
    280  1.1  cgd 	ionode = DWLPX_MVEC_IONODE(irq);
    281  1.1  cgd 	hose = DWLPX_MVEC_HOSE(irq);
    282  1.1  cgd 	device = DWLPX_MVEC_PCISLOT(irq);
    283  1.1  cgd 	busp = 1 << (((irq >> 16) & 0xff) - 1);
    284  1.1  cgd 	paddr = (1LL << 39);
    285  1.1  cgd 	paddr |= (unsigned long) ionode << 36;
    286  1.1  cgd 	paddr |= (unsigned long) hose << 34;
    287  1.1  cgd 	if (device < 4) {
    288  1.1  cgd 		hpc = 0;
    289  1.1  cgd 	} else if (device < 8) {
    290  1.1  cgd 		hpc = 1;
    291  1.1  cgd 		device -= 4;
    292  1.1  cgd 	} else {
    293  1.1  cgd 		hpc = 2;
    294  1.1  cgd 		device -= 8;
    295  1.1  cgd 	}
    296  1.1  cgd 	busp <<= (device << 2);
    297  1.1  cgd 	val = imaskcache[ionode][hose][hpc];
    298  1.1  cgd 	if (onoff)
    299  1.1  cgd 		val |= busp;
    300  1.1  cgd 	else
    301  1.1  cgd 		val &= ~busp;
    302  1.1  cgd 	imaskcache[ionode][hose][hpc] = val;
    303  1.1  cgd #if	0
    304  1.1  cgd 	printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n",
    305  1.1  cgd 	    onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose);
    306  1.1  cgd #endif
    307  1.1  cgd 	s = splhigh();
    308  1.1  cgd 	REGVAL(PCIA_IMASK(hpc) + paddr) = val;
    309  1.1  cgd 	alpha_mb();
    310  1.1  cgd 	(void) splx(s);
    311  1.1  cgd }
    312  1.1  cgd 
    313  1.1  cgd void
    314  1.1  cgd kn8ae_enable_intr(irq)
    315  1.1  cgd 	pci_intr_handle_t irq;
    316  1.1  cgd {
    317  1.1  cgd 	kn8ae_enadis_intr(irq, 1);
    318  1.1  cgd }
    319  1.1  cgd 
    320  1.1  cgd void
    321  1.1  cgd kn8ae_disable_intr(irq)
    322  1.1  cgd 	pci_intr_handle_t irq;
    323  1.1  cgd {
    324  1.1  cgd 	kn8ae_enadis_intr(irq, 0);
    325  1.1  cgd }
    326